From ffa69244d600b8fb807795b0ee59a83af721a784 Mon Sep 17 00:00:00 2001 From: bjc Date: Wed, 26 Apr 2000 06:08:27 +0000 Subject: [PATCH] new header files from netbsd -- also a spinlock.h --- sys/arch/vax/include/bus.h | 1078 +++++++++++++++++++++++++++++++ sys/arch/vax/include/intr.h | 58 ++ sys/arch/vax/include/ka46.h | 56 ++ sys/arch/vax/include/ka48.h | 55 ++ sys/arch/vax/include/ka670.h | 90 +++ sys/arch/vax/include/sgmap.h | 87 +++ sys/arch/vax/include/spinlock.h | 10 + 7 files changed, 1434 insertions(+) create mode 100644 sys/arch/vax/include/bus.h create mode 100644 sys/arch/vax/include/intr.h create mode 100644 sys/arch/vax/include/ka46.h create mode 100644 sys/arch/vax/include/ka48.h create mode 100644 sys/arch/vax/include/ka670.h create mode 100644 sys/arch/vax/include/sgmap.h create mode 100644 sys/arch/vax/include/spinlock.h diff --git a/sys/arch/vax/include/bus.h b/sys/arch/vax/include/bus.h new file mode 100644 index 00000000000..b012cae6449 --- /dev/null +++ b/sys/arch/vax/include/bus.h @@ -0,0 +1,1078 @@ +/* $OpenBSD: bus.h,v 1.1 2000/04/26 06:08:27 bjc Exp $ */ +/* $NetBSD: bus.h,v 1.11 2000/03/15 16:44:50 drochner Exp $ */ + +/*- + * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, + * NASA Ames Research Center. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Copyright (c) 1996 Charles M. Hannum. All rights reserved. + * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Christopher G. Demetriou + * for the NetBSD Project. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _VAX_BUS_H_ +#define _VAX_BUS_H_ + +#ifdef BUS_SPACE_DEBUG +#include /* for printf() prototype */ +/* + * Macros for sanity-checking the aligned-ness of pointers passed to + * bus space ops. These are not strictly necessary on the VAX, but + * could lead to performance improvements, and help catch problems + * with drivers that would creep up on other architectures. + */ +#define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ + ((((u_long)(p)) & (sizeof(t)-1)) == 0) + +#define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ +({ \ + if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ + printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \ + d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \ + } \ + (void) 0; \ +}) + +#define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) +#else +#define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0 +#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) +#endif /* BUS_SPACE_DEBUG */ + +/* + * Bus address and size types + */ +typedef u_long bus_addr_t; +typedef u_long bus_size_t; + +/* + * Access methods for bus resources and address space. + */ +typedef struct vax_bus_space *bus_space_tag_t; +typedef u_long bus_space_handle_t; + +struct vax_bus_space { + /* cookie */ + void *vbs_cookie; + + /* mapping/unmapping */ + int (*vbs_map) __P((void *, bus_addr_t, bus_size_t, + int, bus_space_handle_t *, int)); + void (*vbs_unmap) __P((void *, bus_space_handle_t, + bus_size_t, int)); + int (*vbs_subregion) __P((void *, bus_space_handle_t, + bus_size_t, bus_size_t, bus_space_handle_t *)); + + /* allocation/deallocation */ + int (*vbs_alloc) __P((void *, bus_addr_t, bus_addr_t, + bus_size_t, bus_size_t, bus_size_t, int, + bus_addr_t *, bus_space_handle_t *)); + void (*vbs_free) __P((void *, bus_space_handle_t, + bus_size_t)); +}; + +/* + * int bus_space_map __P((bus_space_tag_t t, bus_addr_t addr, + * bus_size_t size, int flags, bus_space_handle_t *bshp)); + * + * Map a region of bus space. + */ + +#define BUS_SPACE_MAP_CACHEABLE 0x01 +#define BUS_SPACE_MAP_LINEAR 0x02 +#define BUS_SPACE_MAP_PREFETCHABLE 0x04 + +#define bus_space_map(t, a, s, f, hp) \ + (*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 1) +#define vax_bus_space_map_noacct(t, a, s, f, hp) \ + (*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 0) + +/* + * int bus_space_unmap __P((bus_space_tag_t t, + * bus_space_handle_t bsh, bus_size_t size)); + * + * Unmap a region of bus space. + */ + +#define bus_space_unmap(t, h, s) \ + (*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 1) +#define vax_bus_space_unmap_noacct(t, h, s) \ + (*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 0) + +/* + * int bus_space_subregion __P((bus_space_tag_t t, + * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, + * bus_space_handle_t *nbshp)); + * + * Get a new handle for a subregion of an already-mapped area of bus space. + */ + +#define bus_space_subregion(t, h, o, s, nhp) \ + (*(t)->vbs_subregion)((t)->vbs_cookie, (h), (o), (s), (nhp)) + +/* + * int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t rstart, + * bus_addr_t rend, bus_size_t size, bus_size_t align, + * bus_size_t boundary, int flags, bus_addr_t *addrp, + * bus_space_handle_t *bshp)); + * + * Allocate a region of bus space. + */ + +#define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \ + (*(t)->vbs_alloc)((t)->vbs_cookie, (rs), (re), (s), (a), (b), \ + (f), (ap), (hp)) + +/* + * int bus_space_free __P((bus_space_tag_t t, + * bus_space_handle_t bsh, bus_size_t size)); + * + * Free a region of bus space. + */ + +#define bus_space_free(t, h, s) \ + (*(t)->vbs_free)((t)->vbs_cookie, (h), (s)) + +/* + * u_intN_t bus_space_read_N __P((bus_space_tag_t tag, + * bus_space_handle_t bsh, bus_size_t offset)); + * + * Read a 1, 2, 4, or 8 byte quantity from bus space + * described by tag/handle/offset. + */ + +#define bus_space_read_1(t, h, o) \ + (*(volatile u_int8_t *)((h) + (o))) + +#define bus_space_read_2(t, h, o) \ + (__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"), \ + (*(volatile u_int16_t *)((h) + (o)))) + +#define bus_space_read_4(t, h, o) \ + (__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"), \ + (*(volatile u_int32_t *)((h) + (o)))) + +#if 0 /* Cause a link error for bus_space_read_8 */ +#define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! +#endif + +/* + * void bus_space_read_multi_N __P((bus_space_tag_t tag, + * bus_space_handle_t bsh, bus_size_t offset, + * u_intN_t *addr, size_t count)); + * + * Read `count' 1, 2, 4, or 8 byte quantities from bus space + * described by tag/handle/offset and copy into buffer provided. + */ +static __inline void vax_mem_read_multi_1 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, u_int8_t *, size_t)); +static __inline void vax_mem_read_multi_2 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, u_int16_t *, size_t)); +static __inline void vax_mem_read_multi_4 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, u_int32_t *, size_t)); + +#define bus_space_read_multi_1(t, h, o, a, c) \ + vax_mem_read_multi_1((t), (h), (o), (a), (c)) + +#define bus_space_read_multi_2(t, h, o, a, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer"); \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \ + vax_mem_read_multi_2((t), (h), (o), (a), (c)); \ +} while (0) + +#define bus_space_read_multi_4(t, h, o, a, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer"); \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \ + vax_mem_read_multi_4((t), (h), (o), (a), (c)); \ +} while (0) + +#if 0 /* Cause a link error for bus_space_read_multi_8 */ +#define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! +#endif + +static __inline void +vax_mem_read_multi_1(t, h, o, a, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + u_int8_t *a; + size_t c; +{ + const bus_addr_t addr = h + o; + + for (; c != 0; c--, a++) + *a = *(volatile u_int8_t *)(addr); +} + +static __inline void +vax_mem_read_multi_2(t, h, o, a, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + u_int16_t *a; + size_t c; +{ + const bus_addr_t addr = h + o; + + for (; c != 0; c--, a++) + *a = *(volatile u_int16_t *)(addr); +} + +static __inline void +vax_mem_read_multi_4(t, h, o, a, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + u_int32_t *a; + size_t c; +{ + const bus_addr_t addr = h + o; + + for (; c != 0; c--, a++) + *a = *(volatile u_int32_t *)(addr); +} + +/* + * void bus_space_read_region_N __P((bus_space_tag_t tag, + * bus_space_handle_t bsh, bus_size_t offset, + * u_intN_t *addr, size_t count)); + * + * Read `count' 1, 2, 4, or 8 byte quantities from bus space + * described by tag/handle and starting at `offset' and copy into + * buffer provided. + */ + +static __inline void vax_mem_read_region_1 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, u_int8_t *, size_t)); +static __inline void vax_mem_read_region_2 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, u_int16_t *, size_t)); +static __inline void vax_mem_read_region_4 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, u_int32_t *, size_t)); + +#define bus_space_read_region_1(t, h, o, a, c) \ +do { \ + vax_mem_read_region_1((t), (h), (o), (a), (c)); \ +} while (0) + +#define bus_space_read_region_2(t, h, o, a, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer"); \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \ + vax_mem_read_region_2((t), (h), (o), (a), (c)); \ +} while (0) + +#define bus_space_read_region_4(t, h, o, a, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer"); \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \ + vax_mem_read_region_4((t), (h), (o), (a), (c)); \ +} while (0) + +#if 0 /* Cause a link error for bus_space_read_region_8 */ +#define bus_space_read_region_8 \ + !!! bus_space_read_region_8 unimplemented !!! +#endif + +static __inline void +vax_mem_read_region_1(t, h, o, a, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + u_int8_t *a; + size_t c; +{ + bus_addr_t addr = h + o; + + for (; c != 0; c--, addr++, a++) + *a = *(volatile u_int8_t *)(addr); +} + +static __inline void +vax_mem_read_region_2(t, h, o, a, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + u_int16_t *a; + size_t c; +{ + bus_addr_t addr = h + o; + + for (; c != 0; c--, addr++, a++) + *a = *(volatile u_int16_t *)(addr); +} + +static __inline void +vax_mem_read_region_4(t, h, o, a, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + u_int32_t *a; + size_t c; +{ + bus_addr_t addr = h + o; + + for (; c != 0; c--, addr++, a++) + *a = *(volatile u_int32_t *)(addr); +} + +/* + * void bus_space_write_N __P((bus_space_tag_t tag, + * bus_space_handle_t bsh, bus_size_t offset, + * u_intN_t value)); + * + * Write the 1, 2, 4, or 8 byte value `value' to bus space + * described by tag/handle/offset. + */ + +#define bus_space_write_1(t, h, o, v) \ +do { \ + ((void)(*(volatile u_int8_t *)((h) + (o)) = (v))); \ +} while (0) + +#define bus_space_write_2(t, h, o, v) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \ + ((void)(*(volatile u_int16_t *)((h) + (o)) = (v))); \ +} while (0) + +#define bus_space_write_4(t, h, o, v) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \ + ((void)(*(volatile u_int32_t *)((h) + (o)) = (v))); \ +} while (0) + +#if 0 /* Cause a link error for bus_space_write_8 */ +#define bus_space_write_8 !!! bus_space_write_8 not implemented !!! +#endif + +/* + * void bus_space_write_multi_N __P((bus_space_tag_t tag, + * bus_space_handle_t bsh, bus_size_t offset, + * const u_intN_t *addr, size_t count)); + * + * Write `count' 1, 2, 4, or 8 byte quantities from the buffer + * provided to bus space described by tag/handle/offset. + */ +static __inline void vax_mem_write_multi_1 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, const u_int8_t *, size_t)); +static __inline void vax_mem_write_multi_2 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, const u_int16_t *, size_t)); +static __inline void vax_mem_write_multi_4 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, const u_int32_t *, size_t)); + +#define bus_space_write_multi_1(t, h, o, a, c) \ +do { \ + vax_mem_write_multi_1((t), (h), (o), (a), (c)); \ +} while (0) + +#define bus_space_write_multi_2(t, h, o, a, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer"); \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \ + vax_mem_write_multi_2((t), (h), (o), (a), (c)); \ +} while (0) + +#define bus_space_write_multi_4(t, h, o, a, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer"); \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \ + vax_mem_write_multi_4((t), (h), (o), (a), (c)); \ +} while (0) + +#if 0 /* Cause a link error for bus_space_write_multi_8 */ +#define bus_space_write_multi_8(t, h, o, a, c) \ + !!! bus_space_write_multi_8 unimplemented !!! +#endif + +static __inline void +vax_mem_write_multi_1(t, h, o, a, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + const u_int8_t *a; + size_t c; +{ + const bus_addr_t addr = h + o; + + for (; c != 0; c--, a++) + *(volatile u_int8_t *)(addr) = *a; +} + +static __inline void +vax_mem_write_multi_2(t, h, o, a, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + const u_int16_t *a; + size_t c; +{ + const bus_addr_t addr = h + o; + + for (; c != 0; c--, a++) + *(volatile u_int16_t *)(addr) = *a; +} + +static __inline void +vax_mem_write_multi_4(t, h, o, a, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + const u_int32_t *a; + size_t c; +{ + const bus_addr_t addr = h + o; + + for (; c != 0; c--, a++) + *(volatile u_int32_t *)(addr) = *a; +} + +/* + * void bus_space_write_region_N __P((bus_space_tag_t tag, + * bus_space_handle_t bsh, bus_size_t offset, + * const u_intN_t *addr, size_t count)); + * + * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided + * to bus space described by tag/handle starting at `offset'. + */ +static __inline void vax_mem_write_region_1 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, const u_int8_t *, size_t)); +static __inline void vax_mem_write_region_2 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, const u_int16_t *, size_t)); +static __inline void vax_mem_write_region_4 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, const u_int32_t *, size_t)); + +#define bus_space_write_region_1(t, h, o, a, c) \ + vax_mem_write_region_1((t), (h), (o), (a), (c)) + +#define bus_space_write_region_2(t, h, o, a, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer"); \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \ + vax_mem_write_region_2((t), (h), (o), (a), (c)); \ +} while (0) + +#define bus_space_write_region_4(t, h, o, a, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer"); \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \ + vax_mem_write_region_4((t), (h), (o), (a), (c)); \ +} while (0) + +#if 0 /* Cause a link error for bus_space_write_region_8 */ +#define bus_space_write_region_8 \ + !!! bus_space_write_region_8 unimplemented !!! +#endif + +static __inline void +vax_mem_write_region_1(t, h, o, a, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + const u_int8_t *a; + size_t c; +{ + bus_addr_t addr = h + o; + + for (; c != 0; c--, addr++, a++) + *(volatile u_int8_t *)(addr) = *a; +} + +static __inline void +vax_mem_write_region_2(t, h, o, a, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + const u_int16_t *a; + size_t c; +{ + bus_addr_t addr = h + o; + + for (; c != 0; c--, addr++, a++) + *(volatile u_int16_t *)(addr) = *a; +} + +static __inline void +vax_mem_write_region_4(t, h, o, a, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + const u_int32_t *a; + size_t c; +{ + bus_addr_t addr = h + o; + + for (; c != 0; c--, addr++, a++) + *(volatile u_int32_t *)(addr) = *a; +} + +/* + * void bus_space_set_multi_N __P((bus_space_tag_t tag, + * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, + * size_t count)); + * + * Write the 1, 2, 4, or 8 byte value `val' to bus space described + * by tag/handle/offset `count' times. + */ + +static __inline void vax_mem_set_multi_1 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, u_int8_t, size_t)); +static __inline void vax_mem_set_multi_2 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, u_int16_t, size_t)); +static __inline void vax_mem_set_multi_4 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, u_int32_t, size_t)); + +#define bus_space_set_multi_1(t, h, o, v, c) \ + vax_mem_set_multi_1((t), (h), (o), (v), (c)) + +#define bus_space_set_multi_2(t, h, o, v, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \ + vax_mem_set_multi_2((t), (h), (o), (v), (c)); \ +} while (0) + +#define bus_space_set_multi_4(t, h, o, v, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \ + vax_mem_set_multi_4((t), (h), (o), (v), (c)); \ +} while (0) + +static __inline void +vax_mem_set_multi_1(t, h, o, v, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + u_int8_t v; + size_t c; +{ + bus_addr_t addr = h + o; + + while (c--) + *(volatile u_int8_t *)(addr) = v; +} + +static __inline void +vax_mem_set_multi_2(t, h, o, v, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + u_int16_t v; + size_t c; +{ + bus_addr_t addr = h + o; + + while (c--) + *(volatile u_int16_t *)(addr) = v; +} + +static __inline void +vax_mem_set_multi_4(t, h, o, v, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + u_int32_t v; + size_t c; +{ + bus_addr_t addr = h + o; + + while (c--) + *(volatile u_int32_t *)(addr) = v; +} + +#if 0 /* Cause a link error for bus_space_set_multi_8 */ +#define bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!! +#endif + +/* + * void bus_space_set_region_N __P((bus_space_tag_t tag, + * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, + * size_t count)); + * + * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described + * by tag/handle starting at `offset'. + */ + +static __inline void vax_mem_set_region_1 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, u_int8_t, size_t)); +static __inline void vax_mem_set_region_2 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, u_int16_t, size_t)); +static __inline void vax_mem_set_region_4 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, u_int32_t, size_t)); + +#define bus_space_set_region_1(t, h, o, v, c) \ + vax_mem_set_region_1((t), (h), (o), (v), (c)) + +#define bus_space_set_region_2(t, h, o, v, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \ + vax_mem_set_region_2((t), (h), (o), (v), (c)); \ +} while (0) + +#define bus_space_set_region_4(t, h, o, v, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \ + vax_mem_set_region_4((t), (h), (o), (v), (c)); \ +} while (0) + +static __inline void +vax_mem_set_region_1(t, h, o, v, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + u_int8_t v; + size_t c; +{ + bus_addr_t addr = h + o; + + for (; c != 0; c--, addr++) + *(volatile u_int8_t *)(addr) = v; +} + +static __inline void +vax_mem_set_region_2(t, h, o, v, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + u_int16_t v; + size_t c; +{ + bus_addr_t addr = h + o; + + for (; c != 0; c--, addr += 2) + *(volatile u_int16_t *)(addr) = v; +} + +static __inline void +vax_mem_set_region_4(t, h, o, v, c) + bus_space_tag_t t; + bus_space_handle_t h; + bus_size_t o; + u_int32_t v; + size_t c; +{ + bus_addr_t addr = h + o; + + for (; c != 0; c--, addr += 4) + *(volatile u_int32_t *)(addr) = v; +} + +#if 0 /* Cause a link error for bus_space_set_region_8 */ +#define bus_space_set_region_8 !!! bus_space_set_region_8 unimplemented !!! +#endif + +/* + * void bus_space_copy_region_N __P((bus_space_tag_t tag, + * bus_space_handle_t bsh1, bus_size_t off1, + * bus_space_handle_t bsh2, bus_size_t off2, + * size_t count)); + * + * Copy `count' 1, 2, 4, or 8 byte values from bus space starting + * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. + */ + +static __inline void vax_mem_copy_region_1 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, bus_space_handle_t, + bus_size_t, size_t)); +static __inline void vax_mem_copy_region_2 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, bus_space_handle_t, + bus_size_t, size_t)); +static __inline void vax_mem_copy_region_4 __P((bus_space_tag_t, + bus_space_handle_t, bus_size_t, bus_space_handle_t, + bus_size_t, size_t)); + +#define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \ + vax_mem_copy_region_1((t), (h1), (o1), (h2), (o2), (c)) + +#define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), u_int16_t, "bus addr 1"); \ + __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), u_int16_t, "bus addr 2"); \ + vax_mem_copy_region_2((t), (h1), (o1), (h2), (o2), (c)); \ +} while (0) + +#define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), u_int32_t, "bus addr 1"); \ + __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), u_int32_t, "bus addr 2"); \ + vax_mem_copy_region_4((t), (h1), (o1), (h2), (o2), (c)); \ +} while (0) + +static __inline void +vax_mem_copy_region_1(t, h1, o1, h2, o2, c) + bus_space_tag_t t; + bus_space_handle_t h1; + bus_size_t o1; + bus_space_handle_t h2; + bus_size_t o2; + size_t c; +{ + bus_addr_t addr1 = h1 + o1; + bus_addr_t addr2 = h2 + o2; + + if (addr1 >= addr2) { + /* src after dest: copy forward */ + for (; c != 0; c--, addr1++, addr2++) + *(volatile u_int8_t *)(addr2) = + *(volatile u_int8_t *)(addr1); + } else { + /* dest after src: copy backwards */ + for (addr1 += (c - 1), addr2 += (c - 1); + c != 0; c--, addr1--, addr2--) + *(volatile u_int8_t *)(addr2) = + *(volatile u_int8_t *)(addr1); + } +} + +static __inline void +vax_mem_copy_region_2(t, h1, o1, h2, o2, c) + bus_space_tag_t t; + bus_space_handle_t h1; + bus_size_t o1; + bus_space_handle_t h2; + bus_size_t o2; + size_t c; +{ + bus_addr_t addr1 = h1 + o1; + bus_addr_t addr2 = h2 + o2; + + if (addr1 >= addr2) { + /* src after dest: copy forward */ + for (; c != 0; c--, addr1 += 2, addr2 += 2) + *(volatile u_int16_t *)(addr2) = + *(volatile u_int16_t *)(addr1); + } else { + /* dest after src: copy backwards */ + for (addr1 += 2 * (c - 1), addr2 += 2 * (c - 1); + c != 0; c--, addr1 -= 2, addr2 -= 2) + *(volatile u_int16_t *)(addr2) = + *(volatile u_int16_t *)(addr1); + } +} + +static __inline void +vax_mem_copy_region_4(t, h1, o1, h2, o2, c) + bus_space_tag_t t; + bus_space_handle_t h1; + bus_size_t o1; + bus_space_handle_t h2; + bus_size_t o2; + size_t c; +{ + bus_addr_t addr1 = h1 + o1; + bus_addr_t addr2 = h2 + o2; + + if (addr1 >= addr2) { + /* src after dest: copy forward */ + for (; c != 0; c--, addr1 += 4, addr2 += 4) + *(volatile u_int32_t *)(addr2) = + *(volatile u_int32_t *)(addr1); + } else { + /* dest after src: copy backwards */ + for (addr1 += 4 * (c - 1), addr2 += 4 * (c - 1); + c != 0; c--, addr1 -= 4, addr2 -= 4) + *(volatile u_int32_t *)(addr2) = + *(volatile u_int32_t *)(addr1); + } +} + +#if 0 /* Cause a link error for bus_space_copy_8 */ +#define bus_space_copy_region_8 !!! bus_space_copy_region_8 unimplemented !!! +#endif + + +/* + * Bus read/write barrier methods. + * + * void bus_space_barrier __P((bus_space_tag_t tag, + * bus_space_handle_t bsh, bus_size_t offset, + * bus_size_t len, int flags)); + * + * Note: the vax does not currently require barriers, but we must + * provide the flags to MI code. + */ +#define bus_space_barrier(t, h, o, l, f) \ + ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) +#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ +#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ + + +/* + * Flags used in various bus DMA methods. + */ +#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */ +#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */ +#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */ +#define BUS_DMA_COHERENT 0x04 /* hint: map memory DMA coherent */ +#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */ +#define BUS_DMA_BUS2 0x20 +#define BUS_DMA_BUS3 0x40 +#define BUS_DMA_BUS4 0x80 + +/* + * Private flags stored in the DMA map. + */ +#define DMAMAP_HAS_SGMAP 0x80000000 /* sgva/len are valid */ + +/* Forwards needed by prototypes below. */ +struct mbuf; +struct uio; +struct vax_sgmap; + +/* + * Operations performed by bus_dmamap_sync(). + */ +#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ +#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ +#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ +#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ + +/* + * vax_bus_t + * + * Busses supported by NetBSD/vax, used by internal + * utility functions. NOT TO BE USED BY MACHINE-INDEPENDENT + * CODE! + */ +typedef enum { + VAX_BUS_MAINBUS, + VAX_BUS_SBI, + VAX_BUS_MASSBUS, + VAX_BUS_UNIBUS, /* Also handles QBUS */ + VAX_BUS_BI, + VAX_BUS_XMI, + VAX_BUS_TURBOCHANNEL +} vax_bus_t; + +typedef struct vax_bus_dma_tag *bus_dma_tag_t; +typedef struct vax_bus_dmamap *bus_dmamap_t; + +/* + * bus_dma_segment_t + * + * Describes a single contiguous DMA transaction. Values + * are suitable for programming into DMA registers. + */ +struct vax_bus_dma_segment { + bus_addr_t ds_addr; /* DMA address */ + bus_size_t ds_len; /* length of transfer */ +}; +typedef struct vax_bus_dma_segment bus_dma_segment_t; + +/* + * bus_dma_tag_t + * + * A machine-dependent opaque type describing the implementation of + * DMA for a given bus. + */ +struct vax_bus_dma_tag { + void *_cookie; /* cookie used in the guts */ + bus_addr_t _wbase; /* DMA window base */ + bus_size_t _wsize; /* DMA window size */ + + /* + * Some chipsets have a built-in boundary constraint, independent + * of what the device requests. This allows that boundary to + * be specified. If the device has a more restrictive contraint, + * the map will use that, otherwise this boundary will be used. + * This value is ignored if 0. + */ + bus_size_t _boundary; + + /* + * A bus may have more than one SGMAP window, so SGMAP + * windows also get a pointer to their SGMAP state. + */ + struct vax_sgmap *_sgmap; + + /* + * Internal-use only utility methods. NOT TO BE USED BY + * MACHINE-INDEPENDENT CODE! + */ + bus_dma_tag_t (*_get_tag) __P((bus_dma_tag_t, vax_bus_t)); + + /* + * DMA mapping methods. + */ + int (*_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int, + bus_size_t, bus_size_t, int, bus_dmamap_t *)); + void (*_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t)); + int (*_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *, + bus_size_t, struct proc *, int)); + int (*_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t, + struct mbuf *, int)); + int (*_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t, + struct uio *, int)); + int (*_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t, + bus_dma_segment_t *, int, bus_size_t, int)); + void (*_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t)); + void (*_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t, + bus_addr_t, bus_size_t, int)); + + /* + * DMA memory utility functions. + */ + int (*_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t, + bus_size_t, bus_dma_segment_t *, int, int *, int)); + void (*_dmamem_free) __P((bus_dma_tag_t, + bus_dma_segment_t *, int)); + int (*_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *, + int, size_t, caddr_t *, int)); + void (*_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t)); + int (*_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *, + int, int, int, int)); +}; + +#define vaxbus_dma_get_tag(t, b) \ + (*(t)->_get_tag)(t, b) + +#define bus_dmamap_create(t, s, n, m, b, f, p) \ + (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) +#define bus_dmamap_destroy(t, p) \ + (*(t)->_dmamap_destroy)((t), (p)) +#define bus_dmamap_load(t, m, b, s, p, f) \ + (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) +#define bus_dmamap_load_mbuf(t, m, b, f) \ + (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) +#define bus_dmamap_load_uio(t, m, u, f) \ + (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) +#define bus_dmamap_load_raw(t, m, sg, n, s, f) \ + (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) +#define bus_dmamap_unload(t, p) \ + (*(t)->_dmamap_unload)((t), (p)) +#define bus_dmamap_sync(t, p, o, l, ops) \ + (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) +#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ + (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) +#define bus_dmamem_free(t, sg, n) \ + (*(t)->_dmamem_free)((t), (sg), (n)) +#define bus_dmamem_map(t, sg, n, s, k, f) \ + (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) +#define bus_dmamem_unmap(t, k, s) \ + (*(t)->_dmamem_unmap)((t), (k), (s)) +#define bus_dmamem_mmap(t, sg, n, o, p, f) \ + (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) + +/* + * bus_dmamap_t + * + * Describes a DMA mapping. + */ +struct vax_bus_dmamap { + /* + * PRIVATE MEMBERS: not for use my machine-independent code. + */ + bus_size_t _dm_size; /* largest DMA transfer mappable */ + int _dm_segcnt; /* number of segs this map can map */ + bus_size_t _dm_maxsegsz; /* largest possible segment */ + bus_size_t _dm_boundary; /* don't cross this */ + int _dm_flags; /* misc. flags */ + + /* + * This is used only for SGMAP-mapped DMA, but we keep it + * here to avoid pointless indirection. + */ + int _dm_pteidx; /* PTE index */ + int _dm_ptecnt; /* PTE count */ + u_long _dm_sgva; /* allocated sgva */ + bus_size_t _dm_sgvalen; /* svga length */ + + /* + * PUBLIC MEMBERS: these are used by machine-independent code. + */ + bus_size_t dm_mapsize; /* size of the mapping */ + int dm_nsegs; /* # valid segments in mapping */ + bus_dma_segment_t dm_segs[1]; /* segments; variable length */ +}; + +#ifdef _VAX_BUS_DMA_PRIVATE +int _bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t, + bus_size_t, int, bus_dmamap_t *)); +void _bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t)); + +int _bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, + void *, bus_size_t, struct proc *, int)); +int _bus_dmamap_load_mbuf __P((bus_dma_tag_t, + bus_dmamap_t, struct mbuf *, int)); +int _bus_dmamap_load_uio __P((bus_dma_tag_t, + bus_dmamap_t, struct uio *, int)); +int _bus_dmamap_load_raw __P((bus_dma_tag_t, + bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int)); + +void _bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t)); +void _bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t, + bus_size_t, int)); + +int _bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size, + bus_size_t alignment, bus_size_t boundary, + bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags)); +void _bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, + int nsegs)); +int _bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, + int nsegs, size_t size, caddr_t *kvap, int flags)); +void _bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva, + size_t size)); +int _bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, + int nsegs, int off, int prot, int flags)); +#endif /* _VAX_BUS_DMA_PRIVATE */ + +#endif /* _VAX_BUS_H_ */ diff --git a/sys/arch/vax/include/intr.h b/sys/arch/vax/include/intr.h new file mode 100644 index 00000000000..de66f9b6545 --- /dev/null +++ b/sys/arch/vax/include/intr.h @@ -0,0 +1,58 @@ +/* $OpenBSD: intr.h,v 1.1 2000/04/26 06:08:27 bjc Exp $ */ +/* $NetBSD: intr.h,v 1.1 1998/08/18 23:55:00 matt Exp $ */ + +/* + * Copyright (c) 1998 Matt Thomas. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the company nor the name of the author may be used to + * endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef _VAX_INTR_H_ +#define _VAX_INTR_H_ + +/* Define the various Interrupt Priority Levels */ + +/* Interrupt Priority Levels are not mutually exclusive. */ + +#define IPL_BIO 0 /* block I/O */ +#define IPL_NET 1 /* network */ +#define IPL_TTY 2 /* terminal */ +#define IPL_IMP 3 /* memory allocation */ +#define IPL_AUDIO 4 /* audio */ +#define IPL_CLOCK 5 /* clock */ +#define IPL_NONE 6 + +#define IPL_LEVELS 7 + +#define IST_UNUSABLE -1 /* interrupt cannot be used */ +#define IST_NONE 0 /* none (dummy) */ +#define IST_PULSE 1 /* pulsed */ +#define IST_EDGE 2 /* edge-triggered */ +#define IST_LEVEL 3 /* level-triggered */ + +#include + +#endif /* _VAX_INTR_H */ diff --git a/sys/arch/vax/include/ka46.h b/sys/arch/vax/include/ka46.h new file mode 100644 index 00000000000..ce521a01f50 --- /dev/null +++ b/sys/arch/vax/include/ka46.h @@ -0,0 +1,56 @@ +/* $OpenBSD: ka46.h,v 1.1 2000/04/26 06:08:27 bjc Exp $ */ +/* $NetBSD: ka46.h,v 1.2 1998/08/11 17:52:58 ragge Exp $ */ +/* + * Copyright (c) 1998 Ludd, University of Lule}, Sweden. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed at Ludd, University of + * Lule}, Sweden and its contributors. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * KA46 (VS4000/60) specific definitions. + */ + + +/* IPR bits definitions */ +#define PCSTS_FLUSH 4 +#define PCSTS_ENABLE 2 +#define PCTAG_PARITY 0x80000000 +#define PCTAG_VALID 1 + +/* memory addresses of interest */ +#define KA46_INVFLT 0x20200000 +#define KA46_INVFLTSZ 32768 +#define KA46_CCR 0x23000000 +#define KA46_TAGST 0x2d000000 +#define KA46_TAGSZ 32768 + +#define CCR_CENA 0x00000001 +#define CCR_SPECIO 0x00000010 + +#define KA46_BWF0 0x20080014 +#define BWF0_FEN 0x01000000 diff --git a/sys/arch/vax/include/ka48.h b/sys/arch/vax/include/ka48.h new file mode 100644 index 00000000000..d3b7ed843b0 --- /dev/null +++ b/sys/arch/vax/include/ka48.h @@ -0,0 +1,55 @@ +/* $OpenBSD: ka48.h,v 1.1 2000/04/26 06:08:27 bjc Exp $ */ +/* + * Copyright (c) 1998 Ludd, University of Lule}, Sweden. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed at Ludd, University of + * Lule}, Sweden and its contributors. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * KA48 (VS4000 VLC) specific definitions. *** INCOMPLETE ! MK-990306 *** + */ + + +/* IPR bits definitions */ +#define PCSTS_FLUSH 4 +#define PCSTS_ENABLE 2 +#define PCTAG_PARITY 0x80000000 +#define PCTAG_VALID 1 + +/* memory addresses of interest */ +#define KA48_INVFLT 0x20200000 +#define KA48_INVFLTSZ 32768 +#define KA48_CCR 0x23000000 +#define KA48_TAGST 0x2d000000 +#define KA48_TAGSZ 32768 + +#define CCR_CENA 0x00000001 +#define CCR_SPECIO 0x00000010 + +#define KA48_BWF0 0x20080014 +#define BWF0_FEN 0x01000000 diff --git a/sys/arch/vax/include/ka670.h b/sys/arch/vax/include/ka670.h new file mode 100644 index 00000000000..5fbcd6a42ee --- /dev/null +++ b/sys/arch/vax/include/ka670.h @@ -0,0 +1,90 @@ +/* $OpenBSD: ka670.h,v 1.1 2000/04/26 06:08:27 bjc Exp $ */ +/* $NetBSD: ka670.h,v 1.1 1999/06/06 14:23:46 ragge Exp $ */ +/* + * Copyright (c) 1999 Ludd, University of Lule}, Sweden. + * All rights reserved. + * + * This code is derived from software contributed to Ludd by Bertram Barth. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed at Ludd, University of + * Lule}, Sweden and its contributors. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Definitions for I/O addresses of + * + * VAX 4000/300 (KA670) + */ + +#define KA670_SIDEX 0x20040004 /* SID extension register */ +#define KA670_IORESET 0x20020000 /* I/O Reset register */ + +#define KA670_ROM_BASE 0x20040000 /* System module ROM */ +#define KA670_ROM_END 0x2007FFFF +#define KA670_ROM_SIZE 0x40000 + +/* + * The following values refer to bits/bitfields within the 4 internal + * registers controlling primary cache: + * PR_PCTAG(124, tag-register) PR_PCIDX(125, index-register) + * PR_PCERR(126, error-register) PR_PCSTS(127, status-register) + */ +#define KA670_PCTAG_TAG 0x1FFFF800 /* bits 11-29 */ +#define KA670_PCTAG_PARITY 0x40000000 +#define KA670_PCTAG_VALID 0x80000000 + +#define KA670_PCIDX_INDEX 0x000007F8 /* 0x100 Q-word entries */ + +#define KA670_PCERR_ADDR 0x3FFFFFFF + +#define KA670_PCS_FORCEHIT 0x00000001 /* Force hit */ +#define KA670_PCS_ENABLE 0x00000002 /* Enable primary cache */ +#define KA670_PCS_FLUSH 0x00000004 /* Flush cache */ +#define KA670_PCS_REFRESH 0x00000008 /* Enable refresh */ +#define KA670_PCS_HIT 0x00000010 /* Cache hit */ +#define KA670_PCS_INTERRUPT 0x00000020 /* Interrupt pending */ +#define KA670_PCS_TRAP2 0x00000040 /* Trap while trap */ +#define KA670_PCS_TRAP1 0x00000080 /* Micro trap/machine check */ +#define KA670_PCS_TPERR 0x00000100 /* Tag parity error */ +#define KA670_PCS_DPERR 0x00000200 /* Dal data parity error */ +#define KA670_PCS_PPERR 0x00000400 /* P data parity error */ +#define KA670_PCS_BUSERR 0x00000800 /* Bus error */ +#define KA670_PCS_BCHIT 0x00001000 /* B cache hit */ + +#define KA670_PCSTS_BITS \ + "\020\015BCHIT\014BUSERR\013PPERR\012DPERR\011TPERR\010TRAP1" \ + "\007TRAP2\006INTR\005HIT\004REFRESH\003FLUSH\002ENABLE\001FORCEHIT" + +#define KA670_BCSTS_BITS \ + "\020\015BCHIT\014BUSERR\013PPERR\012DPERR\011TPERR\010TRAP1" \ + "\007TRAP2\006INTR\005HIT\004REFRESH\003FLUSH\002ENABLE\001FORCEHIT" + +/* + * Bits in PR_ACCS (Floating Point Accelerator Register) + */ +#define KA670_ACCS_VECTOR (1<<0) /* Vector Unit Present */ +#define KA670_ACCS_FCHIP (1<<1) /* FPU chip present */ +#define KA670_ACCS_WEP (1<<31) /* Write Even Parity */ diff --git a/sys/arch/vax/include/sgmap.h b/sys/arch/vax/include/sgmap.h new file mode 100644 index 00000000000..e5a7c74e1fc --- /dev/null +++ b/sys/arch/vax/include/sgmap.h @@ -0,0 +1,87 @@ +/* CVSKEYWORD */ +/* $NetBSD: sgmap.h,v 1.1 1999/06/06 18:58:50 ragge Exp $ */ + +/*- + * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, + * NASA Ames Research Center. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _VAX_COMMON_SGMAPVAR_H +#define _VAX_COMMON_SGMAPVAR_H + +#include +#include +#include + +/* + * A VAX SGMAP's state information. Nothing in the sgmap requires + * locking[*], with the exception of the extent map. Locking of the + * extent map is handled within the extent manager itself. + * + * [*] While the page table is a `global' resource, access to it is + * controlled by the extent map; once a region has been allocated from + * the map, that region is effectively `locked'. + */ +struct vax_sgmap { + struct extent *aps_ex; /* extent map to manage sgva space */ + struct pte *aps_pt; /* page table */ + bus_addr_t aps_sgvabase; /* base of the sgva space */ + bus_size_t aps_sgvasize; /* size of the sgva space */ + bus_addr_t aps_pa; /* Address in region */ +}; + +void vax_sgmap_init __P((bus_dma_tag_t, struct vax_sgmap *, + const char *, bus_addr_t, bus_size_t, struct pte *, bus_size_t)); + +int vax_sgmap_alloc __P((bus_dmamap_t, bus_size_t, + struct vax_sgmap *, int)); +void vax_sgmap_free __P((bus_dmamap_t, struct vax_sgmap *)); + +int vax_sgmap_load __P((bus_dma_tag_t, bus_dmamap_t, void *, + bus_size_t, struct proc *, int, struct vax_sgmap *)); + +int vax_sgmap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t, + struct mbuf *, int, struct vax_sgmap *)); + +int vax_sgmap_load_uio __P((bus_dma_tag_t, bus_dmamap_t, + struct uio *, int, struct vax_sgmap *)); + +int vax_sgmap_load_raw __P((bus_dma_tag_t, bus_dmamap_t, + bus_dma_segment_t *, int, bus_size_t, int, struct vax_sgmap *)); + +void vax_sgmap_unload __P(( bus_dma_tag_t, bus_dmamap_t, + struct vax_sgmap *)); + +#endif /* _VAX_COMMON_SGMAPVAR_H */ diff --git a/sys/arch/vax/include/spinlock.h b/sys/arch/vax/include/spinlock.h new file mode 100644 index 00000000000..0c3e43efff4 --- /dev/null +++ b/sys/arch/vax/include/spinlock.h @@ -0,0 +1,10 @@ +/* $OpenBSD: spinlock.h,v 1.1 2000/04/26 06:08:27 bjc Exp $ */ + +#ifndef _MACHINE_SPINLOCK_H_ +#define _MACHINE_SPINLOCK_H_ + +#define _SPINLOCK_UNLOCKED (1) +#define _SPINLOCK_LOCKED (0) +typedef int _spinlock_lock_t; + +#endif -- 2.20.1