From fef5f123d19c89fd90c3b02f759fa3bcc7adee28 Mon Sep 17 00:00:00 2001
From: daniel <daniel@openbsd.org>
Date: Wed, 27 Jul 2022 01:44:25 +0000
Subject: [PATCH] retire Rise CPU identification code

The Rise mp6 was an x86 compatible CPU that was available for about
a year from 1998 to 1999. Only the Kirin core was ever available
while the Lynx core did not make it to market. Shortly after this
CPU was released, SiS acquired Rise's technology and integrated it
into their SiS55x SoC which used a different vendor string.

Given how uncommon Rise CPUs are and given that we don't do anything
if we detect such a CPU, remove the small amount of code used to
identify them. OpenBSD should continue to run on these CPUs, they
just won't be recognized as Rise CPUs explicitly.

It is suspected that in the current code, a Rise CPU would not show
CX8 in the dmesg despite supporting the CMPXCHG8B instruction. The
Rise datasheet says that this cpuid feature bit is set to 0 to
"circumvent a reported bug in Windows NT". This is only a cosmetic
issue though as our kernel does not use CMPXCHG8B and our toolchain
assumes it exists (we default to -march=i586).

An interesting writeup on this topic is available here:

https://www.geoffchappell.com/studies/windows/km/cpu/cx8.htm

ok mlarkin@, deraadt@, jsg@
---
 sys/arch/i386/i386/machdep.c     | 37 +-------------------------------
 sys/arch/i386/include/cputypes.h |  3 +--
 2 files changed, 2 insertions(+), 38 deletions(-)

diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c
index 2bfddd664f9..9b0f5db5fc5 100644
--- a/sys/arch/i386/i386/machdep.c
+++ b/sys/arch/i386/i386/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.650 2022/07/12 05:45:49 jsg Exp $	*/
+/*	$OpenBSD: machdep.c,v 1.651 2022/07/27 01:44:25 daniel Exp $	*/
 /*	$NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $	*/
 
 /*-
@@ -781,41 +781,6 @@ const struct cpu_cpuid_nameclass i386_cpuid_cpus[] = {
 			cyrix3_cpu_setup
 		} }
 	},
-	{
-		"RiseRiseRise",
-		CPUVENDOR_RISE,
-		"Rise",
-		/* Family 4, not available from Rise */
-		{ {
-			CPUCLASS_486,
-			{
-				0, 0, 0, 0, 0, 0, 0, 0,
-				0, 0, 0, 0, 0, 0, 0, 0,
-				"486 class"		/* Default */
-			},
-			NULL
-		},
-		/* Family 5 */
-		{
-			CPUCLASS_586,
-			{
-				"mP6", 0, "mP6", 0, 0, 0, 0, 0,
-				0, 0, 0, 0, 0, 0, 0, 0,
-				"mP6"			/* Default */
-			},
-			NULL
-		},
-		/* Family 6, not yet available from Rise */
-		{
-			CPUCLASS_686,
-			{
-				0, 0, 0, 0, 0, 0, 0, 0,
-				0, 0, 0, 0, 0, 0, 0, 0,
-				"686 class"		/* Default */
-			},
-			NULL
-		} }
-	},
 	{
 		"GenuineTMx86",
 		CPUVENDOR_TRANSMETA,
diff --git a/sys/arch/i386/include/cputypes.h b/sys/arch/i386/include/cputypes.h
index 18221fe7dd2..df6b2d7911d 100644
--- a/sys/arch/i386/include/cputypes.h
+++ b/sys/arch/i386/include/cputypes.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cputypes.h,v 1.11 2022/07/07 00:56:46 daniel Exp $	*/
+/*	$OpenBSD: cputypes.h,v 1.12 2022/07/27 01:44:25 daniel Exp $	*/
 /*	$NetBSD: cputypes.h,v 1.10 1997/10/18 04:51:03 mikel Exp $	*/
 
 /*
@@ -63,7 +63,6 @@
 #define CPUVENDOR_CYRIX		1
 #define CPUVENDOR_AMD		3
 #define CPUVENDOR_IDT		4
-#define CPUVENDOR_RISE		5
 #define CPUVENDOR_TRANSMETA	6
 #define CPUVENDOR_NS		7
 #define CPUVENDOR_VIA		8
-- 
2.20.1