From f51cb083d3064a23e5031c74dcadc7b08c31b16a Mon Sep 17 00:00:00 2001 From: bluhm Date: Mon, 4 Mar 2024 23:50:20 +0000 Subject: [PATCH] Reduce high limit of dwqe(4) receive ring by one. To avoid confusion between the head and tail pointer, leave a gap in dwqe(4) receive descriptors. This prevents a situation when no RX interrupts are received. from gerhard@; OK kettenis@ dlg@ --- sys/dev/ic/dwqe.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/dev/ic/dwqe.c b/sys/dev/ic/dwqe.c index e515fd03374..97f874d2edf 100644 --- a/sys/dev/ic/dwqe.c +++ b/sys/dev/ic/dwqe.c @@ -1,4 +1,4 @@ -/* $OpenBSD: dwqe.c,v 1.16 2023/12/28 14:30:28 uwe Exp $ */ +/* $OpenBSD: dwqe.c,v 1.17 2024/03/04 23:50:20 bluhm Exp $ */ /* * Copyright (c) 2008, 2019 Mark Kettenis * Copyright (c) 2017, 2022 Patrick Wildt @@ -754,7 +754,7 @@ dwqe_up(struct dwqe_softc *sc) rxb->tb_m = NULL; } - if_rxr_init(&sc->sc_rx_ring, 2, DWQE_NRXDESC); + if_rxr_init(&sc->sc_rx_ring, 2, DWQE_NRXDESC - 1); dwqe_write(sc, GMAC_CHAN_RX_BASE_ADDR_HI(0), DWQE_DMA_DVA(sc->sc_rxring) >> 32); dwqe_write(sc, GMAC_CHAN_RX_BASE_ADDR(0), DWQE_DMA_DVA(sc->sc_rxring)); -- 2.20.1