From e4bf8fd0cb0e4d9899e1ead86737575b3c5deba9 Mon Sep 17 00:00:00 2001 From: kettenis Date: Thu, 29 Dec 2022 11:30:58 +0000 Subject: [PATCH] Use an iorw fence since we're syncing cpu access and device access to memory. ok miod@ --- sys/arch/riscv64/riscv64/bus_dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/arch/riscv64/riscv64/bus_dma.c b/sys/arch/riscv64/riscv64/bus_dma.c index 08935d266c6..7659eb5be28 100644 --- a/sys/arch/riscv64/riscv64/bus_dma.c +++ b/sys/arch/riscv64/riscv64/bus_dma.c @@ -1,4 +1,4 @@ -/* $OpenBSD: bus_dma.c,v 1.5 2021/05/14 06:48:52 jsg Exp $ */ +/* $OpenBSD: bus_dma.c,v 1.6 2022/12/29 11:30:58 kettenis Exp $ */ /* * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -401,7 +401,7 @@ _dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t addr, * and return. */ if (t->_flags & BUS_DMA_COHERENT) { - membar_sync(); + __asm volatile ("fence iorw,iorw" ::: "memory"); return; } -- 2.20.1