From e1c2dbc7e0caae89526ea1ea599dc1ec35c00c8a Mon Sep 17 00:00:00 2001 From: guenther Date: Wed, 19 Jan 2022 19:39:42 +0000 Subject: [PATCH] Only invoke the underlying cpuid instruction if the real CPU might support the leaf (<=cpuid_level) and always pass the subleaf. Delete the CPUID_LEAF() calls made superfluous by always passing the subleaf. ok mlarkin@ --- sys/arch/amd64/amd64/vmm.c | 35 +++++++++++++++++------------------ 1 file changed, 17 insertions(+), 18 deletions(-) diff --git a/sys/arch/amd64/amd64/vmm.c b/sys/arch/amd64/amd64/vmm.c index edf767341d3..8740d47267c 100644 --- a/sys/arch/amd64/amd64/vmm.c +++ b/sys/arch/amd64/amd64/vmm.c @@ -1,4 +1,4 @@ -/* $OpenBSD: vmm.c,v 1.301 2022/01/11 20:34:22 tobhe Exp $ */ +/* $OpenBSD: vmm.c,v 1.302 2022/01/19 19:39:42 guenther Exp $ */ /* * Copyright (c) 2014 Mike Larkin * @@ -6770,7 +6770,11 @@ vmm_handle_cpuid(struct vcpu *vcpu) *rax = vmm_cpuid_level; } - CPUID_LEAF(*rax, 0, eax, ebx, ecx, edx); + /* we fake up values in the range (cpuid_level, vmm_cpuid_level] */ + if (*rax <= cpuid_level || *rax > 0x80000000) + CPUID_LEAF(*rax, *rcx, eax, ebx, ecx, edx); + else + eax = ebx = ecx = edx = 0; switch (*rax) { case 0x00: /* Max level and vendor ID */ @@ -6809,18 +6813,10 @@ vmm_handle_cpuid(struct vcpu *vcpu) *rdx = 0; break; case 0x04: /* Deterministic cache info */ - if (*rcx == 0) { - *rax = eax & VMM_CPUID4_CACHE_TOPOLOGY_MASK; - *rbx = ebx; - *rcx = ecx; - *rdx = edx; - } else { - CPUID_LEAF(*rax, *rcx, eax, ebx, ecx, edx); - *rax = eax & VMM_CPUID4_CACHE_TOPOLOGY_MASK; - *rbx = ebx; - *rcx = ecx; - *rdx = edx; - } + *rax = eax & VMM_CPUID4_CACHE_TOPOLOGY_MASK; + *rbx = ebx; + *rcx = ecx; + *rdx = edx; break; case 0x05: /* MONITOR/MWAIT (not supported) */ DPRINTF("%s: function 0x05 (monitor/mwait) not supported\n", @@ -6890,7 +6886,6 @@ vmm_handle_cpuid(struct vcpu *vcpu) *rcx = 0; *rdx = 0; } else { - CPUID_LEAF(*rax, *rcx, eax, ebx, ecx, edx); *rax = eax; *rbx = ebx; *rcx = ecx; @@ -6989,13 +6984,17 @@ vmm_handle_cpuid(struct vcpu *vcpu) *rdx = curcpu()->ci_extcacheinfo[3]; break; case 0x80000007: /* apmi */ - CPUID(0x80000007, *rax, *rbx, *rcx, *rdx); + *rax = eax; + *rbx = ebx; + *rcx = ecx; + *rdx = edx; break; case 0x80000008: /* Phys bits info and topology (AMD) */ - CPUID(0x80000008, *rax, *rbx, *rcx, *rdx); - *rbx &= VMM_AMDSPEC_EBX_MASK; + *rax = eax; + *rbx = ebx & VMM_AMDSPEC_EBX_MASK; /* Reset %rcx (topology) */ *rcx = 0; + *rdx = edx; break; default: DPRINTF("%s: unsupported rax=0x%llx\n", __func__, *rax); -- 2.20.1