From df30041b001061b11517b74094b1c891c9f4890c Mon Sep 17 00:00:00 2001 From: patrick Date: Wed, 3 Jul 2024 22:37:00 +0000 Subject: [PATCH] Right now MSIs don't work on the Qualcomm Snapdragon X Elite (X1E80100). This is the first and only platform so far where we have seen larger devbits than we can initially support. For now, stop registering the MSI controller if we encounter this. With this, PCIe devices use SPIs and work correctly. At some point we can hopefully rip this thing out again. ok kettenis@ --- sys/arch/arm64/dev/agintc.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/sys/arch/arm64/dev/agintc.c b/sys/arch/arm64/dev/agintc.c index 79da7f4da7e..3ffd0477423 100644 --- a/sys/arch/arm64/dev/agintc.c +++ b/sys/arch/arm64/dev/agintc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: agintc.c,v 1.58 2024/06/23 21:58:34 patrick Exp $ */ +/* $OpenBSD: agintc.c,v 1.59 2024/07/03 22:37:00 patrick Exp $ */ /* * Copyright (c) 2007, 2009, 2011, 2017 Dale Rahn * Copyright (c) 2018 Mark Kettenis @@ -1705,6 +1705,13 @@ agintc_msi_attach(struct device *parent, struct device *self, void *aux) size = (1ULL << sc->sc_devbits) * sc->sc_dte_sz; size = roundup(size, sc->sc_dtt_pgsz); + /* FIXME: For now, skip registering MSI controller */ + if (size / sc->sc_dtt_pgsz > GITS_BASER_SZ_MASK + 1) { + printf(": cannot support %u devbits on %lu pgsz\n", + sc->sc_devbits, sc->sc_dtt_pgsz); + return; + } + /* Clamp down to maximum configurable num pages */ if (size / sc->sc_dtt_pgsz > GITS_BASER_SZ_MASK + 1) size = (GITS_BASER_SZ_MASK + 1) * sc->sc_dtt_pgsz; -- 2.20.1