From d8860ad8b78c0bc1c99baf03a79c3fbe761deea8 Mon Sep 17 00:00:00 2001 From: patrick Date: Mon, 22 Feb 2021 18:53:26 +0000 Subject: [PATCH] Slow mode is only relevant for legacy and high speed timings. ok kettenis@ --- sys/dev/fdt/sdhc_fdt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sys/dev/fdt/sdhc_fdt.c b/sys/dev/fdt/sdhc_fdt.c index 234515b2a6c..c65f3bbd7ee 100644 --- a/sys/dev/fdt/sdhc_fdt.c +++ b/sys/dev/fdt/sdhc_fdt.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sdhc_fdt.c,v 1.12 2020/05/31 11:47:09 kettenis Exp $ */ +/* $OpenBSD: sdhc_fdt.c,v 1.13 2021/02/22 18:53:26 patrick Exp $ */ /* * Copyright (c) 2017 Mark Kettenis * @@ -428,8 +428,8 @@ phy_init: XENON_EMMC_PHY_TIMING_ADJUST); reg |= XENON_EMMC_PHY_TIMING_ADJUST_SAMPL_INV_QSP_PHASE_SELECT; reg &= ~XENON_EMMC_PHY_TIMING_ADJUST_SLOW_MODE; - if (timing == SDMMC_TIMING_LEGACY || - timing == SDMMC_TIMING_HIGHSPEED || sc->sc_slow_mode) + if ((timing == SDMMC_TIMING_LEGACY || + timing == SDMMC_TIMING_HIGHSPEED) && sc->sc_slow_mode) reg |= XENON_EMMC_PHY_TIMING_ADJUST_SLOW_MODE; bus_space_write_4(sc->sc_iot, sc->sc_ioh, XENON_EMMC_PHY_TIMING_ADJUST, reg); -- 2.20.1