From ca870d198d4665c019b9f7a842f2ce3d28caa586 Mon Sep 17 00:00:00 2001 From: kettenis Date: Mon, 30 Jul 2018 14:19:12 +0000 Subject: [PATCH] Use the MI interrupt enable/distable API instead of the MD one on i386 and remove the MD API. ok deraadt@ --- sys/arch/i386/i386/apm.c | 6 +++--- sys/arch/i386/i386/cpu.c | 4 ++-- sys/arch/i386/i386/hibernate_machdep.c | 6 +++--- sys/arch/i386/i386/i686_mem.c | 14 +++++++++----- sys/arch/i386/i386/ipifuncs.c | 4 ++-- sys/arch/i386/i386/k6_mem.c | 12 +++++++----- sys/arch/i386/i386/lapic.c | 21 ++++++++++++--------- sys/arch/i386/i386/longrun.c | 20 +++++++++----------- sys/arch/i386/i386/machdep.c | 4 ++-- sys/arch/i386/i386/powernow-k7.c | 7 ++++--- sys/arch/i386/include/cpufunc.h | 20 +++----------------- sys/arch/i386/isa/clock.c | 21 ++++++++++----------- sys/arch/i386/isa/joy.c | 7 ++++--- sys/arch/i386/isa/npx.c | 13 ++++++------- sys/arch/i386/pci/elan520.c | 10 ++++------ sys/dev/isa/gus.c | 7 ++++--- 16 files changed, 84 insertions(+), 92 deletions(-) diff --git a/sys/arch/i386/i386/apm.c b/sys/arch/i386/i386/apm.c index d55e5d96d59..ed9ff70e9a2 100644 --- a/sys/arch/i386/i386/apm.c +++ b/sys/arch/i386/i386/apm.c @@ -1,4 +1,4 @@ -/* $OpenBSD: apm.c,v 1.117 2017/08/17 19:44:27 tedu Exp $ */ +/* $OpenBSD: apm.c,v 1.118 2018/07/30 14:19:12 kettenis Exp $ */ /*- * Copyright (c) 1998-2001 Michael Shalayeff. All rights reserved. @@ -247,7 +247,7 @@ apm_suspend(int state) bufq_quiesce(); s = splhigh(); - disable_intr(); + intr_disable(); cold = 2; config_suspend_all(DVACT_SUSPEND); suspend_randomness(); @@ -272,7 +272,7 @@ apm_suspend(int state) config_suspend_all(DVACT_RESUME); cold = 0; - enable_intr(); + intr_enable(); splx(s); resume_randomness(NULL, 0); /* force RNG upper level reseed */ diff --git a/sys/arch/i386/i386/cpu.c b/sys/arch/i386/i386/cpu.c index 3d54c4719b3..54964560d0b 100644 --- a/sys/arch/i386/i386/cpu.c +++ b/sys/arch/i386/i386/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.93 2018/06/22 13:21:14 bluhm Exp $ */ +/* $OpenBSD: cpu.c,v 1.94 2018/07/30 14:19:12 kettenis Exp $ */ /* $NetBSD: cpu.c,v 1.1.2.7 2000/06/26 02:04:05 sommerfeld Exp $ */ /*- @@ -705,7 +705,7 @@ cpu_hatch(void *v) s = splhigh(); /* XXX prevent softints from running here.. */ lapic_tpr = 0; - enable_intr(); + intr_enable(); if (mp_verbose) printf("%s: CPU at apid %ld running\n", ci->ci_dev->dv_xname, ci->ci_cpuid); diff --git a/sys/arch/i386/i386/hibernate_machdep.c b/sys/arch/i386/i386/hibernate_machdep.c index 1294212a354..2e5b3f89c51 100644 --- a/sys/arch/i386/i386/hibernate_machdep.c +++ b/sys/arch/i386/i386/hibernate_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: hibernate_machdep.c,v 1.54 2018/07/04 02:05:06 mlarkin Exp $ */ +/* $OpenBSD: hibernate_machdep.c,v 1.55 2018/07/30 14:19:12 kettenis Exp $ */ /* * Copyright (c) 2011 Mike Larkin @@ -387,13 +387,13 @@ hibernate_inflate_skip(union hibernate_info *hib_info, paddr_t dest) void hibernate_enable_intr_machdep(void) { - enable_intr(); + intr_enable(); } void hibernate_disable_intr_machdep(void) { - disable_intr(); + intr_disable(); } #ifdef MULTIPROCESSOR diff --git a/sys/arch/i386/i386/i686_mem.c b/sys/arch/i386/i386/i686_mem.c index f83ab39c805..8ac78325ede 100644 --- a/sys/arch/i386/i386/i686_mem.c +++ b/sys/arch/i386/i386/i686_mem.c @@ -1,4 +1,4 @@ -/* $OpenBSD: i686_mem.c,v 1.18 2016/04/26 15:27:32 mlarkin Exp $ */ +/* $OpenBSD: i686_mem.c,v 1.19 2018/07/30 14:19:12 kettenis Exp $ */ /* * Copyright (c) 1999 Michael Smith * All rights reserved. @@ -275,12 +275,14 @@ mrt2mtrr(u_int64_t flags) void mrstore(struct mem_range_softc *sc) { - disable_intr(); /* disable interrupts */ + u_long s; + + s = intr_disable(); /* disable interrupts */ #ifdef MULTIPROCESSOR i386_broadcast_ipi(I386_IPI_MTRR); #endif mrstoreone(sc); - enable_intr(); + intr_restore(s); } /* @@ -618,7 +620,9 @@ mrinit_cpu(struct mem_range_softc *sc) void mrreload_cpu(struct mem_range_softc *sc) { - disable_intr(); + u_long s; + + s = intr_disable(); mrstoreone(sc); /* set MTRRs to match BSP */ - enable_intr(); + intr_restore(s); } diff --git a/sys/arch/i386/i386/ipifuncs.c b/sys/arch/i386/i386/ipifuncs.c index 8b3e8b3d446..2ef0e4d9429 100644 --- a/sys/arch/i386/i386/ipifuncs.c +++ b/sys/arch/i386/i386/ipifuncs.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ipifuncs.c,v 1.30 2017/12/04 21:12:41 mpi Exp $ */ +/* $OpenBSD: ipifuncs.c,v 1.31 2018/07/30 14:19:12 kettenis Exp $ */ /* $NetBSD: ipifuncs.c,v 1.1.2.3 2000/06/26 02:04:06 sommerfeld Exp $ */ /*- @@ -116,7 +116,7 @@ i386_ipi_halt(struct cpu_info *ci) KASSERT(!_kernel_lock_held()); npxsave_cpu(ci, 1); - disable_intr(); + intr_disable(); lapic_disable(); wbinvd(); ci->ci_flags &= ~CPUF_RUNNING; diff --git a/sys/arch/i386/i386/k6_mem.c b/sys/arch/i386/i386/k6_mem.c index 84a0f34696d..408ea72f28e 100644 --- a/sys/arch/i386/i386/k6_mem.c +++ b/sys/arch/i386/i386/k6_mem.c @@ -1,4 +1,4 @@ -/* $OpenBSD: k6_mem.c,v 1.12 2015/09/08 04:28:34 semarie Exp $ */ +/* $OpenBSD: k6_mem.c,v 1.13 2018/07/30 14:19:12 kettenis Exp $ */ /*- * Copyright (c) 1999 Brian Fundakowski Feldman * All rights reserved. @@ -130,6 +130,7 @@ k6_mrset(struct mem_range_softc *sc, struct mem_range_desc *desc, int *arg) u_int64_t reg; u_int32_t mtrr; int error, d; + u_long s; switch (*arg) { case MEMRANGE_SET_UPDATE: @@ -163,14 +164,14 @@ k6_mrset(struct mem_range_softc *sc, struct mem_range_desc *desc, int *arg) out: - disable_intr(); + s = intr_disable(); wbinvd(); reg = rdmsr(UWCCR); reg &= ~(0xffffffff << (32 * d)); reg |= mtrr << (32 * d); wrmsr(UWCCR, reg); wbinvd(); - enable_intr(); + intr_restore(s); return 0; } @@ -184,17 +185,18 @@ k6_mrinit_cpu(struct mem_range_softc *sc) u_int64_t reg; u_int32_t mtrr; int d; + u_long s; for (d = 0; d < sc->mr_ndesc; d++) { k6_mrmake(&sc->mr_desc[d], &mtrr); - disable_intr(); + s = intr_disable(); wbinvd(); reg = rdmsr(UWCCR); reg &= ~(0xffffffff << (32 * d)); reg |= mtrr << (32 * d); wrmsr(UWCCR, reg); wbinvd(); - enable_intr(); + intr_restore(s); } } diff --git a/sys/arch/i386/i386/lapic.c b/sys/arch/i386/i386/lapic.c index 6bcf61c3c73..a67cf63263b 100644 --- a/sys/arch/i386/i386/lapic.c +++ b/sys/arch/i386/i386/lapic.c @@ -1,4 +1,4 @@ -/* $OpenBSD: lapic.c,v 1.46 2018/04/20 07:27:54 mlarkin Exp $ */ +/* $OpenBSD: lapic.c,v 1.47 2018/07/30 14:19:12 kettenis Exp $ */ /* $NetBSD: lapic.c,v 1.1.2.8 2000/02/23 06:10:50 sommerfeld Exp $ */ /*- @@ -77,11 +77,12 @@ void lapic_map(paddr_t); void lapic_map(paddr_t lapic_base) { - int s; vaddr_t va = (vaddr_t)&local_apic; + u_long s; + int tpr; - disable_intr(); - s = lapic_tpr; + s = intr_disable(); + tpr = lapic_tpr; /* * Map local apic. If we have a local apic, it's safe to assume @@ -103,8 +104,8 @@ lapic_map(paddr_t lapic_base) cpu_init_first(); #endif - lapic_tpr = s; - enable_intr(); + lapic_tpr = tpr; + intr_restore(s); } /* @@ -316,7 +317,8 @@ lapic_calibrate_timer(struct cpu_info *ci) { unsigned int startapic, endapic; u_int64_t dtick, dapic, tmp; - int i, ef = read_eflags(); + u_long s; + int i; if (mp_verbose) printf("%s: calibrating local timer\n", ci->ci_dev->dv_xname); @@ -329,7 +331,7 @@ lapic_calibrate_timer(struct cpu_info *ci) i82489_writereg(LAPIC_DCR_TIMER, LAPIC_DCRT_DIV1); i82489_writereg(LAPIC_ICR_TIMER, 0x80000000); - disable_intr(); + s = intr_disable(); /* wait for current cycle to finish */ wait_next_cycle(); @@ -341,7 +343,8 @@ lapic_calibrate_timer(struct cpu_info *ci) wait_next_cycle(); endapic = lapic_gettick(); - write_eflags(ef); + + intr_restore(s); dtick = hz * TIMER_DIV(hz); dapic = startapic-endapic; diff --git a/sys/arch/i386/i386/longrun.c b/sys/arch/i386/i386/longrun.c index ecf298958c7..5d1579dd94e 100644 --- a/sys/arch/i386/i386/longrun.c +++ b/sys/arch/i386/i386/longrun.c @@ -1,4 +1,4 @@ -/* $OpenBSD: longrun.c,v 1.16 2014/09/14 14:17:23 jsg Exp $ */ +/* $OpenBSD: longrun.c,v 1.17 2018/07/30 14:19:12 kettenis Exp $ */ /* * Copyright (c) 2003 Ted Unangst * Copyright (c) 2001 Tamotsu Hattori @@ -74,13 +74,12 @@ longrun_init(void) void longrun_update(void *arg) { - uint32_t eflags, regs[4]; + uint32_t regs[4]; + u_long s; - eflags = read_eflags(); - disable_intr(); + s = intr_disable(); cpuid(0x80860007, regs); - enable_intr(); - write_eflags(eflags); + intr_restore(s); cpuspeed = regs[0]; @@ -98,16 +97,16 @@ longrun_update(void *arg) void longrun_setperf(int high) { - uint32_t eflags, mode; union msrinfo msrinfo; + uint32_t mode; + u_long s; if (high >= 50) mode = 1; /* power */ else mode = 0; /* battery */ - eflags = read_eflags(); - disable_intr(); + s = intr_disable(); msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN); msrinfo.regs[0] = LONGRUN_MODE_WRITE(msrinfo.regs[0], 0); /* low */ @@ -118,8 +117,7 @@ longrun_setperf(int high) msrinfo.regs[0] = (msrinfo.regs[0] & ~0x01) | mode; wrmsr(MSR_TMx86_LONGRUN_FLAGS, msrinfo.msr); - enable_intr(); - write_eflags(eflags); + intr_restore(s); longrun_update(NULL); } diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c index e44bc0fd544..a47f5e7037a 100644 --- a/sys/arch/i386/i386/machdep.c +++ b/sys/arch/i386/i386/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.621 2018/07/24 17:31:23 brynet Exp $ */ +/* $OpenBSD: machdep.c,v 1.622 2018/07/30 14:19:12 kettenis Exp $ */ /* $NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $ */ /*- @@ -3418,7 +3418,7 @@ cpu_reset(void) { struct region_descriptor region; - disable_intr(); + intr_disable(); if (cpuresetfn) (*cpuresetfn)(); diff --git a/sys/arch/i386/i386/powernow-k7.c b/sys/arch/i386/i386/powernow-k7.c index a53d6cf8c26..8c29f073a22 100644 --- a/sys/arch/i386/i386/powernow-k7.c +++ b/sys/arch/i386/i386/powernow-k7.c @@ -1,4 +1,4 @@ -/* $OpenBSD: powernow-k7.c,v 1.42 2018/07/04 02:06:15 mlarkin Exp $ */ +/* $OpenBSD: powernow-k7.c,v 1.43 2018/07/30 14:19:12 kettenis Exp $ */ /* * Copyright (c) 2004 Martin Végiard. @@ -154,6 +154,7 @@ k7_powernow_setperf(int level) int cvid, cfid, vid = 0, fid = 0; uint64_t status, ctl; struct k7pnow_cpu_state * cstate; + u_long s; cstate = k7pnow_current_state; @@ -183,7 +184,7 @@ k7_powernow_setperf(int level) ctl |= PN7_CTR_SGTC(cstate->sgtc); if (cstate->flags & PN7_FLAG_ERRATA_A0) - disable_intr(); + s = intr_disable(); if (k7pnow_fid_to_mult[fid] < k7pnow_fid_to_mult[cfid]) { wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_FIDC); @@ -196,7 +197,7 @@ k7_powernow_setperf(int level) } if (cstate->flags & PN7_FLAG_ERRATA_A0) - enable_intr(); + intr_restore(s); status = rdmsr(MSR_AMDK7_FIDVID_STATUS); cfid = PN7_STA_CFID(status); diff --git a/sys/arch/i386/include/cpufunc.h b/sys/arch/i386/include/cpufunc.h index 6d0dba811fe..4f52ffb6fdd 100644 --- a/sys/arch/i386/include/cpufunc.h +++ b/sys/arch/i386/include/cpufunc.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpufunc.h,v 1.29 2018/06/30 10:16:35 kettenis Exp $ */ +/* $OpenBSD: cpufunc.h,v 1.30 2018/07/30 14:19:12 kettenis Exp $ */ /* $NetBSD: cpufunc.h,v 1.8 1994/10/27 04:15:59 cgd Exp $ */ /* @@ -56,8 +56,6 @@ static __inline u_int rcr3(void); static __inline void lcr4(u_int); static __inline u_int rcr4(void); static __inline void tlbflush(void); -static __inline void disable_intr(void); -static __inline void enable_intr(void); static __inline u_int read_eflags(void); static __inline void write_eflags(u_int); static __inline void wbinvd(void); @@ -156,18 +154,6 @@ void setidt(int idx, /*XXX*/caddr_t func, int typ, int dpl); /* XXXX ought to be in psl.h with spl() functions */ -static __inline void -disable_intr(void) -{ - __asm volatile("cli"); -} - -static __inline void -enable_intr(void) -{ - __asm volatile("sti"); -} - static __inline u_int read_eflags(void) { @@ -186,7 +172,7 @@ write_eflags(u_int ef) static inline void intr_enable(void) { - enable_intr(); + __asm volatile("sti"); } static inline u_long @@ -195,7 +181,7 @@ intr_disable(void) u_long ef; ef = read_eflags(); - disable_intr(); + __asm volatile("cli"); return (ef); } diff --git a/sys/arch/i386/isa/clock.c b/sys/arch/i386/isa/clock.c index e4da81f5c94..0ce6949a438 100644 --- a/sys/arch/i386/isa/clock.c +++ b/sys/arch/i386/isa/clock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: clock.c,v 1.52 2017/09/08 05:36:51 deraadt Exp $ */ +/* $OpenBSD: clock.c,v 1.53 2018/07/30 14:19:12 kettenis Exp $ */ /* $NetBSD: clock.c,v 1.39 1996/05/12 23:11:54 mycroft Exp $ */ /*- @@ -244,6 +244,7 @@ rtcintr(void *arg) int gettick(void) { + u_long s; if (clock_broken_latch) { int v1, v2, v3; @@ -254,7 +255,7 @@ gettick(void) * CPUs don't do MP anyway. */ - disable_intr(); + s = intr_disable(); v1 = inb(IO_TIMER1 + TIMER_CNTR0); v1 |= inb(IO_TIMER1 + TIMER_CNTR0) << 8; @@ -263,7 +264,7 @@ gettick(void) v3 = inb(IO_TIMER1 + TIMER_CNTR0); v3 |= inb(IO_TIMER1 + TIMER_CNTR0) << 8; - enable_intr(); + intr_restore(s); if (v1 >= v2 && v2 >= v3 && v1 - v3 < 0x200) return (v2); @@ -298,17 +299,15 @@ gettick(void) return (v3); } else { u_char lo, hi; - u_long ef; mtx_enter(&timer_mutex); - ef = read_eflags(); - disable_intr(); + s = intr_disable(); /* Select counter 0 and latch it. */ outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); lo = inb(IO_TIMER1 + TIMER_CNTR0); hi = inb(IO_TIMER1 + TIMER_CNTR0); - write_eflags(ef); + intr_restore(s); mtx_leave(&timer_mutex); return ((hi << 8) | lo); } @@ -750,10 +749,9 @@ i8254_get_timecount(struct timecounter *tc) { u_char hi, lo; u_int count; - u_long ef; + u_long s; - ef = read_eflags(); - disable_intr(); + s = intr_disable(); outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); lo = inb(IO_TIMER1 + TIMER_CNTR0); @@ -767,7 +765,8 @@ i8254_get_timecount(struct timecounter *tc) } i8254_lastcount = count; count += i8254_offset; - write_eflags(ef); + + intr_restore(s); return (count); } diff --git a/sys/arch/i386/isa/joy.c b/sys/arch/i386/isa/joy.c index c867eaf3899..204a5009d76 100644 --- a/sys/arch/i386/isa/joy.c +++ b/sys/arch/i386/isa/joy.c @@ -1,4 +1,4 @@ -/* $OpenBSD: joy.c,v 1.15 2015/02/10 21:58:16 miod Exp $ */ +/* $OpenBSD: joy.c,v 1.16 2018/07/30 14:19:12 kettenis Exp $ */ /* $NetBSD: joy.c,v 1.3 1996/05/05 19:46:15 christos Exp $ */ /*- @@ -97,8 +97,9 @@ joyread(dev_t dev, struct uio *uio, int flag) int port = sc->port; int i, t0, t1; int state = 0, x = 0, y = 0; + u_long s; - disable_intr(); + s = intr_disable(); outb(port, 0xff); t0 = joy_get_tick(); t1 = t0; @@ -117,7 +118,7 @@ joyread(dev_t dev, struct uio *uio, int flag) if (x && y) break; } - enable_intr(); + intr_restore(s); c.x = x ? sc->x_off[JOYPART(dev)] + TICKS2USEC(t0 - x) : 0x80000000; c.y = y ? sc->y_off[JOYPART(dev)] + TICKS2USEC(t0 - y) : 0x80000000; state >>= 4; diff --git a/sys/arch/i386/isa/npx.c b/sys/arch/i386/isa/npx.c index cf4734ed2da..4e113b86b7d 100644 --- a/sys/arch/i386/isa/npx.c +++ b/sys/arch/i386/isa/npx.c @@ -1,4 +1,4 @@ -/* $OpenBSD: npx.c,v 1.69 2018/04/11 15:44:08 bluhm Exp $ */ +/* $OpenBSD: npx.c,v 1.70 2018/07/30 14:19:12 kettenis Exp $ */ /* $NetBSD: npx.c,v 1.57 1996/05/12 23:12:24 mycroft Exp $ */ #if 0 @@ -275,7 +275,7 @@ npxprobe(struct device *parent, void *match, void *aux) struct isa_attach_args *ia = aux; int irq; int result; - u_long save_eflags; + u_long s; unsigned save_imen; struct gate_descriptor save_idt_npxintr; struct gate_descriptor save_idt_npxtrap; @@ -297,8 +297,7 @@ npxprobe(struct device *parent, void *match, void *aux) * won't need to do so much here. */ irq = NRSVIDT + ia->ia_irq; - save_eflags = read_eflags(); - disable_intr(); + s = intr_disable(); save_idt_npxintr = idt[irq]; save_idt_npxtrap = idt[16]; setgate(&idt[irq], probeintr, 0, SDT_SYS386IGT, SEL_KPL, GICODE_SEL); @@ -320,16 +319,16 @@ npxprobe(struct device *parent, void *match, void *aux) * We have to turn off the CR0_EM bit temporarily while probing. */ lcr0(rcr0() & ~(CR0_EM|CR0_TS)); - enable_intr(); + intr_restore(s); result = npxprobe1(ia); - disable_intr(); + s = intr_disable(); lcr0(rcr0() | (CR0_EM|CR0_TS)); imen = save_imen; SET_ICUS(); idt[irq] = save_idt_npxintr; idt[16] = save_idt_npxtrap; - write_eflags(save_eflags); + intr_restore(s); return (result); } diff --git a/sys/arch/i386/pci/elan520.c b/sys/arch/i386/pci/elan520.c index c6fdf943de5..d93a2c9615a 100644 --- a/sys/arch/i386/pci/elan520.c +++ b/sys/arch/i386/pci/elan520.c @@ -1,4 +1,4 @@ -/* $OpenBSD: elan520.c,v 1.21 2014/12/10 12:27:56 mikeb Exp $ */ +/* $OpenBSD: elan520.c,v 1.22 2018/07/30 14:19:12 kettenis Exp $ */ /* $NetBSD: elan520.c,v 1.4 2002/10/02 05:47:15 thorpej Exp $ */ /*- @@ -345,8 +345,8 @@ elansc_update_cpuspeed(void) void elansc_setperf(int level) { - uint32_t eflags; uint8_t cpuctl, speed; + u_long s; level = (level > 50) ? 100 : 0; @@ -356,12 +356,10 @@ elansc_setperf(int level) if ((cpuctl & CPUCTL_CPU_CLK_SPD_MASK) == speed) return; - eflags = read_eflags(); - disable_intr(); + s = intr_disable(); bus_space_write_1(elansc->sc_memt, elansc->sc_memh, MMCR_CPUCTL, (cpuctl & ~CPUCTL_CPU_CLK_SPD_MASK) | speed); - enable_intr(); - write_eflags(eflags); + intr_restore(s); elansc_update_cpuspeed(); } diff --git a/sys/dev/isa/gus.c b/sys/dev/isa/gus.c index 7058000254e..67b1b88698a 100644 --- a/sys/dev/isa/gus.c +++ b/sys/dev/isa/gus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: gus.c,v 1.46 2017/05/04 15:19:01 bluhm Exp $ */ +/* $OpenBSD: gus.c,v 1.47 2018/07/30 14:19:12 kettenis Exp $ */ /* $NetBSD: gus.c,v 1.51 1998/01/25 23:48:06 mycroft Exp $ */ /*- @@ -3198,6 +3198,7 @@ gus_subattach(struct gus_softc *sc, struct isa_attach_args *ia) int i; bus_space_tag_t iot; unsigned char c,d,m; + u_long s; iot = sc->sc_iot; @@ -3244,7 +3245,7 @@ gus_subattach(struct gus_softc *sc, struct isa_attach_args *ia) * The order of these operations is very magical. */ - disable_intr(); /* XXX needed? */ + s = intr_disable(); /* XXX needed? */ bus_space_write_1(iot, sc->sc_ioh1, GUS_REG_CONTROL, GUS_REG_IRQCTL); bus_space_write_1(iot, sc->sc_ioh1, GUS_MIX_CONTROL, m); @@ -3274,7 +3275,7 @@ gus_subattach(struct gus_softc *sc, struct isa_attach_args *ia) (m | GUSMASK_LATCHES) & ~(GUSMASK_LINE_OUT|GUSMASK_LINE_IN)); bus_space_write_1(iot, sc->sc_ioh2, GUS_VOICE_SELECT, 0x00); - enable_intr(); + intr_restore(s); sc->sc_mixcontrol = (m | GUSMASK_LATCHES) & ~(GUSMASK_LINE_OUT|GUSMASK_LINE_IN); -- 2.20.1