From c06983ae919a087e9a01674cf945e05d4501f368 Mon Sep 17 00:00:00 2001 From: hastings Date: Wed, 27 Jul 2022 06:41:04 +0000 Subject: [PATCH] Enumerate and shift PHY mode bits. ok stsp@, jmatthew@, kevlo@ --- sys/dev/ic/mtwreg.h | 24 +++++++++++++++--------- sys/dev/usb/if_mtw.c | 8 ++++---- 2 files changed, 19 insertions(+), 13 deletions(-) diff --git a/sys/dev/ic/mtwreg.h b/sys/dev/ic/mtwreg.h index 1edd8497e36..90414e883a1 100644 --- a/sys/dev/ic/mtwreg.h +++ b/sys/dev/ic/mtwreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: mtwreg.h,v 1.1 2021/12/20 13:59:02 hastings Exp $ */ +/* $OpenBSD: mtwreg.h,v 1.2 2022/07/27 06:41:04 hastings Exp $ */ /* * Copyright (c) 2007 Damien Bergamini * Copyright (c) 2021 James Hastings @@ -727,6 +727,14 @@ #define MTW_RXQ_MCU 1 #define MTW_TXQ_MCU 5 +enum mtw_phy_mode { + MTW_PHY_CCK, + MTW_PHY_OFDM, + MTW_PHY_HT, + MTW_PHY_HT_GF, + MTW_PHY_VHT, +}; + /* RT2860 TX descriptor */ struct rt2860_txd { uint32_t sdp0; /* Segment Data Pointer 0 */ @@ -781,14 +789,12 @@ struct mtw_txwi { #define MTW_TX_TXOP_BACKOFF 3 uint16_t phy; -#define MTW_PHY_MODE 0xe000 -#define MTW_PHY_CCK (0 << 13) -#define MTW_PHY_OFDM (1 << 13) -#define MTW_PHY_HT (2 << 13) -#define MTW_PHY_HT_GF (3 << 13) -#define MTW_PHY_VHT (4 << 13) -#define MTW_PHY_STBC (1 << 10) -#define MTW_PHY_SGI (1 << 9) +#define MT7650_PHY_MODE 0xe000 +#define MT7601_PHY_MODE 0xc000 +#define MT7601_PHY_SHIFT 14 +#define MT7650_PHY_SHIFT 13 +#define MT7650_PHY_SGI (1 << 9) +#define MT7601_PHY_SGI (1 << 8) #define MTW_PHY_BW20 (0 << 7) #define MTW_PHY_BW40 (1 << 7) #define MTW_PHY_BW80 (2 << 7) diff --git a/sys/dev/usb/if_mtw.c b/sys/dev/usb/if_mtw.c index cb87e0dee54..44106323156 100644 --- a/sys/dev/usb/if_mtw.c +++ b/sys/dev/usb/if_mtw.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_mtw.c,v 1.5 2022/04/21 21:03:03 stsp Exp $ */ +/* $OpenBSD: if_mtw.c,v 1.6 2022/07/27 06:41:22 hastings Exp $ */ /* * Copyright (c) 2008-2010 Damien Bergamini * Copyright (c) 2013-2014 Kevin Lo @@ -2092,7 +2092,7 @@ mtw_rx_frame(struct mtw_softc *sc, uint8_t *buf, int dmalen, tap->wr_dbm_antsignal = mtw_rssi2dbm(sc, rssi, ant); tap->wr_rate = 2; /* in case it can't be found below */ phy = letoh16(rxwi->phy); - switch (phy & MTW_PHY_MODE) { + switch (phy >> MT7601_PHY_SHIFT) { case MTW_PHY_CCK: switch ((phy & MTW_PHY_MCS) & ~MTW_PHY_SHPRE) { case 0: tap->wr_rate = 2; break; @@ -2302,12 +2302,12 @@ mtw_tx(struct mtw_softc *sc, struct mbuf *m, struct ieee80211_node *ni) txwi->txop = MTW_TX_TXOP_BACKOFF; if (rt2860_rates[ridx].phy == IEEE80211_T_DS) { - txwi->phy = htole16(MTW_PHY_CCK); + txwi->phy = htole16(MTW_PHY_CCK << MT7601_PHY_SHIFT); if (ridx != MTW_RIDX_CCK1 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) mcs |= MTW_PHY_SHPRE; } else if (rt2860_rates[ridx].phy == IEEE80211_T_OFDM) - txwi->phy = htole16(MTW_PHY_OFDM); + txwi->phy = htole16(MTW_PHY_OFDM << MT7601_PHY_SHIFT); txwi->phy |= htole16(mcs); if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && -- 2.20.1