From b9532916800d2467e938468aa21fd8fab33cc8cf Mon Sep 17 00:00:00 2001 From: jsg Date: Sat, 15 Jun 2024 03:57:38 +0000 Subject: [PATCH] drm/amd/display: Disable seamless boot on 128b/132b encoding From Sung Joon Kim de23d906b265266c7de46fd330891122b015176b in linux-6.6.y/6.6.33 6f0c228ed9184287031a66b46a79e5a3d2e73a86 in mainline linux --- sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c b/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c index 46b10ff8f6d..72db370e2f2 100644 --- a/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c +++ b/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c @@ -1710,6 +1710,9 @@ bool dc_validate_boot_timing(const struct dc *dc, return false; } + if (link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) + return false; + if (dc->link_srv->edp_is_ilr_optimization_required(link, crtc_timing)) { DC_LOG_EVENT_LINK_TRAINING("Seamless boot disabled to optimize eDP link rate\n"); return false; -- 2.20.1