From b7062884d9c88c3a0a6bb892e972adf5c28c7d41 Mon Sep 17 00:00:00 2001 From: jsg Date: Thu, 18 Apr 2024 01:00:30 +0000 Subject: [PATCH] drm/i915/cdclk: Fix CDCLK programming order when pipes are active From Ville Syrjala d1742f77bdf28ffd37a9bd94934a2d261e85de33 in linux-6.6.y/6.6.28 7b1f6b5aaec0f849e19c3e99d4eea75876853cdd in mainline linux --- sys/dev/pci/drm/i915/display/intel_cdclk.c | 7 +++++-- sys/dev/pci/drm/i915/display/intel_cdclk.h | 3 +++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/sys/dev/pci/drm/i915/display/intel_cdclk.c b/sys/dev/pci/drm/i915/display/intel_cdclk.c index 0325086a595..5853621c249 100644 --- a/sys/dev/pci/drm/i915/display/intel_cdclk.c +++ b/sys/dev/pci/drm/i915/display/intel_cdclk.c @@ -2462,7 +2462,7 @@ intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state) if (IS_DG2(i915)) intel_cdclk_pcode_pre_notify(state); - if (pipe == INVALID_PIPE || + if (new_cdclk_state->disable_pipes || old_cdclk_state->actual.cdclk <= new_cdclk_state->actual.cdclk) { drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed); @@ -2494,7 +2494,7 @@ intel_set_cdclk_post_plane_update(struct intel_atomic_state *state) if (IS_DG2(i915)) intel_cdclk_pcode_post_notify(state); - if (pipe != INVALID_PIPE && + if (!new_cdclk_state->disable_pipes && old_cdclk_state->actual.cdclk > new_cdclk_state->actual.cdclk) { drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed); @@ -2946,6 +2946,7 @@ static struct intel_global_state *intel_cdclk_duplicate_state(struct intel_globa return NULL; cdclk_state->pipe = INVALID_PIPE; + cdclk_state->disable_pipes = false; return &cdclk_state->base; } @@ -3124,6 +3125,8 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state) if (ret) return ret; + new_cdclk_state->disable_pipes = true; + drm_dbg_kms(&dev_priv->drm, "Modeset required for cdclk change\n"); } diff --git a/sys/dev/pci/drm/i915/display/intel_cdclk.h b/sys/dev/pci/drm/i915/display/intel_cdclk.h index 48fd7d39e0c..71bc032bfef 100644 --- a/sys/dev/pci/drm/i915/display/intel_cdclk.h +++ b/sys/dev/pci/drm/i915/display/intel_cdclk.h @@ -51,6 +51,9 @@ struct intel_cdclk_state { /* bitmask of active pipes */ u8 active_pipes; + + /* update cdclk with pipes disabled */ + bool disable_pipes; }; int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state); -- 2.20.1