From b5aa3b3329f64accdef718a6489253474d9be985 Mon Sep 17 00:00:00 2001 From: guenther Date: Fri, 18 Apr 2014 15:09:52 +0000 Subject: [PATCH] It's been a quarter century: we can assume volatile is present with that name. --- lib/csu/sh/md_init.h | 4 +- lib/libarch/alpha/bwx.c | 6 +- lib/libarch/alpha/io.c | 8 +-- lib/libc/arch/hppa/gen/fabs.c | 4 +- lib/libc/arch/hppa/gen/flt_rounds.c | 4 +- lib/libc/arch/hppa/gen/fpgetmask.c | 4 +- lib/libc/arch/hppa/gen/fpgetround.c | 4 +- lib/libc/arch/hppa/gen/fpgetsticky.c | 4 +- lib/libc/arch/hppa/gen/fpsetmask.c | 6 +- lib/libc/arch/hppa/gen/fpsetround.c | 6 +- lib/libc/arch/hppa/gen/fpsetsticky.c | 6 +- lib/libc/arch/hppa64/gen/fabs.c | 4 +- lib/libc/arch/hppa64/gen/flt_rounds.c | 4 +- lib/libc/arch/hppa64/gen/fpgetmask.c | 4 +- lib/libc/arch/hppa64/gen/fpgetround.c | 4 +- lib/libc/arch/hppa64/gen/fpgetsticky.c | 4 +- lib/libc/arch/hppa64/gen/fpsetmask.c | 6 +- lib/libc/arch/hppa64/gen/fpsetround.c | 6 +- lib/libc/arch/hppa64/gen/fpsetsticky.c | 6 +- lib/libc/arch/sh/gen/fabs.c | 4 +- lib/libc/arch/sh/gen/flt_rounds.c | 4 +- lib/libc/arch/sh/gen/fpgetmask.c | 4 +- lib/libc/arch/sh/gen/fpgetround.c | 4 +- lib/libc/arch/sh/gen/fpgetsticky.c | 4 +- lib/libc/arch/sh/gen/fpsetmask.c | 6 +- lib/libc/arch/sh/gen/fpsetround.c | 6 +- lib/libc/arch/sh/gen/fpsetsticky.c | 6 +- lib/libm/arch/alpha/fenv.c | 38 +++++------ lib/libm/arch/amd64/fenv.c | 78 +++++++++++------------ lib/libm/arch/hppa/e_remainder.c | 2 +- lib/libm/arch/hppa/e_remainderf.c | 2 +- lib/libm/arch/hppa/e_sqrt.c | 2 +- lib/libm/arch/hppa/e_sqrtf.c | 2 +- lib/libm/arch/hppa/fenv.c | 44 ++++++------- lib/libm/arch/hppa/s_ceil.c | 8 +-- lib/libm/arch/hppa/s_ceilf.c | 8 +-- lib/libm/arch/hppa/s_floor.c | 8 +-- lib/libm/arch/hppa/s_floorf.c | 8 +-- lib/libm/arch/hppa/s_rint.c | 2 +- lib/libm/arch/hppa/s_rintf.c | 2 +- lib/libm/arch/hppa/s_round.c | 8 +-- lib/libm/arch/hppa/s_roundf.c | 8 +-- lib/libm/arch/hppa/s_trunc.c | 8 +-- lib/libm/arch/hppa/s_truncf.c | 8 +-- lib/libm/arch/hppa64/fenv.c | 44 ++++++------- lib/libm/arch/i387/fenv.c | 78 +++++++++++------------ lib/libm/arch/m88k/fenv.c | 52 +++++++-------- lib/libm/arch/mips64/fenv.c | 44 ++++++------- lib/libm/arch/powerpc/fenv.c | 40 ++++++------ lib/libm/arch/sh/e_sqrt.c | 10 +-- lib/libm/arch/sh/e_sqrtf.c | 10 +-- lib/libm/arch/sh/fenv.c | 42 ++++++------ lib/libm/arch/sh/s_fabsf.c | 4 +- lib/libm/arch/sparc/fenv.c | 42 ++++++------ lib/libm/arch/sparc64/fenv.c | 42 ++++++------ lib/librthread/arch/m88k/_atomic_lock.c | 4 +- lib/librthread/arch/mips64/_atomic_lock.c | 4 +- 57 files changed, 392 insertions(+), 392 deletions(-) diff --git a/lib/csu/sh/md_init.h b/lib/csu/sh/md_init.h index 2d600e25dee..6fb408d3871 100644 --- a/lib/csu/sh/md_init.h +++ b/lib/csu/sh/md_init.h @@ -1,4 +1,4 @@ -/* $OpenBSD: md_init.h,v 1.2 2013/12/03 06:21:41 guenther Exp $ */ +/* $OpenBSD: md_init.h,v 1.3 2014/04/18 15:09:52 guenther Exp $ */ /* $NetBSD: dot_init.h,v 1.3 2005/12/24 22:02:10 perry Exp $ */ /*- @@ -82,7 +82,7 @@ __asm(".section " #section "\n" \ __set_fpscr(0); \ __fpscr_values[0] |= FPSCR_DN; \ __fpscr_values[1] |= FPSCR_DN; \ - __asm __volatile__ ("lds %0, fpscr" \ + __asm volatile ("lds %0, fpscr" \ : : "r" (__fpscr_values[1])); #endif /* defined(__SH4__) && !defined(__SH4_NOFPU__) */ diff --git a/lib/libarch/alpha/bwx.c b/lib/libarch/alpha/bwx.c index 1819b6308c2..094c879e604 100644 --- a/lib/libarch/alpha/bwx.c +++ b/lib/libarch/alpha/bwx.c @@ -1,4 +1,4 @@ -/* $OpenBSD: bwx.c,v 1.6 2012/12/20 21:05:07 naddy Exp $ */ +/* $OpenBSD: bwx.c,v 1.7 2014/04/18 15:09:52 guenther Exp $ */ /*- * Copyright (c) 1998 Doug Rabson * All rights reserved. @@ -42,8 +42,8 @@ #define PATH_APERTURE "/dev/xf86" -#define mb() __asm__ __volatile__("mb" : : : "memory") -#define wmb() __asm__ __volatile__("wmb" : : : "memory") +#define mb() __asm__ volatile("mb" : : : "memory") +#define wmb() __asm__ volatile("wmb" : : : "memory") static int mem_fd = -1; /* file descriptor to /dev/mem */ static void *bwx_int1_ports = MAP_FAILED; /* mapped int1 io ports */ diff --git a/lib/libarch/alpha/io.c b/lib/libarch/alpha/io.c index d9662493008..a4bbaa60c2e 100644 --- a/lib/libarch/alpha/io.c +++ b/lib/libarch/alpha/io.c @@ -1,4 +1,4 @@ -/* $OpenBSD: io.c,v 1.4 2012/12/20 21:05:07 naddy Exp $ */ +/* $OpenBSD: io.c,v 1.5 2014/04/18 15:09:52 guenther Exp $ */ /*- * Copyright (c) 1998 Doug Rabson * All rights reserved. @@ -130,21 +130,21 @@ void writeb(void *handle, u_int32_t offset, u_int8_t val) { ops->writeb(handle, offset, val); - __asm__ __volatile__ ("mb"); + __asm__ volatile ("mb"); } void writew(void *handle, u_int32_t offset, u_int16_t val) { ops->writew(handle, offset, val); - __asm__ __volatile__ ("mb"); + __asm__ volatile ("mb"); } void writel(void *handle, u_int32_t offset, u_int32_t val) { ops->writel(handle, offset, val); - __asm__ __volatile__ ("mb"); + __asm__ volatile ("mb"); } void diff --git a/lib/libc/arch/hppa/gen/fabs.c b/lib/libc/arch/hppa/gen/fabs.c index 9b9b80b5867..dade90ce9bf 100644 --- a/lib/libc/arch/hppa/gen/fabs.c +++ b/lib/libc/arch/hppa/gen/fabs.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fabs.c,v 1.10 2013/11/13 15:21:51 deraadt Exp $ */ +/* $OpenBSD: fabs.c,v 1.11 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -11,7 +11,7 @@ double fabs(double val) { - __asm__ __volatile__("fabs,dbl %0,%0" : "+f" (val)); + __asm__ volatile("fabs,dbl %0,%0" : "+f" (val)); return (val); } diff --git a/lib/libc/arch/hppa/gen/flt_rounds.c b/lib/libc/arch/hppa/gen/flt_rounds.c index a5133c7502c..6defc4fb09e 100644 --- a/lib/libc/arch/hppa/gen/flt_rounds.c +++ b/lib/libc/arch/hppa/gen/flt_rounds.c @@ -1,4 +1,4 @@ -/* $OpenBSD: flt_rounds.c,v 1.4 2012/06/25 17:01:10 deraadt Exp $ */ +/* $OpenBSD: flt_rounds.c,v 1.5 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain. @@ -19,6 +19,6 @@ __flt_rounds() { u_int64_t fpsr; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); return map[(fpsr >> 41) & 0x03]; } diff --git a/lib/libc/arch/hppa/gen/fpgetmask.c b/lib/libc/arch/hppa/gen/fpgetmask.c index 36c46818159..7692c120f91 100644 --- a/lib/libc/arch/hppa/gen/fpgetmask.c +++ b/lib/libc/arch/hppa/gen/fpgetmask.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpgetmask.c,v 1.3 2002/10/21 18:41:05 mickey Exp $ */ +/* $OpenBSD: fpgetmask.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -12,6 +12,6 @@ fpgetmask() { u_int64_t fpsr; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); return ((fpsr >> 32) & 0x1f); } diff --git a/lib/libc/arch/hppa/gen/fpgetround.c b/lib/libc/arch/hppa/gen/fpgetround.c index e7438f7db19..8ec62343404 100644 --- a/lib/libc/arch/hppa/gen/fpgetround.c +++ b/lib/libc/arch/hppa/gen/fpgetround.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpgetround.c,v 1.3 2002/10/21 18:41:05 mickey Exp $ */ +/* $OpenBSD: fpgetround.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -12,6 +12,6 @@ fpgetround() { u_int64_t fpsr; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); return ((fpsr >> 41) & 0x3); } diff --git a/lib/libc/arch/hppa/gen/fpgetsticky.c b/lib/libc/arch/hppa/gen/fpgetsticky.c index 56f61b8cccb..cb5b384c61f 100644 --- a/lib/libc/arch/hppa/gen/fpgetsticky.c +++ b/lib/libc/arch/hppa/gen/fpgetsticky.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpgetsticky.c,v 1.3 2002/10/21 18:41:05 mickey Exp $ */ +/* $OpenBSD: fpgetsticky.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -12,6 +12,6 @@ fpgetsticky() { u_int64_t fpsr; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); return ((fpsr >> 59) & 0x1f); } diff --git a/lib/libc/arch/hppa/gen/fpsetmask.c b/lib/libc/arch/hppa/gen/fpsetmask.c index 804c2169ef8..8ccbe320bc5 100644 --- a/lib/libc/arch/hppa/gen/fpsetmask.c +++ b/lib/libc/arch/hppa/gen/fpsetmask.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpsetmask.c,v 1.4 2004/01/05 06:06:16 otto Exp $ */ +/* $OpenBSD: fpsetmask.c,v 1.5 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -14,9 +14,9 @@ fpsetmask(mask) u_int64_t fpsr; fp_except old; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m"(fpsr) : "r"(&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m"(fpsr) : "r"(&fpsr)); old = (fpsr >> 32) & 0x1f; fpsr = (fpsr & 0xffffffe000000000LL) | ((u_int64_t)(mask & 0x1f) << 32); - __asm__ __volatile__("fldd 0(%0),%%fr0" : : "r"(&fpsr)); + __asm__ volatile("fldd 0(%0),%%fr0" : : "r"(&fpsr)); return (old); } diff --git a/lib/libc/arch/hppa/gen/fpsetround.c b/lib/libc/arch/hppa/gen/fpsetround.c index 4943efa18ad..086b29a5a9e 100644 --- a/lib/libc/arch/hppa/gen/fpsetround.c +++ b/lib/libc/arch/hppa/gen/fpsetround.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpsetround.c,v 1.3 2002/10/21 18:41:05 mickey Exp $ */ +/* $OpenBSD: fpsetround.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -14,10 +14,10 @@ fpsetround(rnd_dir) u_int64_t fpsr; fp_rnd old; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); old = (fpsr >> 41) & 0x03; fpsr = (fpsr & 0xfffff9ff00000000LL) | ((u_int64_t)(rnd_dir & 0x03) << 41); - __asm__ __volatile__("fldd 0(%0),%%fr0" : : "r" (&fpsr)); + __asm__ volatile("fldd 0(%0),%%fr0" : : "r" (&fpsr)); return (old); } diff --git a/lib/libc/arch/hppa/gen/fpsetsticky.c b/lib/libc/arch/hppa/gen/fpsetsticky.c index 74620aa2a5e..fa506c10464 100644 --- a/lib/libc/arch/hppa/gen/fpsetsticky.c +++ b/lib/libc/arch/hppa/gen/fpsetsticky.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpsetsticky.c,v 1.5 2011/04/22 14:44:08 martynas Exp $ */ +/* $OpenBSD: fpsetsticky.c,v 1.6 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -14,9 +14,9 @@ fpsetsticky(mask) u_int64_t fpsr; fp_except old; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); old = (fpsr >> 59) & 0x1f; fpsr = (fpsr & 0x07ffffff00000000LL) | ((u_int64_t)(mask & 0x1f) << 59); - __asm__ __volatile__("fldd 0(%0),%%fr0" : : "r" (&fpsr)); + __asm__ volatile("fldd 0(%0),%%fr0" : : "r" (&fpsr)); return (old); } diff --git a/lib/libc/arch/hppa64/gen/fabs.c b/lib/libc/arch/hppa64/gen/fabs.c index ebde6369046..888a2559d4f 100644 --- a/lib/libc/arch/hppa64/gen/fabs.c +++ b/lib/libc/arch/hppa64/gen/fabs.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fabs.c,v 1.7 2013/11/13 15:21:51 deraadt Exp $ */ +/* $OpenBSD: fabs.c,v 1.8 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -11,7 +11,7 @@ double fabs(double val) { - __asm__ __volatile__("fabs,dbl %0,%0" : "+f" (val)); + __asm__ volatile("fabs,dbl %0,%0" : "+f" (val)); return (val); } diff --git a/lib/libc/arch/hppa64/gen/flt_rounds.c b/lib/libc/arch/hppa64/gen/flt_rounds.c index fe5274863ef..2947ce7e5c0 100644 --- a/lib/libc/arch/hppa64/gen/flt_rounds.c +++ b/lib/libc/arch/hppa64/gen/flt_rounds.c @@ -1,4 +1,4 @@ -/* $OpenBSD: flt_rounds.c,v 1.2 2012/06/25 17:01:10 deraadt Exp $ */ +/* $OpenBSD: flt_rounds.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain. @@ -19,6 +19,6 @@ __flt_rounds() { u_int64_t fpsr; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); return map[(fpsr >> 41) & 0x03]; } diff --git a/lib/libc/arch/hppa64/gen/fpgetmask.c b/lib/libc/arch/hppa64/gen/fpgetmask.c index db64a22e41b..297f3372b76 100644 --- a/lib/libc/arch/hppa64/gen/fpgetmask.c +++ b/lib/libc/arch/hppa64/gen/fpgetmask.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpgetmask.c,v 1.1 2005/04/01 10:54:27 mickey Exp $ */ +/* $OpenBSD: fpgetmask.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -12,6 +12,6 @@ fpgetmask() { u_int64_t fpsr; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); return ((fpsr >> 32) & 0x1f); } diff --git a/lib/libc/arch/hppa64/gen/fpgetround.c b/lib/libc/arch/hppa64/gen/fpgetround.c index c27df493366..4616ccbbe5a 100644 --- a/lib/libc/arch/hppa64/gen/fpgetround.c +++ b/lib/libc/arch/hppa64/gen/fpgetround.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpgetround.c,v 1.1 2005/04/01 10:54:27 mickey Exp $ */ +/* $OpenBSD: fpgetround.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -12,6 +12,6 @@ fpgetround() { u_int64_t fpsr; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); return ((fpsr >> 41) & 0x3); } diff --git a/lib/libc/arch/hppa64/gen/fpgetsticky.c b/lib/libc/arch/hppa64/gen/fpgetsticky.c index de112641fa9..c43de9bc694 100644 --- a/lib/libc/arch/hppa64/gen/fpgetsticky.c +++ b/lib/libc/arch/hppa64/gen/fpgetsticky.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpgetsticky.c,v 1.1 2005/04/01 10:54:27 mickey Exp $ */ +/* $OpenBSD: fpgetsticky.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -12,6 +12,6 @@ fpgetsticky() { u_int64_t fpsr; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); return ((fpsr >> 59) & 0x1f); } diff --git a/lib/libc/arch/hppa64/gen/fpsetmask.c b/lib/libc/arch/hppa64/gen/fpsetmask.c index 757690ea3b9..bc92959feae 100644 --- a/lib/libc/arch/hppa64/gen/fpsetmask.c +++ b/lib/libc/arch/hppa64/gen/fpsetmask.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpsetmask.c,v 1.1 2005/04/01 10:54:27 mickey Exp $ */ +/* $OpenBSD: fpsetmask.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -14,9 +14,9 @@ fpsetmask(mask) u_int64_t fpsr; fp_except old; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m"(fpsr) : "r"(&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m"(fpsr) : "r"(&fpsr)); old = (fpsr >> 32) & 0x1f; fpsr = (fpsr & 0xffffffe000000000LL) | ((u_int64_t)(mask & 0x1f) << 32); - __asm__ __volatile__("fldd 0(%0),%%fr0" : : "r"(&fpsr)); + __asm__ volatile("fldd 0(%0),%%fr0" : : "r"(&fpsr)); return (old); } diff --git a/lib/libc/arch/hppa64/gen/fpsetround.c b/lib/libc/arch/hppa64/gen/fpsetround.c index c64cd406bc8..17879c9c265 100644 --- a/lib/libc/arch/hppa64/gen/fpsetround.c +++ b/lib/libc/arch/hppa64/gen/fpsetround.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpsetround.c,v 1.1 2005/04/01 10:54:27 mickey Exp $ */ +/* $OpenBSD: fpsetround.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -14,10 +14,10 @@ fpsetround(rnd_dir) u_int64_t fpsr; fp_rnd old; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); old = (fpsr >> 41) & 0x03; fpsr = (fpsr & 0xfffff9ff00000000LL) | ((u_int64_t)(rnd_dir & 0x03) << 41); - __asm__ __volatile__("fldd 0(%0),%%fr0" : : "r" (&fpsr)); + __asm__ volatile("fldd 0(%0),%%fr0" : : "r" (&fpsr)); return (old); } diff --git a/lib/libc/arch/hppa64/gen/fpsetsticky.c b/lib/libc/arch/hppa64/gen/fpsetsticky.c index c2b1c263964..3b4bb46a94f 100644 --- a/lib/libc/arch/hppa64/gen/fpsetsticky.c +++ b/lib/libc/arch/hppa64/gen/fpsetsticky.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpsetsticky.c,v 1.2 2011/04/23 21:40:52 martynas Exp $ */ +/* $OpenBSD: fpsetsticky.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Miodrag Vallat. Public domain @@ -14,9 +14,9 @@ fpsetsticky(mask) u_int64_t fpsr; fp_except old; - __asm__ __volatile__("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); + __asm__ volatile("fstd %%fr0,0(%1)" : "=m" (fpsr) : "r" (&fpsr)); old = (fpsr >> 59) & 0x1f; fpsr = (fpsr & 0x07ffffff00000000LL) | ((u_int64_t)(mask & 0x1f) << 59); - __asm__ __volatile__("fldd 0(%0),%%fr0" : : "r" (&fpsr)); + __asm__ volatile("fldd 0(%0),%%fr0" : : "r" (&fpsr)); return (old); } diff --git a/lib/libc/arch/sh/gen/fabs.c b/lib/libc/arch/sh/gen/fabs.c index 32412293982..93883d56780 100644 --- a/lib/libc/arch/sh/gen/fabs.c +++ b/lib/libc/arch/sh/gen/fabs.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fabs.c,v 1.11 2013/03/28 18:09:38 martynas Exp $ */ +/* $OpenBSD: fabs.c,v 1.12 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2006 Miodrag Vallat. * @@ -27,7 +27,7 @@ double fabs(double d) { #if defined(__SH4__) && !defined(__SH4_NOFPU__) - __asm__ __volatile__("fabs %0" : "+f" (d)); + __asm__ volatile("fabs %0" : "+f" (d)); #else struct ieee_double *p = (struct ieee_double *)&d; diff --git a/lib/libc/arch/sh/gen/flt_rounds.c b/lib/libc/arch/sh/gen/flt_rounds.c index 67687ef74a9..ae4b588223f 100644 --- a/lib/libc/arch/sh/gen/flt_rounds.c +++ b/lib/libc/arch/sh/gen/flt_rounds.c @@ -1,4 +1,4 @@ -/* $OpenBSD: flt_rounds.c,v 1.3 2012/06/25 17:01:11 deraadt Exp $ */ +/* $OpenBSD: flt_rounds.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2006 Miodrag Vallat. * @@ -33,7 +33,7 @@ __flt_rounds() #if !defined(SOFTFLOAT) register_t fpscr; - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); return rndmap[fpscr & 0x03]; #else return rndmap[fpgetround()]; diff --git a/lib/libc/arch/sh/gen/fpgetmask.c b/lib/libc/arch/sh/gen/fpgetmask.c index b062a3aab1f..30a2e32c439 100644 --- a/lib/libc/arch/sh/gen/fpgetmask.c +++ b/lib/libc/arch/sh/gen/fpgetmask.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpgetmask.c,v 1.1.1.1 2006/10/10 22:07:10 miod Exp $ */ +/* $OpenBSD: fpgetmask.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2006 Miodrag Vallat. * @@ -24,6 +24,6 @@ fpgetmask() { register_t fpscr; - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); return ((fpscr >> 7) & 0x1f); } diff --git a/lib/libc/arch/sh/gen/fpgetround.c b/lib/libc/arch/sh/gen/fpgetround.c index d3bf8d55da5..3f45ea139ed 100644 --- a/lib/libc/arch/sh/gen/fpgetround.c +++ b/lib/libc/arch/sh/gen/fpgetround.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpgetround.c,v 1.1.1.1 2006/10/10 22:07:10 miod Exp $ */ +/* $OpenBSD: fpgetround.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2006 Miodrag Vallat. * @@ -24,6 +24,6 @@ fpgetround() { register_t fpscr; - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); return (fpscr & 0x3); } diff --git a/lib/libc/arch/sh/gen/fpgetsticky.c b/lib/libc/arch/sh/gen/fpgetsticky.c index a8e65136d2e..a93761235e4 100644 --- a/lib/libc/arch/sh/gen/fpgetsticky.c +++ b/lib/libc/arch/sh/gen/fpgetsticky.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpgetsticky.c,v 1.1.1.1 2006/10/10 22:07:10 miod Exp $ */ +/* $OpenBSD: fpgetsticky.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2006 Miodrag Vallat. * @@ -24,6 +24,6 @@ fpgetsticky() { register_t fpscr; - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); return ((fpscr >> 2) & 0x1f); } diff --git a/lib/libc/arch/sh/gen/fpsetmask.c b/lib/libc/arch/sh/gen/fpsetmask.c index 122d9d36e70..117f27e5eab 100644 --- a/lib/libc/arch/sh/gen/fpsetmask.c +++ b/lib/libc/arch/sh/gen/fpsetmask.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpsetmask.c,v 1.2 2007/03/02 06:11:54 miod Exp $ */ +/* $OpenBSD: fpsetmask.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2006 Miodrag Vallat. * @@ -29,8 +29,8 @@ fpsetmask(fp_except mask) __fpscr_values[0] = (__fpscr_values[0] & ~(0x1f << 7)) | (mask << 7); __fpscr_values[1] = (__fpscr_values[1] & ~(0x1f << 7)) | (mask << 7); #endif - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); nfpscr = (fpscr & ~(0x1f << 7)) | (mask << 7); - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (nfpscr)); + __asm__ volatile ("lds %0, fpscr" : : "r" (nfpscr)); return ((fpscr >> 7) & 0x1f); } diff --git a/lib/libc/arch/sh/gen/fpsetround.c b/lib/libc/arch/sh/gen/fpsetround.c index 9090f647fce..2462a3f4b32 100644 --- a/lib/libc/arch/sh/gen/fpsetround.c +++ b/lib/libc/arch/sh/gen/fpsetround.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpsetround.c,v 1.2 2007/03/02 06:11:54 miod Exp $ */ +/* $OpenBSD: fpsetround.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2006 Miodrag Vallat. * @@ -27,14 +27,14 @@ fpsetround(fp_rnd rnd_dir) extern register_t __fpscr_values[2]; #endif - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); if (rnd_dir == FP_RN || rnd_dir == FP_RZ) { nfpscr = (fpscr & ~0x03) | rnd_dir; #if defined(__SH4__) && !defined(__SH4_NOFPU__) __fpscr_values[0] = (__fpscr_values[0] & ~0x03) | rnd_dir; __fpscr_values[1] = (__fpscr_values[1] & ~0x03) | rnd_dir; #endif - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (nfpscr)); + __asm__ volatile ("lds %0, fpscr" : : "r" (nfpscr)); } /* else how report an error? */ diff --git a/lib/libc/arch/sh/gen/fpsetsticky.c b/lib/libc/arch/sh/gen/fpsetsticky.c index 09f13bb94b5..c87da34f2d8 100644 --- a/lib/libc/arch/sh/gen/fpsetsticky.c +++ b/lib/libc/arch/sh/gen/fpsetsticky.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpsetsticky.c,v 1.2 2007/03/02 06:11:54 miod Exp $ */ +/* $OpenBSD: fpsetsticky.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2006 Miodrag Vallat. * @@ -29,8 +29,8 @@ fpsetsticky(fp_except mask) __fpscr_values[0] = (__fpscr_values[0] & ~(0x1f << 2)) | (mask << 2); __fpscr_values[1] = (__fpscr_values[1] & ~(0x1f << 2)) | (mask << 2); #endif - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); nfpscr = (fpscr & ~(0x1f << 2)) | (mask << 2); - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (nfpscr)); + __asm__ volatile ("lds %0, fpscr" : : "r" (nfpscr)); return ((fpscr >> 2) & 0x1f); } diff --git a/lib/libm/arch/alpha/fenv.c b/lib/libm/arch/alpha/fenv.c index fa1758104d9..348638b7dc0 100644 --- a/lib/libm/arch/alpha/fenv.c +++ b/lib/libm/arch/alpha/fenv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv.c,v 1.2 2011/04/28 17:34:23 martynas Exp $ */ +/* $OpenBSD: fenv.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2011 Martynas Venckus @@ -150,9 +150,9 @@ fegetround(void) unsigned long fpcr; /* Store the current floating-point control register */ - __asm__ __volatile__ ("trapb"); - __asm__ __volatile__ ("mf_fpcr %0" : "=f" (fpcr)); - __asm__ __volatile__ ("trapb"); + __asm__ volatile ("trapb"); + __asm__ volatile ("mf_fpcr %0" : "=f" (fpcr)); + __asm__ volatile ("trapb"); return ((fpcr >> _ROUND_SHIFT) & _ROUND_MASK); } @@ -172,18 +172,18 @@ fesetround(int round) return (-1); /* Store the current floating-point control register */ - __asm__ __volatile__ ("trapb"); - __asm__ __volatile__ ("mf_fpcr %0" : "=f" (fpcr)); - __asm__ __volatile__ ("trapb"); + __asm__ volatile ("trapb"); + __asm__ volatile ("mf_fpcr %0" : "=f" (fpcr)); + __asm__ volatile ("trapb"); /* Set the rounding direction */ fpcr &= ~((unsigned long)_ROUND_MASK << _ROUND_SHIFT); fpcr |= (unsigned long)round << _ROUND_SHIFT; /* Load the floating-point control register */ - __asm__ __volatile__ ("trapb"); - __asm__ __volatile__ ("mt_fpcr %0" : : "f" (fpcr)); - __asm__ __volatile__ ("trapb"); + __asm__ volatile ("trapb"); + __asm__ volatile ("mt_fpcr %0" : : "f" (fpcr)); + __asm__ volatile ("trapb"); return (0); } @@ -204,9 +204,9 @@ fegetenv(fenv_t *envp) envp->__mask = sysarch(ALPHA_FPGETMASK, 0L) & FE_ALL_EXCEPT; /* Store the current floating-point control register */ - __asm__ __volatile__ ("trapb"); - __asm__ __volatile__ ("mf_fpcr %0" : "=f" (fpcr)); - __asm__ __volatile__ ("trapb"); + __asm__ volatile ("trapb"); + __asm__ volatile ("mf_fpcr %0" : "=f" (fpcr)); + __asm__ volatile ("trapb"); envp->__round = (fpcr >> _ROUND_SHIFT) & _ROUND_MASK; return (0); @@ -260,18 +260,18 @@ fesetenv(const fenv_t *envp) sysarch(ALPHA_FPSETMASK, &a); /* Store the current floating-point control register */ - __asm__ __volatile__ ("trapb"); - __asm__ __volatile__ ("mf_fpcr %0" : "=f" (fpcr)); - __asm__ __volatile__ ("trapb"); + __asm__ volatile ("trapb"); + __asm__ volatile ("mf_fpcr %0" : "=f" (fpcr)); + __asm__ volatile ("trapb"); /* Set the requested flags */ fpcr &= ~((unsigned long)_ROUND_MASK << _ROUND_SHIFT); fpcr |= ((unsigned long)envp->__round & _ROUND_MASK) << _ROUND_SHIFT; /* Load the floating-point control register */ - __asm__ __volatile__ ("trapb"); - __asm__ __volatile__ ("mt_fpcr %0" : : "f" (fpcr)); - __asm__ __volatile__ ("trapb"); + __asm__ volatile ("trapb"); + __asm__ volatile ("mt_fpcr %0" : : "f" (fpcr)); + __asm__ volatile ("trapb"); return (0); } diff --git a/lib/libm/arch/amd64/fenv.c b/lib/libm/arch/amd64/fenv.c index 7ad3be7828e..708259d4d35 100644 --- a/lib/libm/arch/amd64/fenv.c +++ b/lib/libm/arch/amd64/fenv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:02 deraadt Exp $ */ +/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */ /* $NetBSD: fenv.c,v 1.1 2010/07/31 21:47:53 joerg Exp $ */ /*- @@ -71,18 +71,18 @@ feclearexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current x87 floating-point environment */ - __asm__ __volatile__ ("fnstenv %0" : "=m" (fenv)); + __asm__ volatile ("fnstenv %0" : "=m" (fenv)); /* Clear the requested floating-point exceptions */ fenv.__x87.__status &= ~excepts; /* Load the x87 floating-point environent */ - __asm__ __volatile__ ("fldenv %0" : : "m" (fenv)); + __asm__ volatile ("fldenv %0" : : "m" (fenv)); /* Same for SSE environment */ - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); mxcsr &= ~excepts; - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); return (0); } @@ -101,10 +101,10 @@ fegetexceptflag(fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current x87 status register */ - __asm__ __volatile__ ("fnstsw %0" : "=am" (status)); + __asm__ volatile ("fnstsw %0" : "=am" (status)); /* Store the MXCSR register */ - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); /* Store the results in flagp */ *flagp = (status | mxcsr) & excepts; @@ -128,7 +128,7 @@ feraiseexcept(int excepts) excepts &= FE_ALL_EXCEPT; fesetexceptflag((fexcept_t *)&excepts, excepts); - __asm__ __volatile__ ("fwait"); + __asm__ volatile ("fwait"); return (0); } @@ -147,20 +147,20 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current x87 floating-point environment */ - __asm__ __volatile__ ("fnstenv %0" : "=m" (fenv)); + __asm__ volatile ("fnstenv %0" : "=m" (fenv)); /* Set the requested status flags */ fenv.__x87.__status &= ~excepts; fenv.__x87.__status |= *flagp & excepts; /* Load the x87 floating-point environent */ - __asm__ __volatile__ ("fldenv %0" : : "m" (fenv)); + __asm__ volatile ("fldenv %0" : : "m" (fenv)); /* Same for SSE environment */ - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); mxcsr &= ~excepts; mxcsr |= *flagp & excepts; - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); return (0); } @@ -179,10 +179,10 @@ fetestexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current x87 status register */ - __asm__ __volatile__ ("fnstsw %0" : "=am" (status)); + __asm__ volatile ("fnstsw %0" : "=am" (status)); /* Store the MXCSR register state */ - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); return ((status | mxcsr) & excepts); } @@ -201,7 +201,7 @@ fegetround(void) * out to be about 5 times faster than reading it on the SSE * unit on an Opteron 244. */ - __asm__ __volatile__ ("fnstcw %0" : "=m" (control)); + __asm__ volatile ("fnstcw %0" : "=m" (control)); return (control & _X87_ROUND_MASK); } @@ -222,20 +222,20 @@ fesetround(int round) return (-1); /* Store the current x87 control word register */ - __asm__ __volatile__ ("fnstcw %0" : "=m" (control)); + __asm__ volatile ("fnstcw %0" : "=m" (control)); /* Set the rounding direction */ control &= ~_X87_ROUND_MASK; control |= round; /* Load the x87 control word register */ - __asm__ __volatile__ ("fldcw %0" : : "m" (control)); + __asm__ volatile ("fldcw %0" : : "m" (control)); /* Same for the SSE environment */ - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); mxcsr &= ~(_X87_ROUND_MASK << _SSE_ROUND_SHIFT); mxcsr |= round << _SSE_ROUND_SHIFT; - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); return (0); } @@ -248,10 +248,10 @@ int fegetenv(fenv_t *envp) { /* Store the current x87 floating-point environment */ - __asm__ __volatile__ ("fnstenv %0" : "=m" (*envp)); + __asm__ volatile ("fnstenv %0" : "=m" (*envp)); /* Store the MXCSR register state */ - __asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr)); /* * When an FNSTENV instruction is executed, all pending exceptions are @@ -261,7 +261,7 @@ fegetenv(fenv_t *envp) * 8.6 X87 FPU EXCEPTION SYNCHRONIZATION - * Intel(R) 64 and IA-32 Architectures Softare Developer's Manual - Vol1 */ - __asm__ __volatile__ ("fldcw %0" : : "m" (envp->__x87.__control)); + __asm__ volatile ("fldcw %0" : : "m" (envp->__x87.__control)); return (0); } @@ -278,13 +278,13 @@ feholdexcept(fenv_t *envp) unsigned int mxcsr; /* Store the current x87 floating-point environment */ - __asm__ __volatile__ ("fnstenv %0" : "=m" (*envp)); + __asm__ volatile ("fnstenv %0" : "=m" (*envp)); /* Clear all exception flags in FPU */ - __asm__ __volatile__ ("fnclex"); + __asm__ volatile ("fnclex"); /* Store the MXCSR register state */ - __asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr)); /* Clear exception flags in MXCSR */ mxcsr = envp->__mxcsr; @@ -294,7 +294,7 @@ feholdexcept(fenv_t *envp) mxcsr |= FE_ALL_EXCEPT << _SSE_MASK_SHIFT; /* Store the MXCSR register */ - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); return (0); } @@ -311,10 +311,10 @@ int fesetenv(const fenv_t *envp) { /* Load the x87 floating-point environent */ - __asm__ __volatile__ ("fldenv %0" : : "m" (*envp)); + __asm__ volatile ("fldenv %0" : : "m" (*envp)); /* Store the MXCSR register */ - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (envp->__mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (envp->__mxcsr)); return (0); } @@ -334,10 +334,10 @@ feupdateenv(const fenv_t *envp) unsigned int mxcsr; /* Store the x87 status register */ - __asm__ __volatile__ ("fnstsw %0" : "=am" (status)); + __asm__ volatile ("fnstsw %0" : "=am" (status)); /* Store the MXCSR register */ - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); /* Install new floating-point environment */ fesetenv(envp); @@ -359,15 +359,15 @@ feenableexcept(int mask) mask &= FE_ALL_EXCEPT; - __asm__ __volatile__ ("fnstcw %0" : "=m" (control)); - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("fnstcw %0" : "=m" (control)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT; control &= ~mask; - __asm__ __volatile__ ("fldcw %0" : : "m" (control)); + __asm__ volatile ("fldcw %0" : : "m" (control)); mxcsr &= ~(mask << _SSE_MASK_SHIFT); - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); return (omask); } @@ -380,15 +380,15 @@ fedisableexcept(int mask) mask &= FE_ALL_EXCEPT; - __asm__ __volatile__ ("fnstcw %0" : "=m" (control)); - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("fnstcw %0" : "=m" (control)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT; control |= mask; - __asm__ __volatile__ ("fldcw %0" : : "m" (control)); + __asm__ volatile ("fldcw %0" : : "m" (control)); mxcsr |= mask << _SSE_MASK_SHIFT; - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); return (omask); } @@ -402,7 +402,7 @@ fegetexcept(void) * We assume that the masks for the x87 and the SSE unit are * the same. */ - __asm__ __volatile__ ("fnstcw %0" : "=m" (control)); + __asm__ volatile ("fnstcw %0" : "=m" (control)); return (~control & FE_ALL_EXCEPT); } diff --git a/lib/libm/arch/hppa/e_remainder.c b/lib/libm/arch/hppa/e_remainder.c index e3de8e93684..4378752fb1c 100644 --- a/lib/libm/arch/hppa/e_remainder.c +++ b/lib/libm/arch/hppa/e_remainder.c @@ -7,7 +7,7 @@ double remainder(double x, double p) { - __asm__ __volatile__("frem,dbl %0,%1,%0" : "+f" (x) : "f" (p)); + __asm__ volatile("frem,dbl %0,%1,%0" : "+f" (x) : "f" (p)); return (x); } diff --git a/lib/libm/arch/hppa/e_remainderf.c b/lib/libm/arch/hppa/e_remainderf.c index 6799b4dc58d..0c5a8a4d608 100644 --- a/lib/libm/arch/hppa/e_remainderf.c +++ b/lib/libm/arch/hppa/e_remainderf.c @@ -7,7 +7,7 @@ float remainderf(float x, float p) { - __asm__ __volatile__("frem,sgl %0,%1,%0" : "+f" (x) : "f" (p)); + __asm__ volatile("frem,sgl %0,%1,%0" : "+f" (x) : "f" (p)); return (x); } diff --git a/lib/libm/arch/hppa/e_sqrt.c b/lib/libm/arch/hppa/e_sqrt.c index fe7404253fc..2f7ecae333a 100644 --- a/lib/libm/arch/hppa/e_sqrt.c +++ b/lib/libm/arch/hppa/e_sqrt.c @@ -8,7 +8,7 @@ double sqrt(double x) { - __asm__ __volatile__ ("fsqrt,dbl %0, %0" : "+f" (x)); + __asm__ volatile ("fsqrt,dbl %0, %0" : "+f" (x)); return (x); } diff --git a/lib/libm/arch/hppa/e_sqrtf.c b/lib/libm/arch/hppa/e_sqrtf.c index 168ad7a1d0d..d01c502d023 100644 --- a/lib/libm/arch/hppa/e_sqrtf.c +++ b/lib/libm/arch/hppa/e_sqrtf.c @@ -7,6 +7,6 @@ float sqrtf(float x) { - __asm__ __volatile__ ("fsqrt,sgl %0, %0" : "+f" (x)); + __asm__ volatile ("fsqrt,sgl %0, %0" : "+f" (x)); return (x); } diff --git a/lib/libm/arch/hppa/fenv.c b/lib/libm/arch/hppa/fenv.c index 931c62218fa..2cd20e30bd2 100644 --- a/lib/libm/arch/hppa/fenv.c +++ b/lib/libm/arch/hppa/fenv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:02 deraadt Exp $ */ +/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2011 Martynas Venckus @@ -46,14 +46,14 @@ feclearexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); /* Clear the requested floating-point exceptions */ u.bits[0] &= ~(excepts << _MASK_SHIFT); /* Load the floating-point status register */ - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (0); } @@ -71,7 +71,7 @@ fegetexceptflag(fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); /* Store the results in flagp */ @@ -118,7 +118,7 @@ feraiseexcept(int excepts) d = 0x1p-1022; d += 1.0; } - __asm__ __volatile__ ("fldd 0(%%sr0,%%sp), %0" : "=f" (d)); + __asm__ volatile ("fldd 0(%%sr0,%%sp), %0" : "=f" (d)); return (0); } @@ -136,7 +136,7 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); /* Set the requested status flags */ @@ -144,7 +144,7 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) u.bits[0] |= (*flagp & excepts) << _MASK_SHIFT; /* Load the floating-point status register */ - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (0); } @@ -162,7 +162,7 @@ fetestexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); return ((u.bits[0] >> _MASK_SHIFT) & excepts); @@ -177,7 +177,7 @@ fegetround(void) volatile union u u; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); return (u.bits[0] & _ROUND_MASK); @@ -198,7 +198,7 @@ fesetround(int round) return (-1); /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); /* Set the rounding direction */ @@ -206,7 +206,7 @@ fesetround(int round) u.bits[0] |= round; /* Load the floating-point status register */ - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (0); } @@ -221,7 +221,7 @@ fegetenv(fenv_t *envp) volatile union u u; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); *envp = u.bits[0]; @@ -241,7 +241,7 @@ feholdexcept(fenv_t *envp) volatile union u u; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); *envp = u.bits[0]; @@ -251,7 +251,7 @@ feholdexcept(fenv_t *envp) /* Mask all exceptions */ u.bits[0] &= ~FE_ALL_EXCEPT; - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (0); } @@ -270,7 +270,7 @@ fesetenv(const fenv_t *envp) volatile union u u; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); /* Set the requested flags */ @@ -280,7 +280,7 @@ fesetenv(const fenv_t *envp) (FE_ALL_EXCEPT << _MASK_SHIFT)); /* Load the floating-point status register */ - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (0); } @@ -299,7 +299,7 @@ feupdateenv(const fenv_t *envp) volatile union u u; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); /* Install new floating-point environment */ @@ -323,14 +323,14 @@ feenableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); omask = u.bits[0] & FE_ALL_EXCEPT; u.bits[0] |= mask; /* Load the floating-point status register */ - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (omask); @@ -345,14 +345,14 @@ fedisableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); omask = u.bits[0] & FE_ALL_EXCEPT; u.bits[0] &= ~mask; /* Load the floating-point status register */ - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (omask); } @@ -363,7 +363,7 @@ fegetexcept(void) volatile union u u; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); return (u.bits[0] & FE_ALL_EXCEPT); diff --git a/lib/libm/arch/hppa/s_ceil.c b/lib/libm/arch/hppa/s_ceil.c index ca160a1ed4e..c21cb83de18 100644 --- a/lib/libm/arch/hppa/s_ceil.c +++ b/lib/libm/arch/hppa/s_ceil.c @@ -11,14 +11,14 @@ ceil(double x) { u_int64_t ofpsr, fpsr; - __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); fpsr = (ofpsr & ~((u_int64_t)FP_RM << (9 + 32))) | ((u_int64_t)FP_RP << (9 + 32)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); - __asm__ __volatile__("frnd,dbl %0,%0" : "+f" (x)); + __asm__ volatile("frnd,dbl %0,%0" : "+f" (x)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); return (x); } diff --git a/lib/libm/arch/hppa/s_ceilf.c b/lib/libm/arch/hppa/s_ceilf.c index f72a14f4ec1..84ef3f1d70e 100644 --- a/lib/libm/arch/hppa/s_ceilf.c +++ b/lib/libm/arch/hppa/s_ceilf.c @@ -11,13 +11,13 @@ ceilf(float x) { u_int64_t ofpsr, fpsr; - __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); fpsr = (ofpsr & ~((u_int64_t)FP_RM << (9 + 32))) | ((u_int64_t)FP_RP << (9 + 32)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); - __asm__ __volatile__("frnd,sgl %0,%0" : "+f" (x)); + __asm__ volatile("frnd,sgl %0,%0" : "+f" (x)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); return (x); } diff --git a/lib/libm/arch/hppa/s_floor.c b/lib/libm/arch/hppa/s_floor.c index d1d649e1ff0..8bfb3f9f843 100644 --- a/lib/libm/arch/hppa/s_floor.c +++ b/lib/libm/arch/hppa/s_floor.c @@ -11,13 +11,13 @@ floor(double x) { u_int64_t ofpsr, fpsr; - __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); fpsr = ofpsr | ((u_int64_t)FP_RM << (9 + 32)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); - __asm__ __volatile__("frnd,dbl %0,%0" : "+f" (x)); + __asm__ volatile("frnd,dbl %0,%0" : "+f" (x)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); return (x); } diff --git a/lib/libm/arch/hppa/s_floorf.c b/lib/libm/arch/hppa/s_floorf.c index d3e19684960..02f1fead0f8 100644 --- a/lib/libm/arch/hppa/s_floorf.c +++ b/lib/libm/arch/hppa/s_floorf.c @@ -11,12 +11,12 @@ floorf(float x) { u_int64_t ofpsr, fpsr; - __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); fpsr = ofpsr | ((u_int64_t)FP_RM << (9 + 32)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); - __asm__ __volatile__("frnd,sgl %0,%0" : "+f" (x)); + __asm__ volatile("frnd,sgl %0,%0" : "+f" (x)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); return (x); } diff --git a/lib/libm/arch/hppa/s_rint.c b/lib/libm/arch/hppa/s_rint.c index 5ca29d95bf0..579422e2ef0 100644 --- a/lib/libm/arch/hppa/s_rint.c +++ b/lib/libm/arch/hppa/s_rint.c @@ -8,7 +8,7 @@ double rint(double x) { - __asm__ __volatile__("frnd,dbl %0,%0" : "+f" (x)); + __asm__ volatile("frnd,dbl %0,%0" : "+f" (x)); return (x); } diff --git a/lib/libm/arch/hppa/s_rintf.c b/lib/libm/arch/hppa/s_rintf.c index 89f749819db..48fbccb0cad 100644 --- a/lib/libm/arch/hppa/s_rintf.c +++ b/lib/libm/arch/hppa/s_rintf.c @@ -7,7 +7,7 @@ float rintf(float x) { - __asm__ __volatile__("frnd,sgl %0,%0" : "+f" (x)); + __asm__ volatile("frnd,sgl %0,%0" : "+f" (x)); return (x); } diff --git a/lib/libm/arch/hppa/s_round.c b/lib/libm/arch/hppa/s_round.c index 123d49aa9d4..d61502a33e7 100644 --- a/lib/libm/arch/hppa/s_round.c +++ b/lib/libm/arch/hppa/s_round.c @@ -11,14 +11,14 @@ round(double x) { u_int64_t ofpsr, fpsr; - __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); fpsr = (ofpsr & ~((u_int64_t)FP_RM << (9 + 32))) | ((u_int64_t)FP_RN << (9 + 32)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); - __asm__ __volatile__("frnd,dbl %0,%0" : "+f" (x)); + __asm__ volatile("frnd,dbl %0,%0" : "+f" (x)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); return (x); } diff --git a/lib/libm/arch/hppa/s_roundf.c b/lib/libm/arch/hppa/s_roundf.c index c7ed8e4c5b6..cbc2629d445 100644 --- a/lib/libm/arch/hppa/s_roundf.c +++ b/lib/libm/arch/hppa/s_roundf.c @@ -11,13 +11,13 @@ roundf(float x) { u_int64_t ofpsr, fpsr; - __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); fpsr = (ofpsr & ~((u_int64_t)FP_RM << (9 + 32))) | ((u_int64_t)FP_RN << (9 + 32)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); - __asm__ __volatile__("frnd,sgl %0,%0" : "+f" (x)); + __asm__ volatile("frnd,sgl %0,%0" : "+f" (x)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); return (x); } diff --git a/lib/libm/arch/hppa/s_trunc.c b/lib/libm/arch/hppa/s_trunc.c index 60da77b780d..bdcf87b111b 100644 --- a/lib/libm/arch/hppa/s_trunc.c +++ b/lib/libm/arch/hppa/s_trunc.c @@ -11,14 +11,14 @@ trunc(double x) { u_int64_t ofpsr, fpsr; - __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); fpsr = (ofpsr & ~((u_int64_t)FP_RM << (9 + 32))) | ((u_int64_t)FP_RZ << (9 + 32)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); - __asm__ __volatile__("frnd,dbl %0,%0" : "+f" (x)); + __asm__ volatile("frnd,dbl %0,%0" : "+f" (x)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); return (x); } diff --git a/lib/libm/arch/hppa/s_truncf.c b/lib/libm/arch/hppa/s_truncf.c index bc034b4ca79..d9c1f6c7718 100644 --- a/lib/libm/arch/hppa/s_truncf.c +++ b/lib/libm/arch/hppa/s_truncf.c @@ -11,13 +11,13 @@ truncf(float x) { u_int64_t ofpsr, fpsr; - __asm__ __volatile__("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fstds %%fr0,0(%0)" :: "r" (&ofpsr) : "memory"); fpsr = (ofpsr & ~((u_int64_t)FP_RM << (9 + 32))) | ((u_int64_t)FP_RZ << (9 + 32)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&fpsr) : "memory"); - __asm__ __volatile__("frnd,sgl %0,%0" : "+f" (x)); + __asm__ volatile("frnd,sgl %0,%0" : "+f" (x)); - __asm__ __volatile__("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); + __asm__ volatile("fldds 0(%0), %%fr0" :: "r" (&ofpsr) : "memory"); return (x); } diff --git a/lib/libm/arch/hppa64/fenv.c b/lib/libm/arch/hppa64/fenv.c index 62590cce4ca..432ccff2aef 100644 --- a/lib/libm/arch/hppa64/fenv.c +++ b/lib/libm/arch/hppa64/fenv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv.c,v 1.2 2012/12/05 23:20:02 deraadt Exp $ */ +/* $OpenBSD: fenv.c,v 1.3 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2011 Martynas Venckus @@ -46,14 +46,14 @@ feclearexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); /* Clear the requested floating-point exceptions */ u.bits[0] &= ~(excepts << _MASK_SHIFT); /* Load the floating-point status register */ - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (0); } @@ -71,7 +71,7 @@ fegetexceptflag(fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); /* Store the results in flagp */ @@ -118,7 +118,7 @@ feraiseexcept(int excepts) d = 0x1p-1022; d += 1.0; } - __asm__ __volatile__ ("fldd 0(%%sr0,%%sp), %0" : "=f" (d)); + __asm__ volatile ("fldd 0(%%sr0,%%sp), %0" : "=f" (d)); return (0); } @@ -136,7 +136,7 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); /* Set the requested status flags */ @@ -144,7 +144,7 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) u.bits[0] |= (*flagp & excepts) << _MASK_SHIFT; /* Load the floating-point status register */ - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (0); } @@ -162,7 +162,7 @@ fetestexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); return ((u.bits[0] >> _MASK_SHIFT) & excepts); @@ -177,7 +177,7 @@ fegetround(void) volatile union u u; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); return (u.bits[0] & _ROUND_MASK); @@ -198,7 +198,7 @@ fesetround(int round) return (-1); /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); /* Set the rounding direction */ @@ -206,7 +206,7 @@ fesetround(int round) u.bits[0] |= round; /* Load the floating-point status register */ - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (0); } @@ -221,7 +221,7 @@ fegetenv(fenv_t *envp) volatile union u u; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); *envp = u.bits[0]; @@ -241,7 +241,7 @@ feholdexcept(fenv_t *envp) volatile union u u; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); *envp = u.bits[0]; @@ -251,7 +251,7 @@ feholdexcept(fenv_t *envp) /* Mask all exceptions */ u.bits[0] &= ~FE_ALL_EXCEPT; - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (0); } @@ -270,7 +270,7 @@ fesetenv(const fenv_t *envp) volatile union u u; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); /* Set the requested flags */ @@ -280,7 +280,7 @@ fesetenv(const fenv_t *envp) (FE_ALL_EXCEPT << _MASK_SHIFT)); /* Load the floating-point status register */ - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (0); } @@ -299,7 +299,7 @@ feupdateenv(const fenv_t *envp) volatile union u u; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); /* Install new floating-point environment */ @@ -323,14 +323,14 @@ feenableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); omask = u.bits[0] & FE_ALL_EXCEPT; u.bits[0] |= mask; /* Load the floating-point status register */ - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (omask); @@ -345,14 +345,14 @@ fedisableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); omask = u.bits[0] & FE_ALL_EXCEPT; u.bits[0] &= ~mask; /* Load the floating-point status register */ - __asm__ __volatile__ ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); + __asm__ volatile ("fldd 0(%0), %%fr0" : : "r" (&u.fpsr)); return (omask); } @@ -363,7 +363,7 @@ fegetexcept(void) volatile union u u; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : + __asm__ volatile ("fstd %%fr0, 0(%1)" : "=m" (u.fpsr) : "r" (&u.fpsr)); return (u.bits[0] & FE_ALL_EXCEPT); diff --git a/lib/libm/arch/i387/fenv.c b/lib/libm/arch/i387/fenv.c index c0827c1173b..7e5e5e38383 100644 --- a/lib/libm/arch/i387/fenv.c +++ b/lib/libm/arch/i387/fenv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:02 deraadt Exp $ */ +/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */ /* $NetBSD: fenv.c,v 1.3 2010/08/01 06:34:38 taca Exp $ */ /*- @@ -100,19 +100,19 @@ feclearexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current x87 floating-point environment */ - __asm__ __volatile__ ("fnstenv %0" : "=m" (fenv)); + __asm__ volatile ("fnstenv %0" : "=m" (fenv)); /* Clear the requested floating-point exceptions */ fenv.__x87.__status &= ~excepts; /* Load the x87 floating-point environent */ - __asm__ __volatile__ ("fldenv %0" : : "m" (fenv)); + __asm__ volatile ("fldenv %0" : : "m" (fenv)); /* Same for SSE environment */ if (__HAS_SSE) { - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); mxcsr &= ~excepts; - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); } return (0); @@ -132,11 +132,11 @@ fegetexceptflag(fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current x87 status register */ - __asm__ __volatile__ ("fnstsw %0" : "=am" (status)); + __asm__ volatile ("fnstsw %0" : "=am" (status)); /* Store the MXCSR register */ if (__HAS_SSE) - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); /* Store the results in flagp */ *flagp = (status | mxcsr) & excepts; @@ -160,7 +160,7 @@ feraiseexcept(int excepts) excepts &= FE_ALL_EXCEPT; fesetexceptflag((fexcept_t *)&excepts, excepts); - __asm__ __volatile__ ("fwait"); + __asm__ volatile ("fwait"); return (0); } @@ -179,21 +179,21 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current x87 floating-point environment */ - __asm__ __volatile__ ("fnstenv %0" : "=m" (fenv)); + __asm__ volatile ("fnstenv %0" : "=m" (fenv)); /* Set the requested status flags */ fenv.__x87.__status &= ~excepts; fenv.__x87.__status |= *flagp & excepts; /* Load the x87 floating-point environent */ - __asm__ __volatile__ ("fldenv %0" : : "m" (fenv)); + __asm__ volatile ("fldenv %0" : : "m" (fenv)); /* Same for SSE environment */ if (__HAS_SSE) { - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); mxcsr &= ~excepts; mxcsr |= *flagp & excepts; - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); } return (0); @@ -213,11 +213,11 @@ fetestexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current x87 status register */ - __asm__ __volatile__ ("fnstsw %0" : "=am" (status)); + __asm__ volatile ("fnstsw %0" : "=am" (status)); /* Store the MXCSR register state */ if (__HAS_SSE) - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); return ((status | mxcsr) & excepts); } @@ -236,7 +236,7 @@ fegetround(void) * out to be about 5 times faster than reading it on the SSE * unit on an Opteron 244. */ - __asm__ __volatile__ ("fnstcw %0" : "=m" (control)); + __asm__ volatile ("fnstcw %0" : "=m" (control)); return (control & _X87_ROUND_MASK); } @@ -257,21 +257,21 @@ fesetround(int round) return (-1); /* Store the current x87 control word register */ - __asm__ __volatile__ ("fnstcw %0" : "=m" (control)); + __asm__ volatile ("fnstcw %0" : "=m" (control)); /* Set the rounding direction */ control &= ~_X87_ROUND_MASK; control |= round; /* Load the x87 control word register */ - __asm__ __volatile__ ("fldcw %0" : : "m" (control)); + __asm__ volatile ("fldcw %0" : : "m" (control)); /* Same for the SSE environment */ if (__HAS_SSE) { - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); mxcsr &= ~(_X87_ROUND_MASK << _SSE_ROUND_SHIFT); mxcsr |= round << _SSE_ROUND_SHIFT; - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); } return (0); @@ -285,11 +285,11 @@ int fegetenv(fenv_t *envp) { /* Store the current x87 floating-point environment */ - __asm__ __volatile__ ("fnstenv %0" : "=m" (*envp)); + __asm__ volatile ("fnstenv %0" : "=m" (*envp)); /* Store the MXCSR register state */ if (__HAS_SSE) - __asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr)); /* * When an FNSTENV instruction is executed, all pending exceptions are @@ -299,7 +299,7 @@ fegetenv(fenv_t *envp) * 8.6 X87 FPU EXCEPTION SYNCHRONIZATION - * Intel(R) 64 and IA-32 Architectures Softare Developer's Manual - Vol1 */ - __asm__ __volatile__ ("fldcw %0" : : "m" (envp->__x87.__control)); + __asm__ volatile ("fldcw %0" : : "m" (envp->__x87.__control)); return (0); } @@ -316,14 +316,14 @@ feholdexcept(fenv_t *envp) unsigned int mxcsr; /* Store the current x87 floating-point environment */ - __asm__ __volatile__ ("fnstenv %0" : "=m" (*envp)); + __asm__ volatile ("fnstenv %0" : "=m" (*envp)); /* Clear all exception flags in FPU */ - __asm__ __volatile__ ("fnclex"); + __asm__ volatile ("fnclex"); if (__HAS_SSE) { /* Store the MXCSR register state */ - __asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr)); /* Clear exception flags in MXCSR */ mxcsr = envp->__mxcsr; @@ -333,7 +333,7 @@ feholdexcept(fenv_t *envp) mxcsr |= FE_ALL_EXCEPT << _SSE_MASK_SHIFT; /* Store the MXCSR register */ - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); } return (0); @@ -351,11 +351,11 @@ int fesetenv(const fenv_t *envp) { /* Load the x87 floating-point environent */ - __asm__ __volatile__ ("fldenv %0" : : "m" (*envp)); + __asm__ volatile ("fldenv %0" : : "m" (*envp)); /* Store the MXCSR register */ if (__HAS_SSE) - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (envp->__mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (envp->__mxcsr)); return (0); } @@ -375,11 +375,11 @@ feupdateenv(const fenv_t *envp) unsigned int mxcsr = 0; /* Store the x87 status register */ - __asm__ __volatile__ ("fnstsw %0" : "=am" (status)); + __asm__ volatile ("fnstsw %0" : "=am" (status)); /* Store the MXCSR register */ if (__HAS_SSE) - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); /* Install new floating-point environment */ fesetenv(envp); @@ -401,17 +401,17 @@ feenableexcept(int mask) mask &= FE_ALL_EXCEPT; - __asm__ __volatile__ ("fnstcw %0" : "=m" (control)); + __asm__ volatile ("fnstcw %0" : "=m" (control)); if (__HAS_SSE) - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT; control &= ~mask; - __asm__ __volatile__ ("fldcw %0" : : "m" (control)); + __asm__ volatile ("fldcw %0" : : "m" (control)); if (__HAS_SSE) { mxcsr &= ~(mask << _SSE_MASK_SHIFT); - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); } return (omask); @@ -425,17 +425,17 @@ fedisableexcept(int mask) mask &= FE_ALL_EXCEPT; - __asm__ __volatile__ ("fnstcw %0" : "=m" (control)); + __asm__ volatile ("fnstcw %0" : "=m" (control)); if (__HAS_SSE) - __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); + __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT; control |= mask; - __asm__ __volatile__ ("fldcw %0" : : "m" (control)); + __asm__ volatile ("fldcw %0" : : "m" (control)); if (__HAS_SSE) { mxcsr |= mask << _SSE_MASK_SHIFT; - __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); + __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); } return (omask); @@ -450,7 +450,7 @@ fegetexcept(void) * We assume that the masks for the x87 and the SSE unit are * the same. */ - __asm__ __volatile__ ("fnstcw %0" : "=m" (control)); + __asm__ volatile ("fnstcw %0" : "=m" (control)); return (~control & FE_ALL_EXCEPT); } diff --git a/lib/libm/arch/m88k/fenv.c b/lib/libm/arch/m88k/fenv.c index 3902c577e9a..814f9def17b 100644 --- a/lib/libm/arch/m88k/fenv.c +++ b/lib/libm/arch/m88k/fenv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv.c,v 1.5 2013/01/05 11:20:55 miod Exp $ */ +/* $OpenBSD: fenv.c,v 1.6 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2011 Martynas Venckus @@ -44,13 +44,13 @@ feclearexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (fpsr)); + __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (fpsr)); /* Clear the requested floating-point exceptions */ fpsr &= ~excepts; /* Load the floating-point status register */ - __asm__ __volatile__ ("fstcr %0, %%fcr62" : : "r" (fpsr)); + __asm__ volatile ("fstcr %0, %%fcr62" : : "r" (fpsr)); return (0); } @@ -68,7 +68,7 @@ fegetexceptflag(fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (fpsr)); + __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (fpsr)); /* Store the results in flagp */ *flagp = fpsr & excepts; @@ -130,14 +130,14 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (fpsr)); + __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (fpsr)); /* Set the requested status flags */ fpsr &= ~excepts; fpsr |= *flagp & excepts; /* Load the floating-point status register */ - __asm__ __volatile__ ("fstcr %0, %%fcr62" : : "r" (fpsr)); + __asm__ volatile ("fstcr %0, %%fcr62" : : "r" (fpsr)); return (0); } @@ -155,7 +155,7 @@ fetestexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (fpsr)); + __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (fpsr)); return (fpsr & excepts); } @@ -169,7 +169,7 @@ fegetround(void) unsigned int fpcr; /* Store the current floating-point control register */ - __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (fpcr)); + __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (fpcr)); return (fpcr & _ROUND_MASK); } @@ -189,14 +189,14 @@ fesetround(int round) return (-1); /* Store the current floating-point control register */ - __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (fpcr)); + __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (fpcr)); /* Set the rounding direction */ fpcr &= ~_ROUND_MASK; fpcr |= round; /* Load the floating-point control register */ - __asm__ __volatile__ ("fstcr %0, %%fcr63" : : "r" (fpcr)); + __asm__ volatile ("fstcr %0, %%fcr63" : : "r" (fpcr)); return (0); } @@ -209,8 +209,8 @@ int fegetenv(fenv_t *envp) { /* Store the current floating-point control and status registers */ - __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (envp->__control)); - __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (envp->__status)); + __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (envp->__control)); + __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (envp->__status)); return (0); } @@ -227,18 +227,18 @@ feholdexcept(fenv_t *envp) unsigned int fpsr, fpcr; /* Store the current floating-point control and status registers */ - __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (envp->__control)); - __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (envp->__status)); + __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (envp->__control)); + __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (envp->__status)); /* Clear exception flags in FPSR */ fpsr = envp->__status; fpsr &= ~FE_ALL_EXCEPT; - __asm__ __volatile__ ("fstcr %0, %%fcr62" : : "r" (fpsr)); + __asm__ volatile ("fstcr %0, %%fcr62" : : "r" (fpsr)); /* Mask all exceptions */ fpcr = envp->__control; fpcr &= ~FE_ALL_EXCEPT; - __asm__ __volatile__ ("fstcr %0, %%fcr63" : : "r" (fpcr)); + __asm__ volatile ("fstcr %0, %%fcr63" : : "r" (fpcr)); return (0); } @@ -257,8 +257,8 @@ fesetenv(const fenv_t *envp) fenv_t fenv; /* Store the current floating-point control and status registers */ - __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (fenv.__control)); - __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (fenv.__status)); + __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (fenv.__control)); + __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (fenv.__status)); /* Set the requested control flags */ fenv.__control &= ~(FE_ALL_EXCEPT | _ROUND_MASK); @@ -269,8 +269,8 @@ fesetenv(const fenv_t *envp) fenv.__status |= envp->__status & FE_ALL_EXCEPT; /* Load the floating-point control and status registers */ - __asm__ __volatile__ ("fstcr %0, %%fcr63" : : "r" (fenv.__control)); - __asm__ __volatile__ ("fstcr %0, %%fcr62" : : "r" (fenv.__status)); + __asm__ volatile ("fstcr %0, %%fcr63" : : "r" (fenv.__control)); + __asm__ volatile ("fstcr %0, %%fcr62" : : "r" (fenv.__status)); return (0); } @@ -289,7 +289,7 @@ feupdateenv(const fenv_t *envp) unsigned int fpsr; /* Store the current floating-point status register */ - __asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r" (fpsr)); + __asm__ volatile ("fldcr %0, %%fcr62" : "=r" (fpsr)); /* Install new floating-point environment */ fesetenv(envp); @@ -311,13 +311,13 @@ feenableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Store the current floating-point control register */ - __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (fpcr)); + __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (fpcr)); omask = fpcr & FE_ALL_EXCEPT; fpcr |= mask; /* Load the floating-point control register */ - __asm__ __volatile__ ("fstcr %0, %%fcr63" : : "r" (fpcr)); + __asm__ volatile ("fstcr %0, %%fcr63" : : "r" (fpcr)); return (omask); @@ -331,13 +331,13 @@ fedisableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Store the current floating-point control register */ - __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (fpcr)); + __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (fpcr)); omask = fpcr & FE_ALL_EXCEPT; fpcr &= ~mask; /* Load the floating-point control register */ - __asm__ __volatile__ ("fstcr %0, %%fcr63" : : "r" (fpcr)); + __asm__ volatile ("fstcr %0, %%fcr63" : : "r" (fpcr)); return (omask); } @@ -348,7 +348,7 @@ fegetexcept(void) unsigned int fpcr; /* Store the current floating-point control register */ - __asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r" (fpcr)); + __asm__ volatile ("fldcr %0, %%fcr63" : "=r" (fpcr)); return (fpcr & FE_ALL_EXCEPT); } diff --git a/lib/libm/arch/mips64/fenv.c b/lib/libm/arch/mips64/fenv.c index bfc485490db..5611ef38b84 100644 --- a/lib/libm/arch/mips64/fenv.c +++ b/lib/libm/arch/mips64/fenv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:03 deraadt Exp $ */ +/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2011 Martynas Venckus @@ -41,13 +41,13 @@ feclearexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr)); /* Clear the requested floating-point exceptions */ fcsr &= ~excepts; /* Load the floating-point control and status register */ - __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr)); + __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr)); return (0); } @@ -65,7 +65,7 @@ fegetexceptflag(fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr)); /* Store the results in flagp */ *flagp = fcsr & excepts; @@ -85,12 +85,12 @@ feraiseexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr)); fcsr |= excepts | (excepts << 10); /* Load the floating-point control and status register */ - __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr)); + __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr)); return (0); } @@ -108,14 +108,14 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr)); /* Set the requested status flags */ fcsr &= ~excepts; fcsr |= *flagp & excepts; /* Load the floating-point control and status register */ - __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr)); + __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr)); return (0); } @@ -133,7 +133,7 @@ fetestexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr)); return (fcsr & excepts); } @@ -147,7 +147,7 @@ fegetround(void) unsigned int fcsr; /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr)); return (fcsr & _ROUND_MASK); } @@ -167,14 +167,14 @@ fesetround(int round) return (-1); /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr)); /* Set the rounding direction */ fcsr &= ~_ROUND_MASK; fcsr |= round; /* Load the floating-point control and status register */ - __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr)); + __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr)); return (0); } @@ -187,7 +187,7 @@ int fegetenv(fenv_t *envp) { /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (*envp)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (*envp)); return (0); } @@ -204,7 +204,7 @@ feholdexcept(fenv_t *envp) unsigned int fcsr; /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (*envp)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (*envp)); /* Clear exception flags in FCSR */ fcsr = *envp; @@ -212,7 +212,7 @@ feholdexcept(fenv_t *envp) /* Mask all exceptions */ fcsr &= ~(FE_ALL_EXCEPT << _MASK_SHIFT); - __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr)); + __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr)); return (0); } @@ -229,7 +229,7 @@ int fesetenv(const fenv_t *envp) { /* Load the floating-point control and status register */ - __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (*envp)); + __asm__ volatile ("ctc1 %0, $31" : : "r" (*envp)); return (0); } @@ -248,7 +248,7 @@ feupdateenv(const fenv_t *envp) unsigned int fcsr; /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr)); /* Install new floating-point environment */ fesetenv(envp); @@ -270,13 +270,13 @@ feenableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr)); omask = (fcsr >> _MASK_SHIFT) & FE_ALL_EXCEPT; fcsr |= mask << _MASK_SHIFT; /* Load the floating-point control and status register */ - __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr)); + __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr)); return (omask); @@ -290,13 +290,13 @@ fedisableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr)); omask = (fcsr >> _MASK_SHIFT) & FE_ALL_EXCEPT; fcsr &= ~(mask << _MASK_SHIFT); /* Load the floating-point control and status register */ - __asm__ __volatile__ ("ctc1 %0, $31" : : "r" (fcsr)); + __asm__ volatile ("ctc1 %0, $31" : : "r" (fcsr)); return (omask); } @@ -307,7 +307,7 @@ fegetexcept(void) unsigned int fcsr; /* Store the current floating-point control and status register */ - __asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fcsr)); + __asm__ volatile ("cfc1 %0, $31" : "=r" (fcsr)); return ((fcsr >> _MASK_SHIFT) & FE_ALL_EXCEPT); } diff --git a/lib/libm/arch/powerpc/fenv.c b/lib/libm/arch/powerpc/fenv.c index 31ff7a4f560..28e628b47e0 100644 --- a/lib/libm/arch/powerpc/fenv.c +++ b/lib/libm/arch/powerpc/fenv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:03 deraadt Exp $ */ +/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2011 Martynas Venckus @@ -45,7 +45,7 @@ feclearexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr)); + __asm__ volatile ("mffs %0" : "=f" (u.fpscr)); /* Clear the requested floating-point exceptions */ u.bits[1] &= ~excepts; @@ -53,7 +53,7 @@ feclearexcept(int excepts) u.bits[1] &= ~_FE_INVALID_ALL; /* Load the floating-point status and control register */ - __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr)); + __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr)); return (0); } @@ -71,7 +71,7 @@ fegetexceptflag(fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr)); + __asm__ volatile ("mffs %0" : "=f" (u.fpscr)); /* Store the results in flagp */ *flagp = u.bits[1] & excepts; @@ -106,7 +106,7 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr)); + __asm__ volatile ("mffs %0" : "=f" (u.fpscr)); /* Set the requested status flags */ u.bits[1] &= ~excepts; @@ -119,7 +119,7 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) } /* Load the floating-point status and control register */ - __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr)); + __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr)); return (0); } @@ -137,7 +137,7 @@ fetestexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr)); + __asm__ volatile ("mffs %0" : "=f" (u.fpscr)); return (u.bits[1] & excepts); } @@ -151,7 +151,7 @@ fegetround(void) union u u; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr)); + __asm__ volatile ("mffs %0" : "=f" (u.fpscr)); return (u.bits[1] & _ROUND_MASK); } @@ -171,14 +171,14 @@ fesetround(int round) return (-1); /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr)); + __asm__ volatile ("mffs %0" : "=f" (u.fpscr)); /* Set the rounding direction */ u.bits[1] &= ~_ROUND_MASK; u.bits[1] |= round; /* Load the floating-point status and control register */ - __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr)); + __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr)); return (0); } @@ -193,7 +193,7 @@ fegetenv(fenv_t *envp) union u u; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr)); + __asm__ volatile ("mffs %0" : "=f" (u.fpscr)); *envp = u.bits[1]; @@ -212,7 +212,7 @@ feholdexcept(fenv_t *envp) union u u; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr)); + __asm__ volatile ("mffs %0" : "=f" (u.fpscr)); *envp = u.bits[1]; @@ -221,7 +221,7 @@ feholdexcept(fenv_t *envp) /* Mask all exceptions */ u.bits[1] &= ~(FE_ALL_EXCEPT >> _MASK_SHIFT); - __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr)); + __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr)); return (0); } @@ -243,7 +243,7 @@ fesetenv(const fenv_t *envp) u.bits[1] = *envp; /* Load the floating-point status and control register */ - __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr)); + __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr)); return (0); } @@ -262,7 +262,7 @@ feupdateenv(const fenv_t *envp) union u u; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr)); + __asm__ volatile ("mffs %0" : "=f" (u.fpscr)); /* Install new floating-point environment */ fesetenv(envp); @@ -285,13 +285,13 @@ feenableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr)); + __asm__ volatile ("mffs %0" : "=f" (u.fpscr)); omask = (u.bits[1] << _MASK_SHIFT) & FE_ALL_EXCEPT; u.bits[1] |= mask >> _MASK_SHIFT; /* Load the floating-point status and control register */ - __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr)); + __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr)); return (omask); @@ -306,13 +306,13 @@ fedisableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr)); + __asm__ volatile ("mffs %0" : "=f" (u.fpscr)); omask = (u.bits[1] << _MASK_SHIFT) & FE_ALL_EXCEPT; u.bits[1] &= ~(mask >> _MASK_SHIFT); /* Load the floating-point status and control register */ - __asm__ __volatile__ ("mtfsf 0xff,%0" :: "f" (u.fpscr)); + __asm__ volatile ("mtfsf 0xff,%0" :: "f" (u.fpscr)); return (omask); } @@ -323,7 +323,7 @@ fegetexcept(void) union u u; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("mffs %0" : "=f" (u.fpscr)); + __asm__ volatile ("mffs %0" : "=f" (u.fpscr)); return ((u.bits[1] << _MASK_SHIFT) & FE_ALL_EXCEPT); } diff --git a/lib/libm/arch/sh/e_sqrt.c b/lib/libm/arch/sh/e_sqrt.c index c118eafb80f..fdf1515bbe7 100644 --- a/lib/libm/arch/sh/e_sqrt.c +++ b/lib/libm/arch/sh/e_sqrt.c @@ -1,4 +1,4 @@ -/* $OpenBSD: e_sqrt.c,v 1.5 2013/03/28 18:09:38 martynas Exp $ */ +/* $OpenBSD: e_sqrt.c,v 1.6 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Martynas Venckus. Public domain @@ -15,7 +15,7 @@ sqrt(double d) { register_t fpscr, nfpscr; - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); /* Set floating-point mode to double-precision. */ nfpscr = fpscr | FPSCR_PR; @@ -23,11 +23,11 @@ sqrt(double d) /* Do not set SZ and PR to 1 simultaneously. */ nfpscr &= ~FPSCR_SZ; - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (nfpscr)); - __asm__ __volatile__ ("fsqrt %0" : "+f" (d)); + __asm__ volatile ("lds %0, fpscr" : : "r" (nfpscr)); + __asm__ volatile ("fsqrt %0" : "+f" (d)); /* Restore fp status/control register. */ - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr)); + __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr)); return (d); } diff --git a/lib/libm/arch/sh/e_sqrtf.c b/lib/libm/arch/sh/e_sqrtf.c index 99217c837a2..8c4db4ef55c 100644 --- a/lib/libm/arch/sh/e_sqrtf.c +++ b/lib/libm/arch/sh/e_sqrtf.c @@ -1,4 +1,4 @@ -/* $OpenBSD: e_sqrtf.c,v 1.1 2009/04/05 19:26:27 martynas Exp $ */ +/* $OpenBSD: e_sqrtf.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Martynas Venckus. Public domain @@ -14,16 +14,16 @@ sqrtf(float f) { register_t fpscr, nfpscr; - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); /* Set floating-point mode to single-precision. */ nfpscr = fpscr & ~FPSCR_PR; - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (nfpscr)); - __asm__ __volatile__ ("fsqrt %0" : "+f" (f)); + __asm__ volatile ("lds %0, fpscr" : : "r" (nfpscr)); + __asm__ volatile ("fsqrt %0" : "+f" (f)); /* Restore fp status/control register. */ - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr)); + __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr)); return (f); } diff --git a/lib/libm/arch/sh/fenv.c b/lib/libm/arch/sh/fenv.c index 078ec424e4c..1a057dd2be2 100644 --- a/lib/libm/arch/sh/fenv.c +++ b/lib/libm/arch/sh/fenv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:03 deraadt Exp $ */ +/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2011 Martynas Venckus @@ -43,7 +43,7 @@ feclearexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); /* Clear the requested floating-point exceptions */ fpscr &= ~excepts; @@ -51,7 +51,7 @@ feclearexcept(int excepts) __fpscr_values[1] &= ~excepts; /* Load the floating-point status and control register */ - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr)); + __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr)); return (0); } @@ -69,7 +69,7 @@ fegetexceptflag(fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); /* Store the results in flagp */ *flagp = fpscr & excepts; @@ -132,7 +132,7 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); /* Set the requested status flags */ fpscr &= ~excepts; @@ -144,7 +144,7 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) __fpscr_values[1] |= *flagp & excepts; /* Load the floating-point status and control register */ - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr)); + __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr)); return (0); } @@ -162,7 +162,7 @@ fetestexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); return (fpscr & excepts); } @@ -176,7 +176,7 @@ fegetround(void) unsigned int fpscr; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); return (fpscr & _ROUND_MASK); } @@ -196,7 +196,7 @@ fesetround(int round) return (-1); /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); /* Set the rounding direction */ fpscr &= ~_ROUND_MASK; @@ -208,7 +208,7 @@ fesetround(int round) __fpscr_values[1] |= round; /* Load the floating-point status and control register */ - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr)); + __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr)); return (0); } @@ -221,7 +221,7 @@ int fegetenv(fenv_t *envp) { /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (*envp)); + __asm__ volatile ("sts fpscr, %0" : "=r" (*envp)); return (0); } @@ -238,7 +238,7 @@ feholdexcept(fenv_t *envp) unsigned int fpscr; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); *envp = fpscr; @@ -253,7 +253,7 @@ feholdexcept(fenv_t *envp) __fpscr_values[1] &= ~(FE_ALL_EXCEPT << _MASK_SHIFT); /* Load the floating-point status and control register */ - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr)); + __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr)); return (0); } @@ -272,7 +272,7 @@ fesetenv(const fenv_t *envp) unsigned int fpscr; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); /* Set the requested flags */ fpscr &= ~((FE_ALL_EXCEPT << _MASK_SHIFT) | _ROUND_MASK | @@ -290,7 +290,7 @@ fesetenv(const fenv_t *envp) _ROUND_MASK | FE_ALL_EXCEPT); /* Load the floating-point status and control register */ - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr)); + __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr)); return (0); } @@ -309,7 +309,7 @@ feupdateenv(const fenv_t *envp) unsigned int fpscr; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); /* Install new floating-point environment */ fesetenv(envp); @@ -331,7 +331,7 @@ feenableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); omask = (fpscr >> _MASK_SHIFT) & FE_ALL_EXCEPT; fpscr |= mask << _MASK_SHIFT; @@ -339,7 +339,7 @@ feenableexcept(int mask) __fpscr_values[1] |= mask << _MASK_SHIFT; /* Load the floating-point status and control register */ - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr)); + __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr)); return (omask); @@ -353,7 +353,7 @@ fedisableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); omask = (fpscr >> _MASK_SHIFT) & FE_ALL_EXCEPT; fpscr &= ~(mask << _MASK_SHIFT); @@ -361,7 +361,7 @@ fedisableexcept(int mask) __fpscr_values[1] &= ~(mask << _MASK_SHIFT); /* Load the floating-point status and control register */ - __asm__ __volatile__ ("lds %0, fpscr" : : "r" (fpscr)); + __asm__ volatile ("lds %0, fpscr" : : "r" (fpscr)); return (omask); } @@ -372,7 +372,7 @@ fegetexcept(void) unsigned int fpscr; /* Store the current floating-point status and control register */ - __asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr)); + __asm__ volatile ("sts fpscr, %0" : "=r" (fpscr)); return ((fpscr >> _MASK_SHIFT) & FE_ALL_EXCEPT); } diff --git a/lib/libm/arch/sh/s_fabsf.c b/lib/libm/arch/sh/s_fabsf.c index 7b1402325da..77456a54ad2 100644 --- a/lib/libm/arch/sh/s_fabsf.c +++ b/lib/libm/arch/sh/s_fabsf.c @@ -1,4 +1,4 @@ -/* $OpenBSD: s_fabsf.c,v 1.1 2009/04/05 19:26:27 martynas Exp $ */ +/* $OpenBSD: s_fabsf.c,v 1.2 2014/04/18 15:09:52 guenther Exp $ */ /* * Written by Martynas Venckus. Public domain @@ -10,7 +10,7 @@ float fabsf(float f) { /* Same operation is performed regardless of precision. */ - __asm__ __volatile__ ("fabs %0" : "+f" (f)); + __asm__ volatile ("fabs %0" : "+f" (f)); return (f); } diff --git a/lib/libm/arch/sparc/fenv.c b/lib/libm/arch/sparc/fenv.c index ee4254400de..c226db4ee48 100644 --- a/lib/libm/arch/sparc/fenv.c +++ b/lib/libm/arch/sparc/fenv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:03 deraadt Exp $ */ +/* $OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $ */ /* $NetBSD: fenv.c,v 1.1 2011/01/31 00:19:33 christos Exp $ */ /*- @@ -50,12 +50,12 @@ feclearexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Save floating-point state register */ - __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r)); + __asm__ volatile ("st %%fsr, %0" : "=m" (r)); r &= ~excepts; /* Load floating-point state register */ - __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (r)); + __asm__ volatile ("ld %0, %%fsr" : : "m" (r)); return 0; } @@ -73,7 +73,7 @@ fegetexceptflag(fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Save floating-point state register */ - __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r)); + __asm__ volatile ("st %%fsr, %0" : "=m" (r)); *flagp = r & excepts; @@ -94,13 +94,13 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Save floating-point state register */ - __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r)); + __asm__ volatile ("st %%fsr, %0" : "=m" (r)); r &= ~excepts; r |= *flagp & excepts; /* Load floating-point state register */ - __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (r)); + __asm__ volatile ("ld %0, %%fsr" : : "m" (r)); return 0; } @@ -162,7 +162,7 @@ fetestexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Save floating-point state register */ - __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r)); + __asm__ volatile ("st %%fsr, %0" : "=m" (r)); return r & excepts; } @@ -176,7 +176,7 @@ fegetround(void) fenv_t r; /* Save floating-point state register */ - __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r)); + __asm__ volatile ("st %%fsr, %0" : "=m" (r)); return (r >> _ROUND_SHIFT) & _ROUND_MASK; } @@ -195,13 +195,13 @@ fesetround(int round) return -1; /* Save floating-point state register */ - __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r)); + __asm__ volatile ("st %%fsr, %0" : "=m" (r)); r &= ~(_ROUND_MASK << _ROUND_SHIFT); r |= round << _ROUND_SHIFT; /* Load floating-point state register */ - __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (r)); + __asm__ volatile ("ld %0, %%fsr" : : "m" (r)); return 0; } @@ -214,7 +214,7 @@ int fegetenv(fenv_t *envp) { /* Save floating-point state register */ - __asm__ __volatile__ ("st %%fsr, %0" : "=m" (*envp)); + __asm__ volatile ("st %%fsr, %0" : "=m" (*envp)); return 0; } @@ -232,13 +232,13 @@ feholdexcept(fenv_t *envp) fenv_t r; /* Save floating-point state register */ - __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r)); + __asm__ volatile ("st %%fsr, %0" : "=m" (r)); *envp = r; r &= ~(FE_ALL_EXCEPT | (FE_ALL_EXCEPT << _MASK_SHIFT)); /* Load floating-point state register */ - __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (r)); + __asm__ volatile ("ld %0, %%fsr" : : "m" (r)); return 0; } @@ -255,7 +255,7 @@ int fesetenv(const fenv_t *envp) { /* Load floating-point state register */ - __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (*envp)); + __asm__ volatile ("ld %0, %%fsr" : : "m" (*envp)); return 0; } @@ -275,10 +275,10 @@ feupdateenv(const fenv_t *envp) fexcept_t r; /* Save floating-point state register */ - __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r)); + __asm__ volatile ("st %%fsr, %0" : "=m" (r)); /* Load floating-point state register */ - __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (*envp)); + __asm__ volatile ("ld %0, %%fsr" : : "m" (*envp)); feraiseexcept(r & FE_ALL_EXCEPT); @@ -296,12 +296,12 @@ feenableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Save floating-point state register */ - __asm__ __volatile__ ("st %%fsr, %0" : "=m" (old_r)); + __asm__ volatile ("st %%fsr, %0" : "=m" (old_r)); new_r = old_r | (mask << _MASK_SHIFT); /* Load floating-point state register */ - __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (new_r)); + __asm__ volatile ("ld %0, %%fsr" : : "m" (new_r)); return (old_r >> _MASK_SHIFT) & FE_ALL_EXCEPT; } @@ -314,12 +314,12 @@ fedisableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Save floating-point state register */ - __asm__ __volatile__ ("st %%fsr, %0" : "=m" (old_r)); + __asm__ volatile ("st %%fsr, %0" : "=m" (old_r)); new_r = old_r & ~(mask << _MASK_SHIFT); /* Load floating-point state register */ - __asm__ __volatile__ ("ld %0, %%fsr" : : "m" (new_r)); + __asm__ volatile ("ld %0, %%fsr" : : "m" (new_r)); return (old_r >> _MASK_SHIFT) & FE_ALL_EXCEPT; } @@ -330,7 +330,7 @@ fegetexcept(void) fenv_t r; /* Save floating-point state register */ - __asm__ __volatile__ ("st %%fsr, %0" : "=m" (r)); + __asm__ volatile ("st %%fsr, %0" : "=m" (r)); return (r & (FE_ALL_EXCEPT << _MASK_SHIFT)) >> _MASK_SHIFT; } diff --git a/lib/libm/arch/sparc64/fenv.c b/lib/libm/arch/sparc64/fenv.c index 390324e8eda..5bc948df81b 100644 --- a/lib/libm/arch/sparc64/fenv.c +++ b/lib/libm/arch/sparc64/fenv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv.c,v 1.4 2012/12/05 23:20:03 deraadt Exp $ */ +/* $OpenBSD: fenv.c,v 1.5 2014/04/18 15:09:52 guenther Exp $ */ /* $NetBSD: fenv.c,v 1.1 2011/01/31 00:19:33 christos Exp $ */ /*- @@ -50,12 +50,12 @@ feclearexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Save floating-point state register */ - __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r)); + __asm__ volatile ("stx %%fsr, %0" : "=m" (r)); r &= ~excepts; /* Load floating-point state register */ - __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (r)); + __asm__ volatile ("ldx %0, %%fsr" : : "m" (r)); return 0; } @@ -73,7 +73,7 @@ fegetexceptflag(fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Save floating-point state register */ - __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r)); + __asm__ volatile ("stx %%fsr, %0" : "=m" (r)); *flagp = r & excepts; @@ -94,13 +94,13 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) excepts &= FE_ALL_EXCEPT; /* Save floating-point state register */ - __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r)); + __asm__ volatile ("stx %%fsr, %0" : "=m" (r)); r &= ~excepts; r |= *flagp & excepts; /* Load floating-point state register */ - __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (r)); + __asm__ volatile ("ldx %0, %%fsr" : : "m" (r)); return 0; } @@ -162,7 +162,7 @@ fetestexcept(int excepts) excepts &= FE_ALL_EXCEPT; /* Save floating-point state register */ - __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r)); + __asm__ volatile ("stx %%fsr, %0" : "=m" (r)); return r & excepts; } @@ -176,7 +176,7 @@ fegetround(void) fenv_t r; /* Save floating-point state register */ - __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r)); + __asm__ volatile ("stx %%fsr, %0" : "=m" (r)); return (r >> _ROUND_SHIFT) & _ROUND_MASK; } @@ -195,13 +195,13 @@ fesetround(int round) return -1; /* Save floating-point state register */ - __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r)); + __asm__ volatile ("stx %%fsr, %0" : "=m" (r)); r &= ~(_ROUND_MASK << _ROUND_SHIFT); r |= round << _ROUND_SHIFT; /* Load floating-point state register */ - __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (r)); + __asm__ volatile ("ldx %0, %%fsr" : : "m" (r)); return 0; } @@ -214,7 +214,7 @@ int fegetenv(fenv_t *envp) { /* Save floating-point state register */ - __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (*envp)); + __asm__ volatile ("stx %%fsr, %0" : "=m" (*envp)); return 0; } @@ -232,13 +232,13 @@ feholdexcept(fenv_t *envp) fenv_t r; /* Save floating-point state register */ - __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r)); + __asm__ volatile ("stx %%fsr, %0" : "=m" (r)); *envp = r; r &= ~(FE_ALL_EXCEPT | (FE_ALL_EXCEPT << _MASK_SHIFT)); /* Load floating-point state register */ - __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (r)); + __asm__ volatile ("ldx %0, %%fsr" : : "m" (r)); return 0; } @@ -255,7 +255,7 @@ int fesetenv(const fenv_t *envp) { /* Load floating-point state register */ - __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (*envp)); + __asm__ volatile ("ldx %0, %%fsr" : : "m" (*envp)); return 0; } @@ -275,10 +275,10 @@ feupdateenv(const fenv_t *envp) fexcept_t r; /* Save floating-point state register */ - __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r)); + __asm__ volatile ("stx %%fsr, %0" : "=m" (r)); /* Load floating-point state register */ - __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (*envp)); + __asm__ volatile ("ldx %0, %%fsr" : : "m" (*envp)); feraiseexcept(r & FE_ALL_EXCEPT); @@ -296,12 +296,12 @@ feenableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Save floating-point state register */ - __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (old_r)); + __asm__ volatile ("stx %%fsr, %0" : "=m" (old_r)); new_r = old_r | (mask << _MASK_SHIFT); /* Load floating-point state register */ - __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (new_r)); + __asm__ volatile ("ldx %0, %%fsr" : : "m" (new_r)); return (old_r >> _MASK_SHIFT) & FE_ALL_EXCEPT; } @@ -314,12 +314,12 @@ fedisableexcept(int mask) mask &= FE_ALL_EXCEPT; /* Save floating-point state register */ - __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (old_r)); + __asm__ volatile ("stx %%fsr, %0" : "=m" (old_r)); new_r = old_r & ~(mask << _MASK_SHIFT); /* Load floating-point state register */ - __asm__ __volatile__ ("ldx %0, %%fsr" : : "m" (new_r)); + __asm__ volatile ("ldx %0, %%fsr" : : "m" (new_r)); return (old_r >> _MASK_SHIFT) & FE_ALL_EXCEPT; } @@ -330,7 +330,7 @@ fegetexcept(void) fenv_t r; /* Save floating-point state register */ - __asm__ __volatile__ ("stx %%fsr, %0" : "=m" (r)); + __asm__ volatile ("stx %%fsr, %0" : "=m" (r)); return (r & (FE_ALL_EXCEPT << _MASK_SHIFT)) >> _MASK_SHIFT; } diff --git a/lib/librthread/arch/m88k/_atomic_lock.c b/lib/librthread/arch/m88k/_atomic_lock.c index 445ee7ac065..ee638327d79 100644 --- a/lib/librthread/arch/m88k/_atomic_lock.c +++ b/lib/librthread/arch/m88k/_atomic_lock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: _atomic_lock.c,v 1.4 2013/06/01 20:47:40 tedu Exp $ */ +/* $OpenBSD: _atomic_lock.c,v 1.5 2014/04/18 15:09:52 guenther Exp $ */ /* * Copyright (c) 2003, Miodrag Vallat. @@ -37,7 +37,7 @@ _atomic_lock(volatile _atomic_lock_t *lock) _atomic_lock_t old; old = _ATOMIC_LOCK_LOCKED; - __asm__ __volatile__ + __asm__ volatile ("xmem %0, %2, %%r0" : "=r" (old) : "0" (old), "r" (lock)); return (old != _ATOMIC_LOCK_UNLOCKED); diff --git a/lib/librthread/arch/mips64/_atomic_lock.c b/lib/librthread/arch/mips64/_atomic_lock.c index be85dad4421..4b33cb39ac9 100644 --- a/lib/librthread/arch/mips64/_atomic_lock.c +++ b/lib/librthread/arch/mips64/_atomic_lock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: _atomic_lock.c,v 1.7 2013/06/03 16:19:45 miod Exp $ */ +/* $OpenBSD: _atomic_lock.c,v 1.8 2014/04/18 15:09:52 guenther Exp $ */ /* * Atomic lock for mips @@ -12,7 +12,7 @@ _atomic_lock(volatile _atomic_lock_t *lock) { _atomic_lock_t old; - __asm__ __volatile__ ( + __asm__ volatile ( ".set noreorder\n" "1: ll %0, 0(%1)\n" " sc %2, 0(%1)\n" -- 2.20.1