From b37ea0e2360c8dc3341db53c31d9f8e8f778ee24 Mon Sep 17 00:00:00 2001 From: jsg Date: Tue, 6 Feb 2024 03:23:27 +0000 Subject: [PATCH] drm/amd/display: Force p-state disallow if leaving no plane config From Alvin Lee e9ca61a7e6b0d323547067e1dde64a97476e1696 in linux-6.6.y/6.6.16 9a902a9073c287353e25913c0761bfed49d75a88 in mainline linux --- .../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_hwseq.c index a2e1ca3b93e..2c4bcbca8bb 100644 --- a/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -1792,6 +1792,8 @@ void dcn20_program_front_end_for_ctx( int i; struct dce_hwseq *hws = dc->hwseq; DC_LOGGER_INIT(dc->ctx->logger); + unsigned int prev_hubp_count = 0; + unsigned int hubp_count = 0; /* Carry over GSL groups in case the context is changing. */ for (i = 0; i < dc->res_pool->pipe_count; i++) { @@ -1815,6 +1817,20 @@ void dcn20_program_front_end_for_ctx( } } + for (i = 0; i < dc->res_pool->pipe_count; i++) { + if (dc->current_state->res_ctx.pipe_ctx[i].plane_state) + prev_hubp_count++; + if (context->res_ctx.pipe_ctx[i].plane_state) + hubp_count++; + } + + if (prev_hubp_count == 0 && hubp_count > 0) { + if (dc->res_pool->hubbub->funcs->force_pstate_change_control) + dc->res_pool->hubbub->funcs->force_pstate_change_control( + dc->res_pool->hubbub, true, false); + udelay(500); + } + /* Set pipe update flags and lock pipes */ for (i = 0; i < dc->res_pool->pipe_count; i++) dcn20_detect_pipe_changes(&dc->current_state->res_ctx.pipe_ctx[i], @@ -1962,6 +1978,10 @@ void dcn20_post_unlock_program_front_end( } } + if (dc->res_pool->hubbub->funcs->force_pstate_change_control) + dc->res_pool->hubbub->funcs->force_pstate_change_control( + dc->res_pool->hubbub, false, false); + for (i = 0; i < dc->res_pool->pipe_count; i++) { struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; -- 2.20.1