From b36752d0102ac3e155045fab6efa4d1f7ec18ec7 Mon Sep 17 00:00:00 2001 From: mickey Date: Mon, 10 Apr 2000 20:07:47 +0000 Subject: [PATCH] add support for true RNG presented on the i82802 FWH. it produces 1 byte at a time and has no ready irq, thus timeout driven. in fact w/ default hz=100 it produces up to 60% of gross entropy production in an average loaded desktop system. --- sys/arch/i386/pci/pchb.c | 120 ++++++++++++++++++++++++++++++++++++++- sys/dev/ic/i82802reg.h | 106 ++++++++++++++++++++++++++++++++++ 2 files changed, 223 insertions(+), 3 deletions(-) create mode 100644 sys/dev/ic/i82802reg.h diff --git a/sys/arch/i386/pci/pchb.c b/sys/arch/i386/pci/pchb.c index 3703fa2a1b8..6aedd48b169 100644 --- a/sys/arch/i386/pci/pchb.c +++ b/sys/arch/i386/pci/pchb.c @@ -1,5 +1,36 @@ +/* $OpenBSD: pchb.c,v 1.7 2000/04/10 20:07:47 mickey Exp $ */ /* $NetBSD: pchb.c,v 1.6 1997/06/06 23:29:16 thorpej Exp $ */ +/* + * Copyright (c) 2000 Michael Shalayeff + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Michael Shalayeff. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + */ /*- * Copyright (c) 1996 The NetBSD Foundation, Inc. * All rights reserved. @@ -36,18 +67,22 @@ * POSSIBILITY OF SUCH DAMAGE. */ -#include #include #include #include +#include +#include #include #include #include - #include +#include + +#include + #define PCISET_BRIDGETYPE_MASK 0x3 #define PCISET_TYPE_COMPAT 0x1 #define PCISET_TYPE_AUX 0x2 @@ -65,19 +100,32 @@ #define I82424_BCTL_PCIMEM_BURSTEN 0x01 #define I82424_BCTL_PCI_BURSTEN 0x02 +struct pchb_softc { + struct device sc_dev; + + bus_space_tag_t bt; + bus_space_handle_t bh; + + /* rng stuff */ + int ax; + int i; + struct timeout sc_tmo; +}; + int pchbmatch __P((struct device *, void *, void *)); void pchbattach __P((struct device *, struct device *, void *)); int pchb_print __P((void *, const char *)); struct cfattach pchb_ca = { - sizeof(struct device), pchbmatch, pchbattach + sizeof(struct pchb_softc), pchbmatch, pchbattach }; struct cfdriver pchb_cd = { NULL, "pchb", DV_DULL }; +void pchb_rnd __P((void *v)); int pchbmatch(parent, match, aux) @@ -98,10 +146,12 @@ pchbattach(parent, self, aux) struct device *parent, *self; void *aux; { + struct pchb_softc *sc = (struct pchb_softc *)self; struct pci_attach_args *pa = aux; struct pcibus_attach_args pba; pcireg_t bcreg; u_char bdnum, pbnum; + int i; /* * Print out a description, and configure certain chipsets which @@ -149,6 +199,45 @@ pchbattach(parent, self, aux) printf(": disabled CPU-PCI write posting"); } break; + case PCI_PRODUCT_INTEL_82810E_MCH: + sc->bt = pa->pa_memt; + if (bus_space_map(sc->bt, I82802_IOBASE, I82802_IOSIZE, + 0, &sc->bh) < 0) + break; + + /* probe and init rng */ + if (bus_space_read_1(sc->bt, sc->bh, + I82802_RNG_HWST) & I82802_RNG_HWST_PRESENT) { + int r; + + /* enable RNG */ + bus_space_write_1(sc->bt, sc->bh, + I82802_RNG_HWST, + bus_space_read_1(sc->bt, sc->bh, + I82802_RNG_HWST) | + I82802_RNG_HWST_ENABLE); + + /* + * see if we can read anything, + * and it passed the test + */ + for (i = 1000; i-- && + !(bus_space_read_1(sc->bt, sc->bh, I82802_RNG_RNGST) & + I82802_RNG_RNGST_DATAV); DELAY(10)); + + if (bus_space_read_1(sc->bt, sc->bh, + I82802_RNG_RNGST) & I82802_RNG_RNGST_DATAV + && (r = bus_space_read_1(sc->bt, sc->bh, + I82802_RNG_DATA)) != 0 + /*&& runfipstest()>=0*/) { + printf (": RNG(%x)", r); + + sc->i = 4; + timeout_set(&sc->sc_tmo, pchb_rnd, sc); + timeout_add(&sc->sc_tmo, 1); + } + } + break; default: break; } @@ -168,3 +257,28 @@ pchb_print(aux, pnp) printf(" bus %d", pba->pba_bus); return (UNCONF); } + + +void +pchb_rnd(v) + void *v; +{ + struct pchb_softc *sc = v; + int s, ret = -1; + + s = splhigh(); + if (bus_space_read_1(sc->bt, sc->bh, I82802_RNG_RNGST) & + I82802_RNG_RNGST_DATAV) + ret = bus_space_read_1(sc->bt, sc->bh, I82802_RNG_DATA); + splx(s); + + if (ret >= 0) { + if (sc->i--) + sc->ax = (sc->ax << 8) + ret; + else { + sc->i = 4; + add_true_randomness(ret); + } + } + timeout_add(&sc->sc_tmo, 1); +} diff --git a/sys/dev/ic/i82802reg.h b/sys/dev/ic/i82802reg.h new file mode 100644 index 00000000000..29adc05a1ac --- /dev/null +++ b/sys/dev/ic/i82802reg.h @@ -0,0 +1,106 @@ +/* $OpenBSD: i82802reg.h,v 1.1 2000/04/10 20:07:47 mickey Exp $ */ + +/* + * Copyright (c) 2000 Michael Shalayeff + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Michael Shalayeff. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Intel 82802AB/82802AC Firmware Hub + * + * see: ftp://download.intel.com/design/chipsets/datashts/29065802.pdf + * and http://developer.intel.com/design/chipsets/manuals/298029.pdf + */ + +/* + * unfortunatelly FWH does not show up in the pci device scan, 10x intel. + * so all we do is probe for it in the pchb driver at the following address. + */ +#define I82802_IOBASE 0xffb00000 +#define I82802_IOSIZE 0x00100000 + +/* + * FWH registers + * (table 4-4) + */ +#define I82802_BLOCK_LK 0xf0002 +#define I82802_MINUS01_LK 0xe0002 +#define I82802_MINUS02_LK 0xd0002 +#define I82802_MINUS03_LK 0xc0002 +#define I82802_MINUS04_LK 0xb0002 +#define I82802_MINUS05_LK 0xa0002 +#define I82802_MINUS06_LK 0x90002 +#define I82802_MINUS07_LK 0x80002 +#define I82802_MINUS08_LK 0x70002 +#define I82802_MINUS09_LK 0x60002 +#define I82802_MINUS10_LK 0x50002 +#define I82802_MINUS11_LK 0x40002 +#define I82802_MINUS12_LK 0x30002 +#define I82802_MINUS13_LK 0x20002 +#define I82802_MINUS14_LK 0x10002 +#define I82802_MINUS15_LK 0x00002 +#define I82802_FGPI_REG 0xc0100 + +/* + * T_BLOCK_LK and T_MINUS_* (block locking registers) + * (table 4-5) + */ +#define I82802_BLR_RD 0x04 +#define I82802_BLR_LD 0x02 +#define I82802_BLR_WL 0x01 + +/* + * Register Based Locking Value Definitions + * (tabe 4-6) + */ +#define I82802_LV_FULL 0x00 +#define I82802_LV_WRITE 0x01 +#define I82802_LV_DOWN 0x02 +#define I82802_LV_READ 0x04 + +/* + * General Purpose Inputs Register + * (table 4-7) + */ +#define I82802_FGPI_PIN4 0x10 /* PLCC-30/T SOP-7 */ +#define I82802_FGPI_PIN3 0x08 /* PLCC-30/T SOP-15 */ +#define I82802_FGPI_PIN2 0x04 /* PLCC-30/T SOP-16 */ +#define I82802_FGPI_PIN1 0x02 /* PLCC-30/T SOP-17 */ +#define I82802_FGPI_PIN0 0x01 /* PLCC-30/T SOP-18 */ + +/* + * RNG registers + */ +#define I82802_RNG_HWST 0xc015f +#define I82802_RNG_HWST_PRESENT 0x40 +#define I82802_RNG_HWST_ENABLE 0x01 +#define I82802_RNG_RNGST 0xc0160 +#define I82802_RNG_RNGST_DATAV 0x01 +#define I82802_RNG_DATA 0xc0161 + -- 2.20.1