From a316e13129736f6960bf2f3538d9af057cb70ccf Mon Sep 17 00:00:00 2001 From: patrick Date: Mon, 5 Apr 2021 09:31:45 +0000 Subject: [PATCH] Revert slow mode change so that we always use it for legacy and high speed timings, and if the device tree tells us to. While the change was done to reduce diff, it introduced a regression on some devices, hence this revert. Reported and tested by dtucker@ Tested by kettenis@ and myself --- sys/dev/fdt/sdhc_fdt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sys/dev/fdt/sdhc_fdt.c b/sys/dev/fdt/sdhc_fdt.c index 56bf15c46fa..f085c030c81 100644 --- a/sys/dev/fdt/sdhc_fdt.c +++ b/sys/dev/fdt/sdhc_fdt.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sdhc_fdt.c,v 1.14 2021/02/22 18:55:23 patrick Exp $ */ +/* $OpenBSD: sdhc_fdt.c,v 1.15 2021/04/05 09:31:45 patrick Exp $ */ /* * Copyright (c) 2017 Mark Kettenis * @@ -430,8 +430,8 @@ phy_init: XENON_EMMC_PHY_TIMING_ADJUST); reg |= XENON_EMMC_PHY_TIMING_ADJUST_SAMPL_INV_QSP_PHASE_SELECT; reg &= ~XENON_EMMC_PHY_TIMING_ADJUST_SLOW_MODE; - if ((timing == SDMMC_TIMING_LEGACY || - timing == SDMMC_TIMING_HIGHSPEED) && sc->sc_slow_mode) + if (timing == SDMMC_TIMING_LEGACY || + timing == SDMMC_TIMING_HIGHSPEED || sc->sc_slow_mode) reg |= XENON_EMMC_PHY_TIMING_ADJUST_SLOW_MODE; bus_space_write_4(sc->sc_iot, sc->sc_ioh, XENON_EMMC_PHY_TIMING_ADJUST, reg); -- 2.20.1