From a14dd3eb38d6a4988cf15dee471d227e0fa5162d Mon Sep 17 00:00:00 2001 From: guenther Date: Tue, 14 May 2024 01:42:07 +0000 Subject: [PATCH] Instead of enabling use of PCLMUL and AESNI iff cpu0 supports them via two global variables, make cpu_ecxfeature the intersection of cpuid(1).ecx on all CPUs and switch cpu_configure() to directly check that for the requisite flags. ok kettenis@ --- sys/arch/amd64/amd64/autoconf.c | 9 +++------ sys/arch/amd64/amd64/cpu.c | 4 ++-- sys/arch/amd64/amd64/identcpu.c | 17 ++--------------- 3 files changed, 7 insertions(+), 23 deletions(-) diff --git a/sys/arch/amd64/amd64/autoconf.c b/sys/arch/amd64/amd64/autoconf.c index 4206f2560ba..bd986963b5b 100644 --- a/sys/arch/amd64/amd64/autoconf.c +++ b/sys/arch/amd64/amd64/autoconf.c @@ -1,4 +1,4 @@ -/* $OpenBSD: autoconf.c,v 1.55 2022/09/08 10:22:05 kn Exp $ */ +/* $OpenBSD: autoconf.c,v 1.56 2024/05/14 01:42:07 guenther Exp $ */ /* $NetBSD: autoconf.c,v 1.1 2003/04/26 18:39:26 fvdl Exp $ */ /*- @@ -92,10 +92,7 @@ void viac3_crypto_setup(void); extern int amd64_has_xcrypt; void pclmul_setup(void); -extern int amd64_has_pclmul; - void aesni_setup(void); -extern int amd64_has_aesni; #endif void @@ -154,10 +151,10 @@ cpu_configure(void) if (amd64_has_xcrypt) viac3_crypto_setup(); - if (amd64_has_pclmul) + if (cpu_ecxfeature & CPUIDECX_PCLMUL) pclmul_setup(); - if (amd64_has_aesni) + if (cpu_ecxfeature & CPUIDECX_AES) aesni_setup(); #endif } diff --git a/sys/arch/amd64/amd64/cpu.c b/sys/arch/amd64/amd64/cpu.c index 94f497e5064..2eabcbe19e0 100644 --- a/sys/arch/amd64/amd64/cpu.c +++ b/sys/arch/amd64/amd64/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.187 2024/05/12 16:49:38 guenther Exp $ */ +/* $OpenBSD: cpu.c,v 1.188 2024/05/14 01:42:07 guenther Exp $ */ /* $NetBSD: cpu.c,v 1.1 2003/04/26 18:39:26 fvdl Exp $ */ /*- @@ -154,7 +154,7 @@ int cpuid_level = 0; /* MIN cpuid(0).eax */ char cpu_vendor[16] = { 0 }; /* CPU0's cpuid(0).e[bdc]x, \0 */ int cpu_id = 0; /* cpuid(1).eax */ int cpu_ebxfeature = 0; /* cpuid(1).ebx */ -int cpu_ecxfeature = 0; /* cpuid(1).ecx */ +int cpu_ecxfeature = 0; /* INTERSECTION(cpuid(1).ecx) */ int cpu_feature = 0; /* cpuid(1).edx */ int ecpu_ecxfeature = 0; /* cpuid(0x80000001).ecx */ int cpu_meltdown = 0; diff --git a/sys/arch/amd64/amd64/identcpu.c b/sys/arch/amd64/amd64/identcpu.c index 43c93660bbb..8a6008cccd6 100644 --- a/sys/arch/amd64/amd64/identcpu.c +++ b/sys/arch/amd64/amd64/identcpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: identcpu.c,v 1.142 2024/05/12 16:49:38 guenther Exp $ */ +/* $OpenBSD: identcpu.c,v 1.143 2024/05/14 01:42:07 guenther Exp $ */ /* $NetBSD: identcpu.c,v 1.1 2003/04/26 18:39:28 fvdl Exp $ */ /* @@ -66,10 +66,6 @@ char cpu_model[48]; int cpuspeed; int amd64_has_xcrypt; -#ifdef CRYPTO -int amd64_has_pclmul; -int amd64_has_aesni; -#endif int has_rdrand; int has_rdseed; @@ -519,6 +515,7 @@ identifycpu(struct cpu_info *ci) /* Let cpu_feature be the common bits */ cpu_feature &= ci->ci_feature_flags | (ci->ci_feature_eflags & CPUID_NXE); + cpu_ecxfeature &= curcpu_1_ecx; } /* cflush cacheline size is equal to bits 15-8 of ebx * 8 */ ci->ci_cflushsz = ((cflushsz >> 8) & 0xff) * 8; @@ -737,16 +734,6 @@ identifycpu(struct cpu_info *ci) } #endif -#ifdef CRYPTO - if (CPU_IS_PRIMARY(ci)) { - if (cpu_ecxfeature & CPUIDECX_PCLMUL) - amd64_has_pclmul = 1; - - if (cpu_ecxfeature & CPUIDECX_AES) - amd64_has_aesni = 1; - } -#endif - if (CPU_IS_PRIMARY(ci) && ci->ci_vendor == CPUV_VIA) { ci->cpu_setup = via_nano_setup; #ifndef SMALL_KERNEL -- 2.20.1