From 9ce1c53c94442543afeb0fbf05d89bb8e03f7b5c Mon Sep 17 00:00:00 2001 From: jsg Date: Thu, 31 Aug 2023 04:33:59 +0000 Subject: [PATCH] drm/i915/gt: Ensure memory quiesced before invalidation From Jonathan Cavitt 017d4404312ab94a61be218c0221cd0048a37896 in linux-6.1.y/6.1.50 78a6ccd65fa3a7cc697810db079cc4b84dff03d5 in mainline linux --- sys/dev/pci/drm/i915/gt/gen8_engine_cs.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/sys/dev/pci/drm/i915/gt/gen8_engine_cs.c b/sys/dev/pci/drm/i915/gt/gen8_engine_cs.c index 8e286733a43..6a8c2fab4ca 100644 --- a/sys/dev/pci/drm/i915/gt/gen8_engine_cs.c +++ b/sys/dev/pci/drm/i915/gt/gen8_engine_cs.c @@ -193,7 +193,11 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode) { struct intel_engine_cs *engine = rq->engine; - if (mode & EMIT_FLUSH) { + /* + * On Aux CCS platforms the invalidation of the Aux + * table requires quiescing memory traffic beforehand + */ + if (mode & EMIT_FLUSH || gen12_needs_ccs_aux_inv(engine)) { u32 flags = 0; u32 *cs; -- 2.20.1