From 9b916b1ca33ba7ba0644b05a8f13d55434b1c664 Mon Sep 17 00:00:00 2001 From: jsg Date: Mon, 27 Mar 2023 03:52:40 +0000 Subject: [PATCH] drm/amd: Avoid ASSERT for some message failures From Mario Limonciello a0f406db3ede83791940adfc6cb1d67486e31ff7 in linux-6.1.y/6.1.16 3e5019ee67760cd61b2a5fd605e1289c2f92d983 in mainline linux --- sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c b/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c index 710bcece19a..8bcb83d6538 100644 --- a/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c +++ b/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c @@ -146,6 +146,9 @@ static int dcn314_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, if (msg_id == VBIOSSMC_MSG_TransferTableDram2Smu && param == TABLE_WATERMARKS) DC_LOG_WARNING("Watermarks table not configured properly by SMU"); + else if (msg_id == VBIOSSMC_MSG_SetHardMinDcfclkByFreq || + msg_id == VBIOSSMC_MSG_SetMinDeepSleepDcfclk) + DC_LOG_WARNING("DCFCLK_DPM is not enabled by BIOS"); else ASSERT(0); REG_WRITE(MP1_SMN_C2PMSG_91, VBIOSSMC_Result_OK); -- 2.20.1