From 90d1a4730476fbf45f3afa239741535bc113edcb Mon Sep 17 00:00:00 2001 From: jsg Date: Sat, 27 Nov 2021 04:29:00 +0000 Subject: [PATCH] drm/i915/dp: Ensure sink rate values are always valid From Imre Deak 47901b77bf7dc801a084a0b377aee5974d9bc4ce in linux 5.10.y/5.10.82 6c34bd4532a3f39952952ddc102737595729afc4 in mainline linux --- sys/dev/pci/drm/i915/display/intel_dp.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/sys/dev/pci/drm/i915/display/intel_dp.c b/sys/dev/pci/drm/i915/display/intel_dp.c index 7f2727c077a..c4c4a99b79f 100644 --- a/sys/dev/pci/drm/i915/display/intel_dp.c +++ b/sys/dev/pci/drm/i915/display/intel_dp.c @@ -154,6 +154,12 @@ static void vlv_steal_power_sequencer(struct drm_i915_private *dev_priv, enum pipe pipe); static void intel_dp_unset_edid(struct intel_dp *intel_dp); +static void intel_dp_set_default_sink_rates(struct intel_dp *intel_dp) +{ + intel_dp->sink_rates[0] = 162000; + intel_dp->num_sink_rates = 1; +} + /* update sink rates from dpcd */ static void intel_dp_set_sink_rates(struct intel_dp *intel_dp) { @@ -4678,6 +4684,9 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp) */ intel_psr_init_dpcd(intel_dp); + /* Clear the default sink rates */ + intel_dp->num_sink_rates = 0; + /* Read the eDP 1.4+ supported link rates. */ if (intel_dp->edp_dpcd[0] >= DP_EDP_14) { __le16 sink_rates[DP_MAX_SUPPORTED_RATES]; @@ -7781,6 +7790,8 @@ intel_dp_init_connector(struct intel_digital_port *dig_port, return false; intel_dp_set_source_rates(intel_dp); + intel_dp_set_default_sink_rates(intel_dp); + intel_dp_set_common_rates(intel_dp); intel_dp->reset_link_params = true; intel_dp->pps_pipe = INVALID_PIPE; -- 2.20.1