From 8c57ab1d815e0b80322e3c501c1ee34d98f787d8 Mon Sep 17 00:00:00 2001 From: deraadt Date: Sun, 15 Sep 1996 21:12:08 +0000 Subject: [PATCH] sync to netbsd; for graichen --- sys/arch/pmax/conf/DISKLESS | 89 - sys/arch/pmax/conf/GENERIC | 186 ++ sys/arch/pmax/conf/GENERIC.pmax | 91 - sys/arch/pmax/conf/GLUTTON | 77 - sys/arch/pmax/conf/MINIROOT | 2 +- sys/arch/pmax/conf/Makefile.pmax | 203 +- sys/arch/pmax/conf/NEWCONF | 7 +- sys/arch/pmax/conf/TOCCATA | 66 - sys/arch/pmax/conf/devices.pmax.oldconf | 3 - sys/arch/pmax/conf/files.pmax | 116 +- sys/arch/pmax/conf/files.pmax.oldconf | 41 - sys/arch/pmax/conf/std.pmax | 2 +- sys/arch/pmax/dev/ascreg.h | 14 +- sys/arch/pmax/dev/bt459.c | 61 +- sys/arch/pmax/dev/bt478.c | 120 +- sys/arch/pmax/dev/cfb.c | 114 +- sys/arch/pmax/dev/dc.c | 193 +- sys/arch/pmax/dev/dcvar.h | 7 +- sys/arch/pmax/dev/device.h | 13 +- sys/arch/pmax/dev/dtop.c | 198 +- sys/arch/pmax/dev/dtopvar.h | 8 + sys/arch/pmax/dev/fb.c | 90 +- sys/arch/pmax/dev/fb_usrreq.c | 65 +- sys/arch/pmax/dev/font.c | 4 +- sys/arch/pmax/dev/ims332.c | 29 +- sys/arch/pmax/dev/ims332.h | 4 +- sys/arch/pmax/dev/lk201.c | 2 + sys/arch/pmax/dev/lk201var.h | 15 + sys/arch/pmax/dev/mfb.c | 178 +- sys/arch/pmax/dev/mfbreg.h | 8 +- sys/arch/pmax/dev/pdma.h | 4 +- sys/arch/pmax/dev/pm.c | 61 +- sys/arch/pmax/dev/pmvar.h | 5 + sys/arch/pmax/dev/qvss.h | 32 +- sys/arch/pmax/dev/qvss_compat.c | 33 +- sys/arch/pmax/dev/qvssvar.h | 28 + sys/arch/pmax/dev/rcons.c | 50 +- sys/arch/pmax/dev/rz.c | 113 +- sys/arch/pmax/dev/sccvar.h | 9 - sys/arch/pmax/dev/scsi.c | 37 +- sys/arch/pmax/dev/scsi.h | 19 +- sys/arch/pmax/dev/sfb.c | 134 +- sys/arch/pmax/dev/sfbreg.h | 2 +- sys/arch/pmax/dev/sii.c | 179 +- sys/arch/pmax/dev/tz.c | 72 +- sys/arch/pmax/dev/xcfb.c | 64 +- sys/arch/pmax/dev/xcfbvar.h | 6 + sys/arch/pmax/dist/get | 7 +- sys/arch/pmax/include/ansi.h | 75 +- sys/arch/pmax/include/autoconf.h | 49 +- sys/arch/pmax/include/bsd-aout.h | 32 +- sys/arch/pmax/include/cdefs.h | 46 +- sys/arch/pmax/include/conf.h | 35 + sys/arch/pmax/include/cpu.h | 156 +- sys/arch/pmax/include/ecoff.h | 47 +- sys/arch/pmax/include/elf.h | 138 +- sys/arch/pmax/include/endian.h | 95 +- sys/arch/pmax/include/exec.h | 49 +- sys/arch/pmax/include/float.h | 81 +- sys/arch/pmax/include/ieeefp.h | 19 +- sys/arch/pmax/include/kdbparam.h | 75 +- sys/arch/pmax/include/limits.h | 99 +- sys/arch/pmax/include/locore.h | 18 + sys/arch/pmax/include/machAsmDefs.h | 183 +- sys/arch/pmax/include/machConst.h | 389 +++- sys/arch/pmax/include/mips_opcode.h | 192 +- sys/arch/pmax/include/param.h | 80 +- sys/arch/pmax/include/pcb.h | 63 +- sys/arch/pmax/include/pmap.h | 107 +- sys/arch/pmax/include/proc.h | 54 +- sys/arch/pmax/include/profile.h | 80 +- sys/arch/pmax/include/pte.h | 8 +- sys/arch/pmax/include/ptrace.h | 51 +- sys/arch/pmax/include/reg.h | 63 +- sys/arch/pmax/include/regdef.h | 74 +- sys/arch/pmax/include/regnum.h | 146 +- sys/arch/pmax/include/reloc.h | 75 +- sys/arch/pmax/include/setjmp.h | 8 +- sys/arch/pmax/include/signal.h | 67 +- sys/arch/pmax/include/stdarg.h | 57 +- sys/arch/pmax/include/tc_machdep.h | 39 +- sys/arch/pmax/include/trap.h | 65 +- sys/arch/pmax/include/types.h | 82 +- sys/arch/pmax/include/varargs.h | 62 +- sys/arch/pmax/include/vmparam.h | 241 +-- sys/arch/pmax/pmax/asic.h | 381 ++-- sys/arch/pmax/pmax/autoconf.c | 146 +- sys/arch/pmax/pmax/clock.c | 171 +- sys/arch/pmax/pmax/conf-glue.c | 30 +- sys/arch/pmax/pmax/conf.c | 51 +- sys/arch/pmax/pmax/cpu.c | 56 +- sys/arch/pmax/pmax/cpu_cons.c | 71 +- sys/arch/pmax/pmax/cpu_exec.c | 157 -- sys/arch/pmax/pmax/disksubr.c | 27 +- sys/arch/pmax/pmax/elf.c | 194 -- sys/arch/pmax/pmax/genassym.c | 75 - sys/arch/pmax/pmax/kmin.h | 96 +- sys/arch/pmax/pmax/kn01var.h | 25 + sys/arch/pmax/pmax/kn03.h | 88 +- sys/arch/pmax/pmax/locore.S | 2291 +++++++++++++++++------ sys/arch/pmax/pmax/machdep.c | 467 +++-- sys/arch/pmax/pmax/mainbus.c | 254 +-- sys/arch/pmax/pmax/maxine.h | 116 +- sys/arch/pmax/pmax/mem.c | 171 -- sys/arch/pmax/pmax/pmap.c | 91 +- sys/arch/pmax/pmax/pmax_trap.c | 915 +++++++++ sys/arch/pmax/pmax/process_machdep.c | 113 -- sys/arch/pmax/pmax/sys_machdep.c | 13 +- sys/arch/pmax/pmax/trap.c | 1195 +++++------- sys/arch/pmax/pmax/turbochannel.h | 9 +- sys/arch/pmax/pmax/vm_machdep.c | 79 +- sys/arch/pmax/stand/Makefile | 6 +- sys/arch/pmax/stand/dec_prom.h | 8 +- sys/arch/pmax/stand/filesystem.c | 2 +- sys/arch/pmax/tc/asic.c | 209 ++- sys/arch/pmax/tc/ds-asic-conf.c | 39 +- sys/arch/pmax/tc/ds-tc-conf.c | 179 -- sys/arch/pmax/tc/if_le.c | 297 ++- sys/arch/pmax/tc/if_levar.h | 38 +- sys/arch/pmax/tc/ioasicvar.h | 9 + sys/arch/pmax/tc/scc.c | 255 ++- sys/arch/pmax/tc/sccvar.h | 26 + sys/arch/pmax/tc/tc.c | 425 +---- sys/arch/pmax/tc/tc_subr.c | 511 +++++ 124 files changed, 7636 insertions(+), 7711 deletions(-) delete mode 100644 sys/arch/pmax/conf/DISKLESS create mode 100644 sys/arch/pmax/conf/GENERIC delete mode 100644 sys/arch/pmax/conf/GENERIC.pmax delete mode 100644 sys/arch/pmax/conf/GLUTTON delete mode 100644 sys/arch/pmax/conf/TOCCATA delete mode 100644 sys/arch/pmax/conf/devices.pmax.oldconf delete mode 100644 sys/arch/pmax/conf/files.pmax.oldconf create mode 100644 sys/arch/pmax/dev/dtopvar.h create mode 100644 sys/arch/pmax/dev/lk201var.h create mode 100644 sys/arch/pmax/dev/pmvar.h create mode 100644 sys/arch/pmax/dev/qvssvar.h delete mode 100644 sys/arch/pmax/dev/sccvar.h create mode 100644 sys/arch/pmax/dev/xcfbvar.h create mode 100644 sys/arch/pmax/include/conf.h create mode 100644 sys/arch/pmax/include/locore.h delete mode 100644 sys/arch/pmax/pmax/cpu_exec.c delete mode 100644 sys/arch/pmax/pmax/elf.c delete mode 100644 sys/arch/pmax/pmax/genassym.c create mode 100644 sys/arch/pmax/pmax/kn01var.h delete mode 100644 sys/arch/pmax/pmax/mem.c create mode 100644 sys/arch/pmax/pmax/pmax_trap.c delete mode 100644 sys/arch/pmax/pmax/process_machdep.c delete mode 100644 sys/arch/pmax/tc/ds-tc-conf.c create mode 100644 sys/arch/pmax/tc/ioasicvar.h create mode 100644 sys/arch/pmax/tc/sccvar.h create mode 100644 sys/arch/pmax/tc/tc_subr.c diff --git a/sys/arch/pmax/conf/DISKLESS b/sys/arch/pmax/conf/DISKLESS deleted file mode 100644 index 3d670e86a81..00000000000 --- a/sys/arch/pmax/conf/DISKLESS +++ /dev/null @@ -1,89 +0,0 @@ -# $NetBSD: DISKLESS,v 1.2 1994/10/26 21:08:42 cgd Exp $ -# -# Diskless DECstation (3100 or 5000/xxx) -# -# @(#)GENERIC.pmax 8.1 (Berkeley) 6/29/93 -# -machine pmax - -cpu "DS3100" -cpu "DS5000" -ident DISKLESS - -# Need to set locally -timezone 8 dst -maxusers 48 - -# Standard system options -options SWAPPAGER # swap pager (anonymous and swap space) -options VNODEPAGER # vnode pager (mapped files) -options DEVPAGER # device pager (mapped devices) -options DIAGNOSTIC # extra kernel debugging checks -options DEBUG # extra kernel debugging support -options "COMPAT_43" # compatibility with 4.3BSD binaries -options KTRACE # system call tracing support -options "NKMEMCLUSTERS=1024" # 4K pages in kernel malloc pool -#options KGDB # support for kernel gdb -#options "KGDBRATE=19200" # kernel gdb port rate (default 9600) -#options "KGDBDEV=15*256+0" # device for kernel gdb - -# Filesystem options -options FIFO # POSIX fifo support (in all filesystems) -options FFS,QUOTA # fast filesystem with user and group quotas -options MFS # memory-based filesystem -options NFSCLIENT # Sun NFS-compatible filesystem (client) -options NFSSERVER # Sun NFS-compatible filesystem (server) -options LOFS # Loop-back filesystem -options KERNFS # kernel data-structure filesystem -#options FDESC # user file descriptor filesystem -#options UMAPFS # uid/gid remapping filesystem -#options NULLFS # null layer filesystem -#options LFS # Log-based filesystem (still experimental) -#options PORTAL # portal filesystem (still experimental) - -# Networking options -options INET # Internet protocols -#options "TCP_COMPAT_42" # compatibility with 4.2BSD TCP/IP -options GATEWAY # IP packet forwarding -#options MULTICAST # Multicast support -#options MROUTING # Multicast routing support -#options ISO # OSI networking -#options TPIP -#options EON - -# pmax specific -options COMPAT_ULTRIX # ultrix compatibility - -config netbsd swap nfs - -controller dtop0 at nexus0 csr ? -controller dc0 at nexus0 csr ? -controller xcfb0 at nexus0 csr ? -controller cfb0 at nexus0 csr ? -controller mfb0 at nexus0 csr ? -controller pm0 at nexus0 csr ? -controller scc0 at nexus0 csr ? -controller scc1 at nexus0 csr ? -controller le0 at nexus0 csr ? -master sii0 at nexus0 csr ? -disk rz0 at sii0 drive 0 slave 0 -disk rz1 at sii0 drive 1 slave 0 -disk rz2 at sii0 drive 2 slave 0 -disk rz3 at sii0 drive 3 slave 0 -disk rz4 at sii0 drive 4 slave 0 -tape tz0 at sii0 drive 5 slave 0 -tape tz1 at sii0 drive 6 slave 0 -master asc0 at nexus0 csr ? -disk rz0 at asc0 drive 0 slave 0 -disk rz1 at asc0 drive 1 slave 0 -disk rz2 at asc0 drive 2 slave 0 -disk rz3 at asc0 drive 3 slave 0 -disk rz4 at asc0 drive 4 slave 0 -tape tz0 at asc0 drive 5 slave 0 -tape tz1 at asc0 drive 6 slave 0 - -pseudo-device sl 4 # serial-line IP ports -pseudo-device pty 64 # pseudo ptys -pseudo-device bpfilter 16 # packet filter ports -pseudo-device loop -pseudo-device ether diff --git a/sys/arch/pmax/conf/GENERIC b/sys/arch/pmax/conf/GENERIC new file mode 100644 index 00000000000..2f22a07a147 --- /dev/null +++ b/sys/arch/pmax/conf/GENERIC @@ -0,0 +1,186 @@ +# +# DECstation (3100 or 5000/xxx) +# +# Generic config.new configuration for NetBSD/pmax +# $NetBSD: GENERIC,v 1.1.4.1 1996/09/09 20:29:33 thorpej Exp $ +# +include "std.pmax" + +maxusers 8 + +# enables fudging of swap blocks to swap after a miniroot +# in the b partition, and make the kernel call setconf() to ask +# what the root device is. +options GENERIC + +options CPU_R3000 # R2000/R3000 support + +# replaces "cpu ds5k/240" +options DS5000_240 # 3MAXPLUS (kn03) support +options DS5000_100 # 3MIN (kn02ba/kmin) support +options DS5000_25 # MAXINE (kn02ca/xine) support +options DS5000_200 # 3MAX (kn02) support, one day + +options DS3100 # PMAX (kn01) DECstation 2100, 3100 + + +# You need to set this locally, but it doesn't do much outside the kernel. +# Set up /etc/localtime instead. +options TIMEZONE="0" # minutes west of GMT (for) +options DST=0 # use daylight savings rules + + +# Standard system options +options SWAPPAGER # swap pager (anonymous and swap space) +options VNODEPAGER # vnode pager (mapped files) +options DEVPAGER # device pager (mapped devices) +#options DIAGNOSTIC # extra kernel debugging checks +options DEBUG # extra kernel debugging support +options "COMPAT_43" # compatibility with 4.3BSD binaries +options KTRACE # system call tracing support +options "NKMEMCLUSTERS=1024" # 4K pages in kernel malloc pool + +#options KGDB # support for kernel gdb +#options "KGDBRATE=19200" # kernel gdb port rate (default 9600) +#options "KGDBDEV=15*256+0" # device for kernel gdb + +# Filesystem options +options FIFO # POSIX fifo support (in all filesystems) +options FFS,QUOTA # fast filesystem with user and group quotas +options MFS # memory-based filesystem +options NFSCLIENT # Sun NFS-compatible filesystem (client) +options NFSSERVER # Sun NFS-compatible filesystem (server) +options KERNFS # kernel data-structure filesystem +#options FDESC # user file descriptor filesystem +#options UMAPFS # uid/gid remapping filesystem +options NULLFS # null layer filesystem +#options LFS # Log-based filesystem (still experimental) +#options PORTAL # portal filesystem (still experimental) + +# Networking options +options INET # Internet protocols +options "TCP_COMPAT_42" # compatibility with 4.2BSD TCP/IP +options GATEWAY # IP packet forwarding +#options MULTICAST # Multicast support +#options MROUTING # Multicast routing support +#options ISO # OSI networking +#options TPIP +#options EON + +options COMPAT_10 # Pre-NetBSD 1.1 compatibility +options COMPAT_11 + +# pmax specific +options COMPAT_ULTRIX # ultrix compatibility +options "HZ=256" # RTC rate required + +# Note that this configuration is unlikely to work, yet... +config gennetbsd swap generic + + +######################################################################## +# # +# DECstation Turbochannel configuration and options # +# # +######################################################################## + +tc* at mainbus0 # All but PMAXes have a turbochannel + + +######################################################################## +# Common configuration for machines with IO ASIC chips # +# (3MIN, MAXINE, 3MAXPLUS) # +######################################################################## +ioasic0 at tc? +clock0 at ioasic? # RTC +asc0 at ioasic? # system SCSI subslot +scc0 at ioasic? +le0 at ioasic? # tc onboard lance +scc1 at ioasic? # Not present on Maxine + +######################################################################## +# MAXINE-only baseboard devices and on-baseboard "options" # +######################################################################## +xcfb0 at tc? # TC framebuffer "option" +dtop0 at ioasic0 +#isdn at ioasic0 +#fdc at ioasic0 # floppy disk + + +######################################################################## +# Configuration for 3MAX (5000/200) which has turbochannel but no ASIC.# +# 3MAX (5000/200) baseboard devices and on-baseboard "options" # +######################################################################## +clock0 at mainbus0 # RTC +dc0 at mainbus0 +le0 at tc? #slot ? offset ? # TC ether "option" on baseboard +asc0 at tc? # TC scsi "option" on baseboard +# For now, pretend this machine has an IOASIC. +dc0 at ioasic? # dc7083 four-port DZ device + +######################################################################## +# Supported turbochannel option cards # +######################################################################## +cfb0 at tc? +mfb0 at tc? +sfb0 at tc? +#sfb1 at tc? +le* at tc? #slot ? offset ? # TC ether option +#tt0 at tc? #slot? offset ? + + +######################################################################## +# Decstation 2100/3100 (aka PMAX aka KN01) configuration. # +# (these don't really have any options except a framebuffer.) # +######################################################################## +clock0 at mainbus0 # RTC +pm0 at mainbus0 # 3100 onboard fb +dc0 at mainbus0 # dc7083 four-port DZ device +le0 at mainbus0 # 3100 onboard lance +sii0 at mainbus0 # onboard scsi + + +######################################################################## +# SCSI configuration # +######################################################################## + +# +# SCSI configuration for new-config machine-independent SCSI driver +# +scsibus* at sii? +scsibus* at asc? + +sd* at scsibus? target ? lun ? +st* at scsibus? target ? lun ? +cd* at scsibus? target ? lun ? + + +# +# SCSI configuration for old DECstation SCSI driver +# +oldscsibus* at sii? +oldscsibus* at asc? + +rz0 at oldscsibus? target ? drive ? +rz1 at oldscsibus? target ? drive ? +rz2 at oldscsibus? target ? drive ? +rz3 at oldscsibus? target ? drive ? +rz4 at oldscsibus? target ? drive ? +rz5 at oldscsibus? target ? drive ? +tz0 at oldscsibus? target? drive ? +tz1 at oldscsibus? target? drive ? + + +# +# pseudo-devices +# + +pseudo-device sl 4 # serial-line IP ports +pseudo-device pty 64 # pseudo ptys +pseudo-device bpfilter 16 # packet filter ports +pseudo-device loop +pseudo-device vnd 4 # virtual disk ick + +#pseudo-device ether # From old config. what does it mean? +pseudo-device rasterconsole 1 # NB: raster console requires "fb" +pseudo-device fb 3 # up to 3 framebuffers diff --git a/sys/arch/pmax/conf/GENERIC.pmax b/sys/arch/pmax/conf/GENERIC.pmax deleted file mode 100644 index e96edcb68c8..00000000000 --- a/sys/arch/pmax/conf/GENERIC.pmax +++ /dev/null @@ -1,91 +0,0 @@ -# $NetBSD: GENERIC.pmax,v 1.6 1995/07/18 02:02:38 jonathan Exp $ -# -# GENERIC DECstation (3100 or 5000/xxx) -# -# @(#)GENERIC.pmax 8.1 (Berkeley) 6/29/93 -# -machine pmax - -cpu "DS3100" -cpu "DS5000" -cpu "DS5000_240" -ident GENERIC - -# Need to set locally -timezone 8 dst -maxusers 48 - -# Standard system options -options SWAPPAGER # swap pager (anonymous and swap space) -options VNODEPAGER # vnode pager (mapped files) -options DEVPAGER # device pager (mapped devices) -options DIAGNOSTIC # extra kernel debugging checks -options DEBUG # extra kernel debugging support -options "COMPAT_43" # compatibility with 4.3BSD binaries -options KTRACE # system call tracing support -options "NKMEMCLUSTERS=1024" # 4K pages in kernel malloc pool -#options KGDB # support for kernel gdb -#options "KGDBRATE=19200" # kernel gdb port rate (default 9600) -#options "KGDBDEV=15*256+0" # device for kernel gdb - -# Filesystem options -options FIFO # POSIX fifo support (in all filesystems) -options FFS,QUOTA # fast filesystem with user and group quotas -options MFS # memory-based filesystem -options NFSCLIENT # Sun NFS-compatible filesystem (client) -options NFSSERVER # Sun NFS-compatible filesystem (server) -options LOFS # Loop-back filesystem -options KERNFS # kernel data-structure filesystem -#options FDESC # user file descriptor filesystem -#options UMAPFS # uid/gid remapping filesystem -#options NULLFS # null layer filesystem -#options LFS # Log-based filesystem (still experimental) -#options PORTAL # portal filesystem (still experimental) - -# Networking options -options INET # Internet protocols -#options "TCP_COMPAT_42" # compatibility with 4.2BSD TCP/IP -options GATEWAY # IP packet forwarding -#options MULTICAST # Multicast support -#options MROUTING # Multicast routing support -#options ISO # OSI networking -#options TPIP -#options EON - -# pmax specific -options COMPAT_ULTRIX # ultrix compatibility - -config netbsd swap generic -#config netbsd root on rz0a swap on rz0b dumps on rz0b - -controller dtop0 at nexus0 csr ? -controller dc0 at nexus0 csr ? -controller xcfb0 at nexus0 csr ? -controller cfb0 at nexus0 csr ? -controller mfb0 at nexus0 csr ? -controller pm0 at nexus0 csr ? -controller scc0 at nexus0 csr ? -controller scc1 at nexus0 csr ? -controller le0 at nexus0 csr ? -master sii0 at nexus0 csr ? -disk rz0 at sii0 drive 0 slave 0 -disk rz1 at sii0 drive 1 slave 0 -disk rz2 at sii0 drive 2 slave 0 -disk rz3 at sii0 drive 3 slave 0 -disk rz4 at sii0 drive 4 slave 0 -tape tz0 at sii0 drive 5 slave 0 -tape tz1 at sii0 drive 6 slave 0 -master asc0 at nexus0 csr ? -disk rz0 at asc0 drive 0 slave 0 -disk rz1 at asc0 drive 1 slave 0 -disk rz2 at asc0 drive 2 slave 0 -disk rz3 at asc0 drive 3 slave 0 -disk rz4 at asc0 drive 4 slave 0 -tape tz0 at asc0 drive 5 slave 0 -tape tz1 at asc0 drive 6 slave 0 - -pseudo-device sl 4 # serial-line IP ports -pseudo-device pty 64 # pseudo ptys -pseudo-device bpfilter 16 # packet filter ports -pseudo-device loop -pseudo-device ether diff --git a/sys/arch/pmax/conf/GLUTTON b/sys/arch/pmax/conf/GLUTTON deleted file mode 100644 index 6f5249aba42..00000000000 --- a/sys/arch/pmax/conf/GLUTTON +++ /dev/null @@ -1,77 +0,0 @@ -# $NetBSD: GLUTTON,v 1.3 1994/10/26 21:08:44 cgd Exp $ -# -# GLUTTON - Adam's test DS3100 -# -# @(#)GENERIC.pmax 8.1 (Berkeley) 6/29/93 -# -machine pmax - -cpu "DS3100" -ident GENERIC - -# Need to set locally -timezone 8 dst -maxusers 5 - -# Standard system options -options SWAPPAGER # swap pager (anonymous and swap space) -options VNODEPAGER # vnode pager (mapped files) -options DEVPAGER # device pager (mapped devices) -options DIAGNOSTIC # extra kernel debugging checks -options DEBUG # extra kernel debugging support -options "COMPAT_43" # compatibility with 4.3BSD binaries -options COMPAT_ULTRIX # compatibility with ULTRIX binaries -options KTRACE # system call tracing support -options "NKMEMCLUSTERS=1024" # 4K pages in kernel malloc pool -#options KGDB # support for kernel gdb -#options "KGDBRATE=19200" # kernel gdb port rate (default 9600) -#options "KGDBDEV=15*256+0" # device for kernel gdb - -# special extra nasty debugging stuff -options SYSCALL_DEBUG -#options VMFAULT_TRACE - -# Filesystem options -options FIFO # POSIX fifo support (in all filesystems) -options FFS,QUOTA # fast filesystem with user and group quotas -options MFS # memory-based filesystem -options NFSCLIENT # Sun NFS-compatible filesystem (client) -options NFSSERVER # Sun NFS-compatible filesystem (server) -options LOFS # Loop-back filesystem -options KERNFS # kernel data-structure filesystem -#options FDESC # user file descriptor filesystem -#options UMAPFS # uid/gid remapping filesystem -#options NULLFS # null layer filesystem -#options LFS # Log-based filesystem (still experimental) -#options PORTAL # portal filesystem (still experimental) - -# Networking options -options INET # Internet protocols -#options "TCP_COMPAT_42" # compatibility with 4.2BSD TCP/IP -options GATEWAY # IP packet forwarding -#options MULTICAST # Multicast support -#options MROUTING # Multicast routing support -#options ISO # OSI networking -#options TPIP -#options EON - -config netbsd swap generic -#config netbsd root on rz0a swap on rz0b dumps on rz0b - -controller dc0 at nexus0 csr ? -controller pm0 at nexus0 csr ? -controller le0 at nexus0 csr ? -master sii0 at nexus0 csr ? -disk rz0 at sii0 drive 0 slave 0 -disk rz1 at sii0 drive 1 slave 0 -disk rz2 at sii0 drive 2 slave 0 -disk rz3 at sii0 drive 3 slave 0 -disk rz4 at sii0 drive 4 slave 0 -tape tz0 at sii0 drive 5 slave 0 -tape tz1 at sii0 drive 6 slave 0 - -pseudo-device sl 4 # serial-line IP ports -pseudo-device pty 20 # pseudo ptys -pseudo-device bpfilter 5 # packet filter ports -pseudo-device loop -pseudo-device ether diff --git a/sys/arch/pmax/conf/MINIROOT b/sys/arch/pmax/conf/MINIROOT index 5dcdec39791..15a77af722e 100644 --- a/sys/arch/pmax/conf/MINIROOT +++ b/sys/arch/pmax/conf/MINIROOT @@ -60,7 +60,7 @@ options NULLFS # null layer filesystem # Networking options options INET # Internet protocols -#options "TCP_COMPAT_42" # compatibility with 4.2BSD TCP/IP +options "TCP_COMPAT_42" # compatibility with 4.2BSD TCP/IP options GATEWAY # IP packet forwarding #options MULTICAST # Multicast support #options MROUTING # Multicast routing support diff --git a/sys/arch/pmax/conf/Makefile.pmax b/sys/arch/pmax/conf/Makefile.pmax index b3efbd4c773..2830beeaf6d 100644 --- a/sys/arch/pmax/conf/Makefile.pmax +++ b/sys/arch/pmax/conf/Makefile.pmax @@ -1,17 +1,15 @@ -# $NetBSD: Makefile.pmax,v 1.19 1996/01/14 21:06:54 thorpej Exp $ +# $NetBSD: Makefile.pmax,v 1.29 1996/05/19 22:44:12 mhitch Exp $ -# @(#)Makefile.pmax 8.2 (Berkeley) 2/16/94 -# -# Makefile for 4.4 BSD +# Makefile for NetBSD # # This makefile is constructed from a machine description: # config machineid # Most changes should be made in the machine description -# /sys/arch/MACHINE/conf/``machineid'' +# /sys/arch/pmax/conf/``machineid'' # after which you should do -# config machineid +# config machineid # Machine generic makefile changes should be made in -# /sys/arch/MACHINE/conf/Makefile.``machinetype'' +# /sys/arch/pmax/conf/Makefile.pmax # after which config should be rerun for all machines of that type. # # N.B.: NO DEPENDENCIES ON FOLLOWING FLAGS ARE VISIBLE TO MAKEFILE @@ -20,23 +18,25 @@ # -DTRACE compile in kernel tracing hooks # -DQUOTA compile in file system quotas +# DEBUG is set to -g if debugging. +# PROF is set to -pg if profiling. -# DEBUG is set to -g by config if debugging is requested (config -g). -# PROF is set to -pg by config if profiling is requested (config -p). -TOUCH= touch -f -c +AS?= as +CC?= cc +CPP?= cpp +LD?= ld +STRIP?= strip -d +TOUCH?= touch -f -c # source tree is located via $S relative to the compilation directory S= ../../../.. PMAX= ../.. -INCLUDES= -I. -I$S/arch -I$S -I$S/sys -COPTS= ${INCLUDES} ${IDENT} -D_KERNEL -Dpmax -D__NetBSD__ ${GP} -CPPOPTS=${INCLUDES} ${IDENT} -D_KERNEL -Dpmax -D__NetBSD__ -.ifdef DEBUG -CFLAGS= ${DEBUG} -Werror -fno-builtin ${COPTS} -.else -CFLAGS= -O2 -Werror -fno-builtin ${COPTS} -.endif +INCLUDES= -I. -I$S/arch -I$S +CPPFLAGS= ${INCLUDES} ${IDENT} -D_KERNEL -Dpmax ${GP} +CFLAGS= ${DEBUG} -O2 -Werror +AFLAGS= -x assembler-with-cpp -traditional-cpp -D_LOCORE +LINKFLAGS= -N -Ttext 80030000 -e start ### find out what to use for libkern .include "$S/lib/libkern/Makefile.inc" @@ -54,141 +54,128 @@ LIBCOMPAT= ${COMPATLIB} LIBCOMPAT= ${COMPATLIB_PROF} .endif -TARGET_MACHINE = pmax -TARGET_ARCH = mips -.if (${MACHINE} != pmax) -CC= /usr/local/mips-dec-netbsd/bin/gcc -LD= /usr/local/mips-dec-netbsd/bin/ld -AS= /usr/local/mips-dec-netbsd/bin/as -AR= /usr/local/mips-dec-netbsd/bin/ar -NM= /usr/local/mips-dec-netbsd/bin/nm -LORDER= NM=$(NM) sh ../../../../../../../usr.bin/lorder/lorder.sh.gnm -RANLIB= /usr/local/mips-dec-netbsd/bin/ranlib -.endif - # compile rules: rules are named ${TYPE}_${SUFFIX}${CONFIG_DEP} # where TYPE is NORMAL, DRIVER, or PROFILE}; SUFFIX is the file suffix, # capitalized (e.g. C for a .c file), and CONFIG_DEP is _C if the file # is marked as config-dependent. -NORMAL_C= ${CC} -c ${CFLAGS} ${PROF} $< -NORMAL_C_C= ${CC} -c ${CFLAGS} ${PROF} ${PARAM} $< - -DRIVER_C= ${CC} -c ${CFLAGS} ${PROF} $< -DRIVER_C_C= ${CC} -c ${CFLAGS} ${PROF} ${PARAM} $< +NORMAL_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $< +NORMAL_C_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} ${PARAM} -c $< -PROFILE_C= ${CC} -p -c ${COPTS} $< +DRIVER_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $< +DRIVER_C_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} ${PARAM} -c $< -NORMAL_S= ${AS} ${COPTS} $< -o $@ -NORMAL_S_C= ${AS} ${COPTS} ${PARAM} $< -o $@ +NORMAL_S= ${CC} ${AFLAGS} ${CPPFLAGS} -c $< +NORMAL_S_C= ${CC} ${AFLAGS} ${CPPFLAGS} ${PARAM} -c $< %OBJS %CFILES +%SFILES + # load lines for config "xxx" will be emitted as: # xxx: ${SYSTEM_DEP} swapxxx.o # ${SYSTEM_LD_HEAD} # ${SYSTEM_LD} swapxxx.o # ${SYSTEM_LD_TAIL} -SYSTEM_OBJ= locore.o fp.o ${OBJS} param.o ioconf.o ${LIBKERN} \ - ${LIBCOMPAT} -#SYSTEM_DEP= Makefile symbols.sort ${SYSTEM_OBJ} ${LIBKERN} +SYSTEM_OBJ= locore.o fp.o \ + param.o ioconf.o ${OBJS} ${LIBKERN} ${LIBCOMPAT} SYSTEM_DEP= Makefile ${SYSTEM_OBJ} -SYSTEM_LD_HEAD= rm -f $@ -SYSTEM_LD= -@if [ X${DEBUG} = X-g ]; \ - then strip=-X; \ - else strip=-x; \ - fi; \ - echo ${LD} $$strip -N -o $@ -e start -Ttext 80030000 \ - '$${SYSTEM_OBJ}' vers.o ; \ - ${LD} $$strip -N -o $@ -e start -Ttext 80030000 \ - ${SYSTEM_OBJ} vers.o -#SYSTEM_LD_TAIL= @echo rearranging symbols;\ -# symorder symbols.sort $@;\ -#SYSTEM_LD_TAIL= @size $@; chmod 755 $@; \ -# [ X${DEBUG} = X-g ] && { \ -# echo cp $@ $@.gdb; rm -f $@.gdb; cp $@ $@.gdb; \ -# echo strip -d $@; strip -d $@; } || true -SYSTEM_LD_TAIL= mv $@ ${@}.elf; \ - elf2aout ${@}.elf $@; \ +SYSTEM_LD_HEAD= @rm -f $@ +SYSTEM_LD= @echo ${LD} ${LINKFLAGS} -o $@ '$${SYSTEM_OBJ}' vers.o ; \ + ${LD} ${LINKFLAGS} -o $@ ${SYSTEM_OBJ} vers.o +SYSTEM_LD_TAIL= @size $@; chmod 755 $@ + +DEBUG?= +.if ${DEBUG} == "-g" +LINKFLAGS+= -X +SYSTEM_LD_TAIL+=; \ + echo cp $@ $@.gdb; rm -f $@.gdb; cp $@ $@.gdb; \ + echo ${STRIP} $@; ${STRIP} $@ +.else +LINKFLAGS+= -x +.endif + +SYSTEM_LD_TAIL+=;\ + mv $@ $@.elf; \ + elf2aout $@.elf $@; \ chmod 755 $@ %LOAD -newvers: - sh $S/conf/newvers.sh - ${CC} $(CFLAGS) -c vers.c - -clean:: - rm -f eddep *vmunix vmunix.gdb tags *.o locore.i [a-z]*.s \ - Errs errs linterrs makelinks genassym +assym.h: genassym + ./genassym >assym.h -lint: /tmp param.c - @lint -hbxn -DGENERIC -Dvolatile= ${COPTS} ${PARAM} -UKGDB \ - ${PMAX}/pmax/Locore.c ${CFILES} ${PMAX}/pmax/swapgeneric.c \ - ioconf.c param.c +genassym: genassym.o + ${CC} -o $@ genassym.o -symbols.sort: ${PMAX}/pmax/symbols.raw - grep -v '^#' ${PMAX}/pmax/symbols.raw \ - | sed 's/^ //' | sort -u > symbols.sort +genassym.o: ${S}/arch/mips/mips/genassym.c + ${NORMAL_C_C} -locore.o: ${PMAX}/pmax/locore.S ${PMAX}/include/machAsmDefs.h \ - ${PMAX}/include/machConst.h ${PMAX}/include/reg.h assym.h - ${CC} -c ${COPTS} ${PARAM} -DLOCORE ${PMAX}/pmax/locore.S +param.c: $S/conf/param.c + rm -f param.c + cp $S/conf/param.c . -fp.o: ${PMAX}/pmax/fp.S ${PMAX}/include/machAsmDefs.h \ - ${PMAX}/include/machConst.h ${PMAX}/include/reg.h assym.h - ${CC} -c ${COPTS} ${PARAM} -DLOCORE ${PMAX}/pmax/fp.S +param.o: param.c Makefile + ${NORMAL_C_C} -# the following is necessary because autoconf.o depends on #if GENERIC -autoconf.o: Makefile +ioconf.o: ioconf.c + ${NORMAL_C} -# the following are necessary because the files depend on the types of -# cpu's included in the system configuration -clock.o machdep.o autoconf.o conf.o: Makefile +newvers: ${SYSTEM_DEP} ${SYSTEM_SWAP_DEP} + sh $S/conf/newvers.sh + ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c vers.c -# depend on network configuration -uipc_domain.o uipc_proto.o vfs_conf.o: Makefile -if_tun.o if_loop.o if_ethersubr.o: Makefile -in_proto.o: Makefile -assym.h: genassym - ./genassym >assym.h +clean:: + rm -f eddep *netbsd netbsd.gdb tags *.[io] [a-z]*.s \ + [Ee]rrs linterrs makelinks genassym genassym.o assym.h -genassym: ${PMAX}/pmax/genassym.c - cc ${INCLUDES} ${IDENT} ${PARAM} -o genassym ${PMAX}/pmax/genassym.c +lint: + @lint -hbxncez -DGENERIC -Dvolatile= ${CPPFLAGS} ${PARAM} -UKGDB \ + ${PMAX}/pmax/Locore.c ${CFILES} ${PMAX}/pmax/swapgeneric.c \ + ioconf.c param.c | \ + grep -v 'static function .* unused' -depend: assym.h param.c - mkdep ${COPTS} ${CFILES} ioconf.c param.c - mkdep -a -p ${INCLUDES} ${IDENT} ${PARAM} ${PMAX}/pmax/genassym.c +tags: + @echo "see $S/kern/Makefile for tags" links: egrep '#if' ${CFILES} | sed -f $S/conf/defines | \ sed -e 's/:.*//' -e 's/\.c/.o/' | sort -u > dontlink echo ${CFILES} | tr -s ' ' '\12' | sed 's/\.c/.o/' | \ sort -u | comm -23 - dontlink | \ - sed 's,../.*/\(.*.o\),rm -f \1;ln -s ../GENERIC/\1 \1,' > makelinks + sed 's,../.*/\(.*.o\),rm -f \1; ln -s ../GENERIC/\1 \1,' > makelinks sh makelinks && rm -f dontlink -tags: - @echo "see $S/kern/Makefile for tags" +SRCS= ${PMAX}/pmax/locore.S ${PMAX}/pmax/fp.S \ + param.c ioconf.c ${CFILES} ${SFILES} +depend:: .depend +.depend: ${SRCS} assym.h param.c + mkdep ${AFLAGS} ${CPPFLAGS} ${PMAX}/pmax/locore.S ${PMAX}/pmax/fp.S + mkdep -a ${CFLAGS} ${CPPFLAGS} param.c ioconf.c ${CFILES} + mkdep -a ${AFLAGS} ${CPPFLAGS} ${SFILES} + mkdep -a ${CFLAGS} ${CPPFLAGS} ${PARAM} ${S}/arch/mips/mips/genassym.c -ioconf.o: ioconf.c - ${CC} -c ${CFLAGS} ioconf.c -param.c: $S/conf/param.c - rm -f param.c - cp $S/conf/param.c . +# depend on root or device configuration +autoconf.o conf.o: Makefile + +# depend on network or filesystem configuration +uipc_proto.o vfs_conf.o: Makefile -param.o: param.c Makefile - ${CC} -c ${CFLAGS} ${PARAM} param.c +# depend on maxusers +genassym.o machdep.o: Makefile -vers.o: ${SYSTEM_DEP} ${SYSTEM_SWAP_DEP} - sh $S/conf/newvers.sh - ${CC} ${CFLAGS} -c vers.c +# depend on CPU configuration +machdep.o mainbus.o trap.o: Makefile -%RULES +locore.o: ${PMAX}/pmax/locore.S assym.h + ${NORMAL_S} +fp.o: ${PMAX}/pmax/fp.S assym.h + ${NORMAL_S} +%RULES diff --git a/sys/arch/pmax/conf/NEWCONF b/sys/arch/pmax/conf/NEWCONF index 8281801d397..e9dd1f8592b 100644 --- a/sys/arch/pmax/conf/NEWCONF +++ b/sys/arch/pmax/conf/NEWCONF @@ -2,7 +2,7 @@ # DECstation (3100 or 5000/xxx) # # Generic config.new configuration for NetBSD/pmax -# $NetBSD: NEWCONF,v 1.6 1995/12/28 16:08:20 jonathan Exp $ +# $NetBSD: NEWCONF,v 1.6.4.2 1996/06/17 05:14:26 jonathan Exp $ # include "std.pmax" @@ -14,9 +14,9 @@ maxusers 8 # what the root device is.) #options GENERIC +options CPU_R3000 # R2000/R3000 support # replaces "cpu ds5k/240" -options DS5000 # generic TC support and 3MAX support options DS5000_240 # 3MAXPLUS (kn03) support options DS5000_100 # 3MIN (kn02ba/kmin) support options DS5000_25 # MAXINE (kn02ca/xine) support @@ -60,7 +60,7 @@ options NULLFS # null layer filesystem # Networking options options INET # Internet protocols -#options "TCP_COMPAT_42" # compatibility with 4.2BSD TCP/IP +options "TCP_COMPAT_42" # compatibility with 4.2BSD TCP/IP options GATEWAY # IP packet forwarding #options MULTICAST # Multicast support #options MROUTING # Multicast routing support @@ -70,6 +70,7 @@ options GATEWAY # IP packet forwarding # pmax specific options COMPAT_ULTRIX # ultrix compatibility +options "HZ=256" # RTC rate required # Note that this configuration is unlikely to work, yet... config netbsd root on rz0a swap on rz0b and rz1b dumps on rz0b diff --git a/sys/arch/pmax/conf/TOCCATA b/sys/arch/pmax/conf/TOCCATA deleted file mode 100644 index f35d4ca6c74..00000000000 --- a/sys/arch/pmax/conf/TOCCATA +++ /dev/null @@ -1,66 +0,0 @@ -# -# GENERIC DECstation (3100 or 5000/xxx) -# -# from: @(#)GENERIC.pmax 8.1 (Berkeley) 6/29/93 -# $Id: TOCCATA,v 1.2 1996/08/31 02:09:35 deraadt Exp $ -# -machine pmax - -cpu "DS5000" -ident TOCCATA - -# Need to set locally -timezone 8 dst -maxusers 48 - -# Standard system options -options SWAPPAGER # swap pager (anonymous and swap space) -options VNODEPAGER # vnode pager (mapped files) -options DEVPAGER # device pager (mapped devices) -#options DIAGNOSTIC # extra kernel debugging checks -options "COMPAT_43" # compatibility with 4.3BSD binaries -options "COMPAT_09" # compatibility with 4.4BSD binaries -options "COMPAT_10" # compatibility with NetBSD 1.0 binaries -options KTRACE # system call tracing support -options "NKMEMCLUSTERS=1024" # 4K pages in kernel malloc pool -#options SYSCALL_DEBUG # Print syscalls... -#options DDB - -# Filesystem options -options FIFO # POSIX fifo support (in all filesystems) -options FFS # fast filesystem with user and group quotas -options MFS # memory-based filesystem -options NFSCLIENT # Sun NFS-compatible filesystem (client) -options NFSSERVER # Sun NFS-compatible filesystem (server) - -# Networking options -options INET # Internet protocols -#options "TCP_COMPAT_42" # compatibility with 4.2BSD TCP/IP -#options GATEWAY # IP packet forwarding - -# pmax specific -options COMPAT_ULTRIX # ultrix compatibility - -#config netbsd swap generic -config netbsd root on rz4a swap on rz4b dumps on rz4b - -controller dtop0 at nexus0 csr ? -controller sfb0 at nexus0 csr ? -controller sfb1 at nexus0 csr ? -controller xcfb0 at nexus0 csr ? -#controller cfb0 at nexus0 csr ? -controller scc0 at nexus0 csr ? -controller le0 at nexus0 csr ? -master asc0 at nexus0 csr ? -disk rz0 at asc0 drive 0 slave 0 -disk rz1 at asc0 drive 1 slave 0 -disk rz2 at asc0 drive 2 slave 0 -disk rz3 at asc0 drive 3 slave 0 -disk rz4 at asc0 drive 4 slave 0 -disk rz5 at asc0 drive 5 slave 0 - -pseudo-device pty 64 # pseudo ptys -pseudo-device loop -pseudo-device ether -pseudo-device sl 1 # Serial Line IP... -pseudo-device rcons diff --git a/sys/arch/pmax/conf/devices.pmax.oldconf b/sys/arch/pmax/conf/devices.pmax.oldconf deleted file mode 100644 index d03f8d59989..00000000000 --- a/sys/arch/pmax/conf/devices.pmax.oldconf +++ /dev/null @@ -1,3 +0,0 @@ -# $NetBSD: devices.pmax.oldconf,v 1.5 1995/01/03 22:42:03 hpeyerl Exp $ -rz 21 -md 1 diff --git a/sys/arch/pmax/conf/files.pmax b/sys/arch/pmax/conf/files.pmax index a3c1211e24f..8d4c4d4255b 100644 --- a/sys/arch/pmax/conf/files.pmax +++ b/sys/arch/pmax/conf/files.pmax @@ -1,4 +1,4 @@ -# $NetBSD: files.pmax,v 1.25 1996/01/03 20:33:25 jonathan Exp $ +# $NetBSD: files.pmax,v 1.31.4.1 1996/05/30 03:54:56 mhitch Exp $ # DECstation-specific configuration info # maxpartitions must be first item in files.${ARCH}. @@ -9,29 +9,47 @@ maxusers 2 8 64 # # Bus-independent devices # -device mainbus at root { } # no locators +device mainbus { } # no locators +attach mainbus at root -device cpu at mainbus # not optional +device cpu # not optional +attach cpu at mainbus file arch/pmax/pmax/cpu.c cpu - +# +# CPU-dependent files +# +#file arch/pmax/pmax/kn01.c kn01 # DS3100, pmax +#file arch/pmax/pmax/kn02.c kn02 # DS5000/200, 3max +#file arch/pmax/pmax/kn03.c kn03 # DS5000/240, 3maxplus +#file arch/pmax/pmax/kn02ba.c kn02ba # DS5000/1xx, 3min(kmin) +#file arch/pmax/pmax/kn02ca.c kn02ca # DS5000/1xx, maxine +#file arch/pmax/pmax/kn210.c # DS5400, mipsfair +#file arch/pmax/pmax/kn220.c # DS5500, mipsfair2 +file arch/pmax/pmax/kn230.c kn230 # DS5100, mipsmate # # Auto-configuration driver for the turbochannel bus itself. # -device tc at mainbus { } #{ slot = -1, offset = -1 } -file arch/pmax/tc/tc.c tc needs-flag +#define tcbus { } + +device tc {[slot = -1], [offset = -1]} ##{ } +attach tc at mainbus +file arch/pmax/tc/tc_subr.c tc needs-flag +file dev/tc/tc.c tc needs-flag # # The TurboChannel IOCTL ASIC. Present on IOASIC machines, # which is all turbochannel machines ever built except the 3MAX (5000/200). # -device ioasic at tc { } #{ } # not really optional +device ioasic { } #{ } # not really optional +attach ioasic at tc file arch/pmax/tc/asic.c ioasic # Real-time clock (not optional) -device clock at ioasic,tc,mainbus +device clock +attach clock at ioasic, tc, mainbus file arch/pmax/pmax/clock.c clock @@ -50,21 +68,26 @@ major { rz = 21 } # Old 4.4bsd pmax-specific scsi driver (deprecated). # define oldscsi {} -device oldscsibus at oldscsi {target = -1, drive = -1} +device oldscsibus {target = -1, drive = -1} +attach oldscsibus at oldscsi # asc: system-slot or turbochannel-option SCSI interface -device asc at ioasic,tc: oldscsi,scsi +device asc: oldscsi,scsi +attach asc at ioasic, tc file dev/tc/asc.c asc needs-flag # sii: kn01 SCSI interface -device sii at mainbus: oldscsi,scsi +device sii: oldscsi,scsi +attach sii at mainbus file arch/pmax/dev/sii.c sii needs-flag -device tz at oldscsibus: tape +device tz: tape +attach tz at oldscsibus file arch/pmax/dev/tz.c tz needs-count -device rz at oldscsibus: disk +device rz: disk +attach rz at oldscsibus file arch/pmax/dev/rz.c rz needs-count # @@ -73,47 +96,65 @@ file arch/pmax/dev/rz.c rz needs-count # DC7085 (DZ-like four-port serial device) on mainbus on non-IOASIC machines. # For the 3MAX (aka kn02 aka 5k/200) pretend that it's on an ASIC. -device dc at mainbus,ioasic -file arch/pmax/dev/dc.c dc needs-count +device dc +attach dc at mainbus, ioasic +file arch/pmax/dev/dc.c dc needs-count # The "desktop bus" on the MAXINE (5k/25). What is it, anyway? ADB? -device dtop at ioasic -file arch/pmax/dev/dtop.c dtop needs-count +device dtop +attach dtop at ioasic +file arch/pmax/dev/dtop.c dtop needs-flag # LANCE ethernet driver. # XXX Should use new machine-independent one instead. -device le at ioasic,tc,mainbus: ifnet, ether -file arch/pmax/tc/if_le.c le needs-flag +# device defined in sys/conf/files +attach le at ioasic with le_ioasic +attach le at tc with le_tc +attach le at mainbus with le_pmax +#file arch/pmax/tc/if_le.c (le_pmax|le_tc|le_ioasic) needs-flag + + +file dev/tc/if_le_dec.c (le_ioasic | le_tc | le_pmax) +file dev/tc/if_le_ioasic.c le_ioasic needs-flag #for le_iomem +file dev/tc/if_le_tc.c le_tc +file dev/tc/if_le_ibus.c le_pmax needs-flag #for kn01_intr # 3100 (pmax) onboard framebuffer -device pm at mainbus -file arch/pmax/dev/pm.c pm needs-count -file arch/pmax/dev/bt478.c pm +device pm +attach pm at mainbus +file arch/pmax/dev/pm.c pm needs-flag +file arch/pmax/dev/bt478.c pm ######################################################################## # Turbochannel options. ######################################################################## -device cfb at tc -file arch/pmax/dev/cfb.c cfb needs-count +device cfb +attach cfb at tc +file arch/pmax/dev/cfb.c cfb needs-flag -device sfb at tc -file arch/pmax/dev/sfb.c sfb needs-count +device sfb +attach sfb at tc +file arch/pmax/dev/sfb.c sfb needs-flag -device mfb at tc -file arch/pmax/dev/mfb.c mfb needs-count +device mfb +attach mfb at tc +file arch/pmax/dev/mfb.c mfb needs-flag # Zilog 8350/Intel 82350(?) SCC UART. -device scc at ioasic -file arch/pmax/tc/scc.c scc needs-count +device scc +attach scc at ioasic +file arch/pmax/tc/scc.c scc needs-count # MAXINE onboard framebuffer -device xcfb at tc -file arch/pmax/dev/xcfb.c xcfb needs-count +device xcfb +attach xcfb at tc +file arch/pmax/dev/xcfb.c xcfb needs-flag file arch/pmax/dev/ims332.c xcfb # DECWRL 45Mbit T3 interface -device tt at tc +device tt +attach tt at tc file arch/pmax/dev/if_tt.c tt needs-count ## bogus pmax-specific SCSI code. Leave in until new-style config done. @@ -124,16 +165,13 @@ file arch/pmax/pmax/conf.c #file arch/pmax/pmax/kadb.c optional kadb #file arch/pmax/pmax/machdep.c standard config-dependent file arch/pmax/pmax/machdep.c -file arch/pmax/pmax/cpu_exec.c -file arch/pmax/pmax/mem.c file arch/pmax/pmax/pmap.c -file arch/pmax/pmax/process_machdep.c file arch/pmax/pmax/sys_machdep.c file arch/pmax/pmax/trap.c +file arch/pmax/pmax/pmax_trap.c file arch/pmax/pmax/vm_machdep.c file arch/pmax/pmax/disksubr.c file arch/pmax/stand/libsa/callvec.c -file arch/pmax/pmax/elf.c file arch/pmax/pmax/mainbus.c # Console autoconfiguration code: selects between a framebuffers @@ -152,13 +190,13 @@ file netinet/in_cksum.c file netns/ns_cksum.c ns ## Support code for LK-201 keyboards, mice, and qvss ring buffers -file arch/pmax/dev/lk201.c pm or cfb or sfb or mfb or xcfb +file arch/pmax/dev/lk201.c pm | cfb | sfb | mfb | xcfb file arch/pmax/dev/qvss_compat.c fb # VDAC/RAMDAC support for framebuffers. Other devices supported by # NetBSD may use the same chips, too. -file arch/pmax/dev/bt459.c cfb or sfb +file arch/pmax/dev/bt459.c cfb | sfb # # Pseudo-device driver for framebuffers. All user-level requests, diff --git a/sys/arch/pmax/conf/files.pmax.oldconf b/sys/arch/pmax/conf/files.pmax.oldconf deleted file mode 100644 index 9928f93a1c4..00000000000 --- a/sys/arch/pmax/conf/files.pmax.oldconf +++ /dev/null @@ -1,41 +0,0 @@ -# $NetBSD: files.pmax.oldconf,v 1.14 1995/04/27 20:52:39 mellon Exp $ -arch/pmax/pmax/autoconf.c standard -arch/pmax/pmax/clock.c standard -arch/pmax/pmax/conf.c standard -arch/pmax/pmax/cons.c standard -arch/pmax/pmax/disksubr.c standard -arch/pmax/pmax/kadb.c optional kadb -arch/pmax/pmax/machdep.c standard config-dependent -arch/pmax/pmax/cpu_exec.c standard -arch/pmax/pmax/mem.c standard -arch/pmax/pmax/pmap.c standard -arch/pmax/pmax/process_machdep.c standard -arch/pmax/pmax/sys_machdep.c standard -arch/pmax/pmax/trap.c standard -arch/pmax/pmax/vm_machdep.c standard -arch/pmax/stand/libsa/callvec.c standard -arch/pmax/pmax/elf.c standard -arch/pmax/dev/fb.c standard -arch/pmax/dev/scsi.c standard -# This is a dummy - don't try to use it: -arch/pmax/dev/foo.c optional fb device-driver -arch/pmax/dev/rcons.c optional rcons device-driver -arch/pmax/dev/asc.c optional asc device-driver -arch/pmax/dev/dc.c optional dc device-driver -arch/pmax/dev/dtop.c optional dtop device-driver -arch/pmax/dev/if_le.c optional le device-driver -arch/pmax/dev/pm.c optional pm device-driver -arch/pmax/dev/cfb.c optional cfb device-driver -arch/pmax/dev/sfb.c optional sfb device-driver -arch/pmax/dev/mfb.c optional mfb device-driver -arch/pmax/dev/rz.c optional rz device-driver -arch/pmax/dev/scc.c optional scc device-driver -arch/pmax/dev/sii.c optional sii device-driver -arch/pmax/dev/tz.c optional tz device-driver -arch/pmax/dev/xcfb.c optional xcfb device-driver -arch/pmax/dev/if_tt.c optional tt device-driver -compat/ultrix/ultrix_misc.c optional compat_ultrix -compat/ultrix/ultrix_syscalls.c optional compat_ultrix -compat/ultrix/ultrix_sysent.c optional compat_ultrix -netinet/in_cksum.c optional inet -netns/ns_cksum.c optional ns diff --git a/sys/arch/pmax/conf/std.pmax b/sys/arch/pmax/conf/std.pmax index 1f1bbed7034..601b5ec883d 100644 --- a/sys/arch/pmax/conf/std.pmax +++ b/sys/arch/pmax/conf/std.pmax @@ -1,6 +1,6 @@ # $NetBSD: std.pmax,v 1.0 1995/04/28 03:10:41 jonathan Exp # standard pmax info -machine pmax +machine pmax mips mainbus0 at root cpu* at mainbus0 diff --git a/sys/arch/pmax/dev/ascreg.h b/sys/arch/pmax/dev/ascreg.h index a9673d62ccc..7d4f4fd0724 100644 --- a/sys/arch/pmax/dev/ascreg.h +++ b/sys/arch/pmax/dev/ascreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: ascreg.h,v 1.5 1994/10/26 21:08:52 cgd Exp $ */ +/* $NetBSD: ascreg.h,v 1.6 1996/01/31 23:38:55 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -229,13 +229,13 @@ typedef volatile struct { #define ASC_CSR_IO 0x01 #define ASC_PHASE(csr) ((csr) & 0x7) -#define ASC_PHASE_DATAO 0x0 -#define ASC_PHASE_DATAI 0x1 -#define ASC_PHASE_COMMAND 0x2 -#define ASC_PHASE_STATUS 0x3 +#define SCSI_PHASE_DATAO 0x0 +#define SCSI_PHASE_DATAI 0x1 +#define SCSI_PHASE_COMMAND 0x2 +#define SCSI_PHASE_STATUS 0x3 /* 4..5 ANSI reserved */ -#define ASC_PHASE_MSG_OUT 0x6 -#define ASC_PHASE_MSG_IN 0x7 +#define SCSI_PHASE_MSG_OUT 0x6 +#define SCSI_PHASE_MSG_IN 0x7 /* * Destination Bus ID diff --git a/sys/arch/pmax/dev/bt459.c b/sys/arch/pmax/dev/bt459.c index f5f6133c558..45667ff2c1c 100644 --- a/sys/arch/pmax/dev/bt459.c +++ b/sys/arch/pmax/dev/bt459.c @@ -1,3 +1,5 @@ +/* $NetBSD: bt459.c,v 1.4 1996/04/08 00:57:41 jonathan Exp $ */ + /*- * Copyright (c) 1992, 1993 * The Regents of the University of California. All rights reserved. @@ -34,7 +36,6 @@ * SUCH DAMAGE. * * from: @(#)sfb.c 8.1 (Berkeley) 6/10/93 - * $Id: bt459.c,v 1.1.1.1 1995/10/18 08:51:25 deraadt Exp $ */ /* @@ -52,7 +53,6 @@ * * from: Header: /sprite/src/kernel/dev/ds3100.md/RCS/devGraphics.c, * v 9.2 90/02/13 22:16:24 shirriff Exp SPRITE (DECWRL)"; - * $Id: bt459.c,v 1.1.1.1 1995/10/18 08:51:25 deraadt Exp $ */ /* * Mach Operating System @@ -81,6 +81,7 @@ */ #include +#include #include #include #include @@ -291,12 +292,12 @@ bt459RestoreCursorColor(fi) bt459_select_reg(regs, BT459_REG_CCOLOR_1); for (i = 0; i < 3; i++) { regs->addr_reg = cursor_RGB[i]; - MachEmptyWriteBuffer(); + wbflush(); } bt459_select_reg(regs, BT459_REG_CCOLOR_3); for (i = 3; i < 6; i++) { regs->addr_reg = cursor_RGB[i]; - MachEmptyWriteBuffer(); + wbflush(); } } @@ -307,7 +308,7 @@ bt459CursorColor(fi, color) unsigned int color[]; struct fbinfo *fi; { - register int i, j; + register int i; for (i = 0; i < 6; i++) cursor_RGB[i] = (u_char)(color[i] >> 8); @@ -350,23 +351,23 @@ bt459PosCursor(fi, x, y) fbu->scrInfo.cursor.x = x; /* keep track of real cursor */ fbu->scrInfo.cursor.y = y; /* position, indep. of mouse */ -#ifdef MELLON /* perhaps this is right for sfb ? */ - x += 369; /* is this correct for rcons on an sfb?? */ -#else - x += 219; /* this is right for old pmax fb drivers on a cfb */ -#endif + /* XXX is this a linear function of x-dimension screen size? */ + if (fi->fi_type.fb_boardtype == PMAX_FBTYPE_SFB) + x += 369; /* is this correct for rcons on an sfb?? */ + else + x += 219; /* correct for a cfb */ y += 34; bt459_select_reg(regs, BT459_REG_CXLO); regs->addr_reg = x; - MachEmptyWriteBuffer(); + wbflush(); regs->addr_reg = x >> 8; - MachEmptyWriteBuffer(); + wbflush(); regs->addr_reg = y; - MachEmptyWriteBuffer(); + wbflush(); regs->addr_reg = y >> 8; - MachEmptyWriteBuffer(); + wbflush(); } /* Initialize the colormap to the default state, which is that entry @@ -382,22 +383,22 @@ bt459InitColorMap(fi) bt459_select_reg(regs, 0); ((u_char *)(fi -> fi_cmap_bits)) [0] = regs->addr_cmap = 0; - MachEmptyWriteBuffer(); + wbflush(); ((u_char *)(fi -> fi_cmap_bits)) [1] = regs->addr_cmap = 0; - MachEmptyWriteBuffer(); + wbflush(); ((u_char *)(fi -> fi_cmap_bits)) [2] = regs->addr_cmap = 0; - MachEmptyWriteBuffer(); + wbflush(); for (i = 0; i < 256; i++) { ((u_char *)(fi -> fi_cmap_bits)) [i * 3] = regs->addr_cmap = 0xff; - MachEmptyWriteBuffer(); + wbflush(); ((u_char *)(fi -> fi_cmap_bits)) [i * 3 + 1] = regs->addr_cmap = 0xff; - MachEmptyWriteBuffer(); + wbflush(); ((u_char *)(fi -> fi_cmap_bits)) [i * 3 + 2] = regs -> addr_cmap = 0xff; - MachEmptyWriteBuffer(); + wbflush(); } for (i = 0; i < 3; i++) { @@ -484,11 +485,11 @@ bt459_video_on(fi) /* restore old color map entry zero */ bt459_select_reg(regs, 0); regs->addr_cmap = cmap_bits [0]; - MachEmptyWriteBuffer(); + wbflush(); regs->addr_cmap = cmap_bits [0]; - MachEmptyWriteBuffer(); + wbflush(); regs->addr_cmap = cmap_bits [0]; - MachEmptyWriteBuffer(); + wbflush(); /* enable normal display */ bt459_write_reg(regs, BT459_REG_PRM, 0xff); @@ -513,11 +514,11 @@ bt459_video_off(fi) /* set color map entry zero to zero */ bt459_select_reg(regs, 0); regs->addr_cmap = 0; - MachEmptyWriteBuffer(); + wbflush(); regs->addr_cmap = 0; - MachEmptyWriteBuffer(); + wbflush(); regs->addr_cmap = 0; - MachEmptyWriteBuffer(); + wbflush(); /* disable display */ bt459_write_reg(regs, BT459_REG_PRM, 0); @@ -536,7 +537,7 @@ bt459_select_reg(regs, regno) { regs->addr_lo = regno; regs->addr_hi = regno >> 8; - MachEmptyWriteBuffer(); + wbflush(); } static void @@ -545,9 +546,9 @@ bt459_write_reg(regs, regno, val) { regs->addr_lo = regno; regs->addr_hi = regno >> 8; - MachEmptyWriteBuffer(); + wbflush(); regs->addr_reg = val; - MachEmptyWriteBuffer(); + wbflush(); } static u_char @@ -556,7 +557,7 @@ bt459_read_reg(regs, regno) { regs->addr_lo = regno; regs->addr_hi = regno >> 8; - MachEmptyWriteBuffer(); + wbflush(); return (regs->addr_reg); } diff --git a/sys/arch/pmax/dev/bt478.c b/sys/arch/pmax/dev/bt478.c index e672cfd1c2c..aa8a8485a3b 100644 --- a/sys/arch/pmax/dev/bt478.c +++ b/sys/arch/pmax/dev/bt478.c @@ -1,4 +1,4 @@ -/* $NetBSD: bt478.c,v 1.2 1995/11/25 10:38:42 mellon Exp $ */ +/* $NetBSD: bt478.c,v 1.4 1996/04/08 00:57:43 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -57,6 +57,7 @@ #include +#include #include #include #include @@ -73,12 +74,22 @@ /* * Forward references. */ -void bt478RestoreCursorColor(); -void bt478CursorColor(); /* qvss ioctl interface uses this */ -/*static*/ void bt478InitColorMap(); -int bt478GetColorMap(); -static void bt478VDACInit(); -int bt478LoadColorMap(); + + +int bt478init __P((struct fbinfo *fi)); + +void bt478RestoreCursorColor __P((struct fbinfo *fi)); +/* qvss ioctl interface uses this */ +void bt478CursorColor __P((struct fbinfo *fi, unsigned int color[])); + +void bt478BlankCursor __P((struct fbinfo *fi)); +/*static*/ void bt478InitColorMap __P((struct fbinfo *fi)); +int bt478GetColorMap __P((struct fbinfo *fi, caddr_t bits, + int index, int count)); +int bt478LoadColorMap __P((struct fbinfo *fi, caddr_t bits, + int index, int count)); + + extern int pmax_boardtype; extern u_short defCursor[32]; @@ -98,18 +109,18 @@ bt478init(fi) * * Initialize the VDAC */ - vdac->overWA = 0x04; MachEmptyWriteBuffer(); - vdac->over = 0x00; MachEmptyWriteBuffer(); - vdac->over = 0x00; MachEmptyWriteBuffer(); - vdac->over = 0x00; MachEmptyWriteBuffer(); - vdac->overWA = 0x08; MachEmptyWriteBuffer(); - vdac->over = 0x00; MachEmptyWriteBuffer(); - vdac->over = 0x00; MachEmptyWriteBuffer(); - vdac->over = 0x7f; MachEmptyWriteBuffer(); - vdac->overWA = 0x0c; MachEmptyWriteBuffer(); - vdac->over = 0xff; MachEmptyWriteBuffer(); - vdac->over = 0xff; MachEmptyWriteBuffer(); - vdac->over = 0xff; MachEmptyWriteBuffer(); + vdac->overWA = 0x04; wbflush(); + vdac->over = 0x00; wbflush(); + vdac->over = 0x00; wbflush(); + vdac->over = 0x00; wbflush(); + vdac->overWA = 0x08; wbflush(); + vdac->over = 0x00; wbflush(); + vdac->over = 0x00; wbflush(); + vdac->over = 0x7f; wbflush(); + vdac->overWA = 0x0c; wbflush(); + vdac->over = 0xff; wbflush(); + vdac->over = 0xff; wbflush(); + vdac->over = 0xff; wbflush(); /* Initialize the cursor position... */ fi -> fi_cursor.width = 16; @@ -134,26 +145,26 @@ bt478RestoreCursorColor(fi) register int i; vdac->overWA = 0x04; - MachEmptyWriteBuffer(); + wbflush(); for (i = 0; i < 3; i++) { vdac->over = bg_RGB[i]; - MachEmptyWriteBuffer(); + wbflush(); } vdac->overWA = 0x08; - MachEmptyWriteBuffer(); + wbflush(); vdac->over = 0x00; - MachEmptyWriteBuffer(); + wbflush(); vdac->over = 0x00; - MachEmptyWriteBuffer(); + wbflush(); vdac->over = 0x7f; - MachEmptyWriteBuffer(); + wbflush(); vdac->overWA = 0x0c; - MachEmptyWriteBuffer(); + wbflush(); for (i = 0; i < 3; i++) { vdac->over = fg_RGB[i]; - MachEmptyWriteBuffer(); + wbflush(); } } @@ -186,10 +197,10 @@ bt478BlankCursor(fi) register int i; vdac->overWA = 0x0c; - MachEmptyWriteBuffer(); + wbflush(); for (i = 0; i < 3; i++) { vdac->over = 0; - MachEmptyWriteBuffer(); + wbflush(); } } @@ -205,44 +216,44 @@ bt478InitColorMap (fi) *(volatile char *)MACH_PHYS_TO_UNCACHED (KN01_PHYS_COLMASK_START) = 0xff; /* XXX */ - MachEmptyWriteBuffer(); + wbflush(); if (fi -> fi_type.fb_depth == 1) { - vdac->mapWA = 0; MachEmptyWriteBuffer(); + vdac->mapWA = 0; wbflush(); for (i = 0; i < 256; i++) { ((u_char *)(fi -> fi_cmap_bits)) [i * 3] = 0; ((u_char *)(fi -> fi_cmap_bits)) [i * 3 + 1] = (i < 128) ? 0x00 : 0xff; ((u_char *)(fi -> fi_cmap_bits)) [i * 3 + 2] = 0; vdac->map = 0; - MachEmptyWriteBuffer(); + wbflush(); vdac->map = (i < 128) ? 0x00 : 0xff; - MachEmptyWriteBuffer(); + wbflush(); vdac->map = 0; - MachEmptyWriteBuffer(); + wbflush(); } } else { - vdac->mapWA = 0; MachEmptyWriteBuffer(); + vdac->mapWA = 0; wbflush(); ((u_char *)(fi -> fi_cmap_bits)) [0] = 0; ((u_char *)(fi -> fi_cmap_bits)) [1] = 0; ((u_char *)(fi -> fi_cmap_bits)) [2] = 0; vdac->map = 0; - MachEmptyWriteBuffer(); + wbflush(); vdac->map = 0; - MachEmptyWriteBuffer(); + wbflush(); vdac->map = 0; - MachEmptyWriteBuffer(); + wbflush(); for (i = 1; i < 256; i++) { ((u_char *)(fi -> fi_cmap_bits)) [i * 3] = 0xff; ((u_char *)(fi -> fi_cmap_bits)) [i * 3 + 1] = 0xff; ((u_char *)(fi -> fi_cmap_bits)) [i * 3 + 2] = 0xff; vdac->map = 0xff; - MachEmptyWriteBuffer(); + wbflush(); vdac->map = 0xff; - MachEmptyWriteBuffer(); + wbflush(); vdac->map = 0xff; - MachEmptyWriteBuffer(); + wbflush(); } } @@ -250,7 +261,7 @@ bt478InitColorMap (fi) bg_RGB[i] = 0x00; fg_RGB[i] = 0xff; } - bt478RestoreCursorColor(); + bt478RestoreCursorColor(fi); } /* Load the color map. */ @@ -266,23 +277,26 @@ bt478LoadColorMap(fi, bits, index, count) u_char *cmap; int i; - if (index > 256 || index < 0 || index + count > 256) + if (index < 0 || count < 1 || index + count > 256) return EINVAL; cmap_bits = (u_char *)bits; cmap = (u_char *)(fi -> fi_cmap_bits) + index * 3; - vdac->mapWA = index; MachEmptyWriteBuffer(); for (i = 0; i < count; i++) { - cmap [(i + index) * 3] - = vdac->map = cmap_bits [i * 3]; - MachEmptyWriteBuffer(); - cmap [(i + index) * 3 + 1] - = vdac->map = cmap_bits [i * 3 + 1]; - MachEmptyWriteBuffer(); - cmap [(i + index) * 3 + 2] - = vdac -> map = cmap_bits [i * 3 + 2]; - MachEmptyWriteBuffer(); + vdac->mapWA = i + index; wbflush(); + + cmap [i * 3] = cmap_bits [i * 3]; + vdac->map = cmap_bits [i * 3]; + wbflush(); + + cmap [i * 3 + 1] = cmap_bits [i * 3 + 1]; + vdac->map = cmap_bits [i * 3 + 1]; + wbflush(); + + cmap [i * 3 + 2] = cmap_bits [i * 3 + 2]; + vdac -> map = cmap_bits [i * 3 + 2]; + wbflush(); } return 0; } diff --git a/sys/arch/pmax/dev/cfb.c b/sys/arch/pmax/dev/cfb.c index ad8c2c21006..3fb3b7db294 100644 --- a/sys/arch/pmax/dev/cfb.c +++ b/sys/arch/pmax/dev/cfb.c @@ -1,4 +1,4 @@ -/* $NetBSD: cfb.c,v 1.11 1995/09/12 22:36:09 jonathan Exp $ */ +/* $NetBSD: cfb.c,v 1.18.4.2 1996/09/09 20:45:26 thorpej Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -36,7 +36,6 @@ * SUCH DAMAGE. * * from: @(#)sfb.c 8.1 (Berkeley) 6/10/93 - * $Id: cfb.c,v 1.1.1.1 1995/10/18 08:51:26 deraadt Exp $ */ /* @@ -81,14 +80,18 @@ * rights to redistribute these changes. */ -#include -#include +#include "fb.h" +#include "cfb.h" + #if NCFB > 0 #include +#include /* printf() */ #include #include #include +#include #include +#include #include #include @@ -116,11 +119,15 @@ struct fbinfo cfbfi; /*XXX*/ /* should be softc */ * Forward references. */ -extern struct cfdriver cfb; +extern struct cfdriver cfb_cd; #define CMAP_BITS (3 * 256) /* 256 entries, 3 bytes per. */ -static u_char cmap_bits [NCFB * CMAP_BITS]; /* One colormap per cfb... */ +static u_char cmap_bits [CMAP_BITS]; /* colormap for console... */ +/* + * Method table for standard framebuffer operations on a CFB. + * The CFB uses a Brooktree bt479 ramdac. + */ struct fbdriver cfb_driver = { bt459_video_on, bt459_video_off, @@ -132,6 +139,7 @@ struct fbdriver cfb_driver = { bt459CursorColor }; +int cfbinit __P((struct fbinfo *fi, caddr_t cfbaddr, int unit, int silent)); extern void fbScreenInit __P((struct fbinfo *fi)); void genConfigMouse(), genDeconfigMouse(); @@ -157,29 +165,14 @@ int cfbmatch __P((struct device *, void *, void *)); void cfbattach __P((struct device *, struct device *, void *)); int cfb_intr __P((void *sc)); -struct cfdriver cfbcd = { - NULL, "cfb", cfbmatch, cfbattach, DV_DULL, sizeof(struct fbinfo), 0 +struct cfattach cfb_ca = { + sizeof(struct fbinfo), cfbmatch, cfbattach }; -#if 0 -/* - * Look for a cfb. Separated out from cfbmatch() so consinit() can call it. - */ -int -cfbprobe(cfbaddr) - caddr_t cfbaddr; -{ - /* check for no frame buffer */ - if (badaddr(cfbaddr, 4)) - return (0); - - /* make sure that we're looking for this type of device. */ - if (!BUS_MATCHNAME(ca, "PMAG-BA ")) - return (0); +struct cfdriver cfb_cd = { + NULL, "cfb", DV_DULL +}; - return 1; -} -#endif int @@ -188,10 +181,8 @@ cfbmatch(parent, match, aux) void *match; void *aux; { - struct cfdata *cf = match; - struct confargs *ca = aux; - static int ncfbs = 1; - caddr_t cfbaddr = BUS_CVTADDR(ca); + /*struct cfdata *cf = match;*/ + struct tc_attach_args *ta = aux; #ifdef FBDRIVER_DOES_ATTACH /* leave configuration to the fb driver */ @@ -199,22 +190,16 @@ cfbmatch(parent, match, aux) #endif /* make sure that we're looking for this type of device. */ - /*if (!cfbprobe(cfbaddr)) return 0;*/ - if (!BUS_MATCHNAME(ca, "PMAG-BA ")) + if (!TC_BUS_MATCHNAME(ta, "PMAG-BA ")) return (0); - -#ifdef notyet - /* if it can't have the one mentioned, reject it */ - if (cf->cf_unit >= ncfbs) - return (0); -#endif return (1); } /* * Attach a device. Hand off all the work to cfbinit(), - * so console-config cod can attach cfbs early in boot. + * so console-config code can attach cfb devices very early in boot, + * to use as system console. */ void cfbattach(parent, self, aux) @@ -222,15 +207,15 @@ cfbattach(parent, self, aux) struct device *self; void *aux; { - struct confargs *ca = aux; - caddr_t base = BUS_CVTADDR(ca); + struct tc_attach_args *ta = aux; + caddr_t base = (caddr_t)(ta->ta_addr); int unit = self->dv_unit; struct fbinfo *fi = (struct fbinfo *) self; #ifdef notyet /* if this is the console, it's already configured. */ if (ca->ca_slotpri == cons_slot) - return; /* XXX patch up f softc pointer */ + return; /* XXX patch up softc pointer */ #endif if (!cfbinit(fi, base, unit, 0)) @@ -238,21 +223,24 @@ cfbattach(parent, self, aux) /* * The only interrupt on the CFB proper is the vertical-blank - * interrupt, which cannot be disabled. The CFB always requests it. + * interrupt, which cannot be disabled. The CFB always requests + * an interrupt during every vertical-retrace period. * We never enable interrupts from CFB cards, except on the * 3MIN, where TC options interrupt at spl0 through spl2, and - * disabling those interrupts isn't currently honoured. + * disabling of TC option interrupts doesn't work. */ if (pmax_boardtype == DS_3MIN) { - BUS_INTR_ESTABLISH(ca, cfb_intr, self); + tc_intr_establish(parent, (void*)ta->ta_cookie, TC_IPL_NONE, + cfb_intr, fi); } + printf("\n"); } - /* - * Initialization + * CFB initialization. This is divorced from cfbattch() so that + * a console framebuffer can be initialized early during boot. */ int cfbinit(fi, cfbaddr, unit, silent) @@ -261,11 +249,25 @@ cfbinit(fi, cfbaddr, unit, silent) int unit; int silent; { - if (fi == NULL) fi = &cfbfi; /* XXX */ + /* + * If this device is being intialized as the console, malloc() + * is not yet up and we must use statically-allocated space. + */ + if (fi == NULL) { + fi = &cfbfi; /* XXX */ + fi->fi_cmap_bits = (caddr_t)cmap_bits; + } + else { + fi->fi_cmap_bits = malloc(CMAP_BITS, M_DEVBUF, M_NOWAIT); + if (fi->fi_cmap_bits == NULL) { + printf("cfb%d: no memory for cmap\n", unit); + return (0); + } + } /* check for no frame buffer */ if (badaddr(cfbaddr, 4)) { - printf("cfb: bad address 0x%x\n", cfbaddr); + printf("cfb: bad address 0x%p\n", cfbaddr); return (0); } @@ -281,7 +283,6 @@ cfbinit(fi, cfbaddr, unit, silent) fi->fi_linebytes = 1024; fi->fi_driver = &cfb_driver; fi->fi_blanked = 0; - fi->fi_cmap_bits = (caddr_t)&cmap_bits [CMAP_BITS * unit]; /* Fill in Frame Buffer Type struct. */ fi->fi_type.fb_boardtype = PMAX_FBTYPE_CFB; @@ -300,6 +301,8 @@ cfbinit(fi, cfbaddr, unit, silent) printf("cfb%d: vdac init failed.\n", unit); return (0); } + /*cfbInitColorMap();*/ /* done by bt459init() */ + /* * qvss/pm-style mmap()ed event queue compatibility glue @@ -333,8 +336,6 @@ cfbinit(fi, cfbaddr, unit, silent) } - /*cfbInitColorMap();*/ /* done by bt459init() */ - /* * Connect to the raster-console pseudo-driver */ @@ -352,8 +353,11 @@ cfbinit(fi, cfbaddr, unit, silent) * The original TURBOChannel cfb interrupts on every vertical * retrace, and we can't disable the board from requesting those * interrupts. The 4.4BSD kernel never enabled those interrupts; - * but there's a kernel design bug on the 3MIN, where the cfb - * interrupts at spl0, spl1, or spl2. + * but there's a kernel design bug on the 3MIN, where disabling + * (or enabling) TC option interrupts has no effect the interrupts + * are mapped to R3000 interrupts and always seem to be taken. + * This function simply dismisses CFB interrupts, or the interrupt + * request from the card will still be active. */ int cfb_intr(sc) @@ -365,6 +369,8 @@ cfb_intr(sc) /* reset vertical-retrace interrupt by writing a dont-care */ *(int*) (slot_addr+CFB_OFFSET_IREQ) = 0; + + return (0); } #endif /* NCFB */ diff --git a/sys/arch/pmax/dev/dc.c b/sys/arch/pmax/dev/dc.c index d758f77d56d..0a180c1cd49 100644 --- a/sys/arch/pmax/dev/dc.c +++ b/sys/arch/pmax/dev/dc.c @@ -1,4 +1,4 @@ -/* $NetBSD: dc.c,v 1.12 1995/09/11 21:29:23 jonathan Exp $ */ +/* $NetBSD: dc.c,v 1.16.4.5 1996/06/16 17:15:51 mhitch Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -56,7 +56,7 @@ * v 1.4 89/08/29 11:55:30 nelson Exp SPRITE (DECWRL)"; */ -#include +#include "dc.h" #if NDC > 0 /* * DC7085 (DZ-11 look alike) Driver @@ -74,9 +74,12 @@ #include #include +#include #include #include #include +#include +#include #include #include @@ -88,14 +91,23 @@ #include #include "dcvar.h" +#include "tc.h" + +#include /* XXX KbdReset band friends */ extern int pmax_boardtype; +extern struct cfdriver mainbus_cd; + +struct dc_softc { + struct device sc_dv; + struct pdma dc_pdma[4]; +}; /* - * Autoconfiguration data for config.new. + * Autoconfiguration data for config. + * * Use the statically-allocated softc until old autoconfig code and * config.old are completely gone. - * */ int dcmatch __P((struct device * parent, void *cfdata, void *aux)); void dcattach __P((struct device *parent, struct device *self, void *aux)); @@ -103,9 +115,14 @@ void dcattach __P((struct device *parent, struct device *self, void *aux)); int dc_doprobe __P((void *addr, int unit, int flags, int pri)); int dcintr __P((void * xxxunit)); -extern struct cfdriver dccd; -struct cfdriver dccd = { - NULL, "dc", dcmatch, dcattach, DV_DULL, sizeof(struct device), 0 +extern struct cfdriver dc_cd; + +struct cfattach dc_ca = { + sizeof(struct dc_softc), dcmatch, dcattach +}; + +struct cfdriver dc_cd = { + NULL, "dc", DV_TTY }; @@ -146,21 +163,21 @@ int dc_timer; /* true if timer started */ struct pdma dcpdma[NDCLINE]; struct speedtab dcspeedtab[] = { - 0, 0, - 50, LPR_B50, - 75, LPR_B75, - 110, LPR_B110, - 134, LPR_B134, - 150, LPR_B150, - 300, LPR_B300, - 600, LPR_B600, - 1200, LPR_B1200, - 1800, LPR_B1800, - 2400, LPR_B2400, - 4800, LPR_B4800, - 9600, LPR_B9600, - 19200, LPR_B19200, - -1, -1 + { 0, 0, }, + { 50, LPR_B50 }, + { 75, LPR_B75 }, + { 110, LPR_B110 }, + { 134, LPR_B134 }, + { 150, LPR_B150 }, + { 300, LPR_B300 }, + { 600, LPR_B600 }, + { 1200, LPR_B1200 }, + { 1800, LPR_B1800 }, + { 2400, LPR_B2400 }, + { 4800, LPR_B4800 }, + { 9600, LPR_B9600 }, + { 19200,LPR_B19200 }, + { -1, -1 } }; #ifndef PORTSELECTOR @@ -171,6 +188,15 @@ struct speedtab dcspeedtab[] = { #define LFLAG (TTYDEF_LFLAG & ~ECHO) #endif +/* + * Forward declarations + */ +struct tty *dctty __P((dev_t dev)); +void dcrint __P((int)); +int dcmctl __P((dev_t dev, int bits, int how)); + + + /* * Match driver based on name */ @@ -180,12 +206,29 @@ dcmatch(parent, match, aux) void *match; void *aux; { - struct cfdata *cf = match; struct confargs *ca = aux; +#if NTC>0 + struct ioasicdev_attach_args *d = aux; +#endif static int nunits = 0; - if (!BUS_MATCHNAME(ca, "dc")) +#if NTC > 0 + if (parent->dv_cfdata->cf_driver == &ioasic_cd) { + if (strcmp(d->iada_modname, "dc") != 0 && + strcmp(d->iada_modname, "dc7085") != 0) + return (0); + } + else +#endif /* NTC */ + + if (parent->dv_cfdata->cf_driver == &mainbus_cd) { + if (strcmp(ca->ca_name, "dc") != 0 && + strcmp(ca->ca_name, "mdc") != 0 && + strcmp(ca->ca_name, "dc7085") != 0) + return (0); + } + else return (0); /* @@ -207,13 +250,33 @@ dcattach(parent, self, aux) void *aux; { register struct confargs *ca = aux; - - (void) dc_doprobe((void*)MACH_PHYS_TO_UNCACHED(BUS_CVTADDR(ca)), - self->dv_unit, self->dv_cfdata->cf_flags, - ca->ca_slot); - - /* tie pseudo-slot to device */ - BUS_INTR_ESTABLISH(ca, dcintr, (void *)self->dv_unit); +#if NTC > 0 + struct ioasicdev_attach_args *d = aux; +#endif /* NTC */ + caddr_t dcaddr; + + +#if NTC > 0 + if (parent->dv_cfdata->cf_driver == &ioasic_cd) { + dcaddr = (caddr_t)d->iada_addr; + (void) dc_doprobe((void*)MACH_PHYS_TO_UNCACHED(dcaddr), + self->dv_unit, self->dv_cfdata->cf_flags, + (int)d->iada_cookie); + /* tie pseudo-slot to device */ + ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_TTY, + dcintr, self); + } + else +#endif /* NTC */ + if (parent->dv_cfdata->cf_driver == &mainbus_cd) { + dcaddr = (caddr_t)ca->ca_addr; + (void) dc_doprobe((void*)MACH_PHYS_TO_UNCACHED(dcaddr), + self->dv_unit, self->dv_cfdata->cf_flags, + ca->ca_slot); + + /* tie pseudo-slot to device */ + BUS_INTR_ESTABLISH(ca, dcintr, self); + } printf("\n"); } @@ -222,6 +285,8 @@ dcattach(parent, self, aux) * XXX used for ugly special-cased console input that should be redone * more cleanly. */ +static inline int raster_console __P((void)); + static inline int raster_console() { @@ -230,6 +295,11 @@ raster_console() } +/* + * DC7085 (dz-11) probe routine from old-style config. + * This is only here out of intertia. + */ +int dc_doprobe(addr, unit, flags, priority) void *addr; int unit, flags, priority; @@ -256,7 +326,7 @@ dc_doprobe(addr, unit, flags, priority) /* reset chip */ dcaddr = (dcregs *)addr; dcaddr->dc_csr = CSR_CLR; - MachEmptyWriteBuffer(); + wbflush(); while (dcaddr->dc_csr & CSR_CLR) ; dcaddr->dc_csr = CSR_MSE | CSR_TIE | CSR_RIE; @@ -266,6 +336,8 @@ dc_doprobe(addr, unit, flags, priority) for (cntr = 0; cntr < 4; cntr++) { pdp->p_addr = (void *)dcaddr; tp = dc_tty[unit * 4 + cntr] = ttymalloc(); + if (cntr != DCKBD_PORT && cntr != DCMOUSE_PORT) + tty_attach(tp); pdp->p_arg = (int) tp; pdp->p_fcn = dcxint; pdp++; @@ -286,10 +358,10 @@ dc_doprobe(addr, unit, flags, priority) s = spltty(); dcaddr->dc_lpr = LPR_RXENAB | LPR_8_BIT_CHAR | LPR_B4800 | DCKBD_PORT; - MachEmptyWriteBuffer(); + wbflush(); dcaddr->dc_lpr = LPR_RXENAB | LPR_B4800 | LPR_OPAR | LPR_PARENB | LPR_8_BIT_CHAR | DCMOUSE_PORT; - MachEmptyWriteBuffer(); + wbflush(); DELAY(1000); KBDReset(makedev(DCDEV, DCKBD_PORT), dcPutc); MouseInit(makedev(DCDEV, DCMOUSE_PORT), dcPutc, dcGetc); @@ -298,7 +370,7 @@ dc_doprobe(addr, unit, flags, priority) s = spltty(); dcaddr->dc_lpr = LPR_RXENAB | LPR_8_BIT_CHAR | LPR_B9600 | minor(cn_tab->cn_dev); - MachEmptyWriteBuffer(); + wbflush(); DELAY(1000); /*cn_tab.cn_disabled = 0;*/ /* FIXME */ splx(s); @@ -308,6 +380,7 @@ dc_doprobe(addr, unit, flags, priority) return (1); } +int dcopen(dev, flag, mode, p) dev_t dev; int flag, mode; @@ -321,8 +394,10 @@ dcopen(dev, flag, mode, p) if (unit >= dc_cnt || dcpdma[unit].p_addr == (void *)0) return (ENXIO); tp = dc_tty[unit]; - if (tp == NULL) + if (tp == NULL) { tp = dc_tty[unit] = ttymalloc(); + tty_attach(tp); + } tp->t_oproc = dcstart; tp->t_param = dcparam; tp->t_dev = dev; @@ -351,8 +426,8 @@ dcopen(dev, flag, mode, p) while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) && !(tp->t_state & TS_CARR_ON)) { tp->t_state |= TS_WOPEN; - if (error = ttysleep(tp, (caddr_t)&tp->t_rawq, TTIPRI | PCATCH, - ttopen, 0)) + if ((error = ttysleep(tp, (caddr_t)&tp->t_rawq, + TTIPRI | PCATCH, ttopen, 0)) != 0) break; } splx(s); @@ -362,6 +437,7 @@ dcopen(dev, flag, mode, p) } /*ARGSUSED*/ +int dcclose(dev, flag, mode, p) dev_t dev; int flag, mode; @@ -384,6 +460,7 @@ dcclose(dev, flag, mode, p) return (ttyclose(tp)); } +int dcread(dev, uio, flag) dev_t dev; struct uio *uio; @@ -394,6 +471,7 @@ dcread(dev, uio, flag) return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); } +int dcwrite(dev, uio, flag) dev_t dev; struct uio *uio; @@ -413,9 +491,10 @@ dctty(dev) } /*ARGSUSED*/ +int dcioctl(dev, cmd, data, flag, p) dev_t dev; - int cmd; + u_long cmd; caddr_t data; int flag; struct proc *p; @@ -475,6 +554,7 @@ dcioctl(dev, cmd, data, flag, p) return (0); } +int dcparam(tp, t) register struct tty *tp; register struct termios *t; @@ -504,18 +584,18 @@ dcparam(tp, t) if (unit == DCKBD_PORT) { dcaddr->dc_lpr = LPR_RXENAB | LPR_8_BIT_CHAR | LPR_B4800 | DCKBD_PORT; - MachEmptyWriteBuffer(); + wbflush(); return (0); } else if (unit == DCMOUSE_PORT) { dcaddr->dc_lpr = LPR_RXENAB | LPR_B4800 | LPR_OPAR | LPR_PARENB | LPR_8_BIT_CHAR | DCMOUSE_PORT; - MachEmptyWriteBuffer(); + wbflush(); return (0); } } else if (tp->t_dev == cn_tab->cn_dev) { dcaddr->dc_lpr = LPR_RXENAB | LPR_8_BIT_CHAR | LPR_B9600 | unit; - MachEmptyWriteBuffer(); + wbflush(); return (0); } if (ospeed == 0) { @@ -534,7 +614,7 @@ dcparam(tp, t) if (cflag & CSTOPB) lpr |= LPR_2_STOP; dcaddr->dc_lpr = lpr; - MachEmptyWriteBuffer(); + wbflush(); DELAY(10); return (0); } @@ -546,10 +626,12 @@ int dcintr(xxxunit) void *xxxunit; { - register int unit = (int)xxxunit; + register struct dc_softc *sc = xxxunit; register dcregs *dcaddr; register unsigned csr; + register int unit = sc->sc_dv.dv_unit; + unit <<= 2; dcaddr = (dcregs *)dcpdma[unit].p_addr; while ((csr = dcaddr->dc_csr) & (CSR_RDONE | CSR_TRDY)) { @@ -562,6 +644,7 @@ dcintr(xxxunit) return 0; } +void dcrint(unit) register int unit; { @@ -629,7 +712,7 @@ dcxint(tp) if (dp->p_mem < dp->p_end) { dcaddr = (dcregs *)dp->p_addr; dcaddr->dc_tdr = dc_brk[unit >> 2] | *dp->p_mem++; - MachEmptyWriteBuffer(); + wbflush(); DELAY(10); return; } @@ -647,7 +730,7 @@ dcxint(tp) if (tp->t_outq.c_cc == 0 || !(tp->t_state & TS_BUSY)) { dcaddr = (dcregs *)dp->p_addr; dcaddr->dc_tcr &= ~(1 << (unit & 03)); - MachEmptyWriteBuffer(); + wbflush(); DELAY(10); } } @@ -702,7 +785,7 @@ dcstart(tp) dp->p_end = dp->p_mem = tp->t_outq.c_cf; dp->p_end += cc; dcaddr->dc_tcr |= 1 << (minor(tp->t_dev) & 03); - MachEmptyWriteBuffer(); + wbflush(); out: splx(s); } @@ -711,6 +794,7 @@ out: * Stop output on a line. */ /*ARGSUSED*/ +int dcstop(tp, flag) register struct tty *tp; { @@ -725,8 +809,11 @@ dcstop(tp, flag) tp->t_state |= TS_FLUSH; } splx(s); + + return (0); } +int dcmctl(dev, bits, how) dev_t dev; int bits, how; @@ -899,7 +986,7 @@ dcPutc(dev, c) dcaddr = (dcregs *)dcpdma[minor(dev)].p_addr; tcr = dcaddr->dc_tcr; dcaddr->dc_tcr = tcr | (1 << minor(dev)); - MachEmptyWriteBuffer(); + wbflush(); DELAY(10); while (1) { /* @@ -919,7 +1006,7 @@ dcPutc(dev, c) if (line != minor(dev)) { tcr |= 1 << line; dcaddr->dc_tcr &= ~(1 << line); - MachEmptyWriteBuffer(); + wbflush(); DELAY(10); continue; } @@ -927,7 +1014,7 @@ dcPutc(dev, c) * Start sending the character. */ dcaddr->dc_tdr = dc_brk[0] | (c & 0xff); - MachEmptyWriteBuffer(); + wbflush(); DELAY(10); /* * Wait for character to be sent. @@ -945,12 +1032,12 @@ dcPutc(dev, c) if (line != minor(dev)) { tcr |= 1 << line; dcaddr->dc_tcr &= ~(1 << line); - MachEmptyWriteBuffer(); + wbflush(); DELAY(10); continue; } dcaddr->dc_tcr &= ~(1 << minor(dev)); - MachEmptyWriteBuffer(); + wbflush(); DELAY(10); break; } @@ -961,7 +1048,7 @@ dcPutc(dev, c) */ if (tcr & 0xF) { dcaddr->dc_tcr = tcr; - MachEmptyWriteBuffer(); + wbflush(); DELAY(10); } diff --git a/sys/arch/pmax/dev/dcvar.h b/sys/arch/pmax/dev/dcvar.h index be8f0f81926..1e5c3e9b8f2 100644 --- a/sys/arch/pmax/dev/dcvar.h +++ b/sys/arch/pmax/dev/dcvar.h @@ -1,11 +1,10 @@ -/* $NetBSD: dcvar.h,v 1.1 1995/08/04 00:22:12 jonathan Exp $ */ +/* $NetBSD: dcvar.h,v 1.2 1996/01/29 22:52:18 jonathan Exp $ */ /* - * external declarations from DECstation dc serial driver + * External declarations from DECstation dc serial driver. */ extern int dcGetc __P ((dev_t dev)); extern int dcparam __P((register struct tty *tp, register struct termios *t)); -extern void dcPutc __P ((dev_t dev, int c)); - +extern void dcPutc __P((dev_t dev, int c)); diff --git a/sys/arch/pmax/dev/device.h b/sys/arch/pmax/dev/device.h index 9030c3ec20c..e21b7b08d76 100644 --- a/sys/arch/pmax/dev/device.h +++ b/sys/arch/pmax/dev/device.h @@ -1,4 +1,4 @@ -/* $NetBSD: device.h,v 1.8 1995/09/25 21:10:03 jonathan Exp $ */ +/* $NetBSD: device.h,v 1.9 1996/04/10 16:27:38 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -125,4 +125,13 @@ typedef struct ScsiCmd { #ifdef _KERNEL extern struct pmax_ctlr pmax_cinit[]; extern struct pmax_scsi_device scsi_dinit[]; -#endif + +/* + * Old-style pmax driver glue: + * Callbacks to add known a controller, and to configure all slaves on + * all known controllers. + */ +void pmax_add_scsi __P((struct pmax_driver *dp, int unit)); +void configure_scsi __P((void)); + +#endif /* _KERNEL */ diff --git a/sys/arch/pmax/dev/dtop.c b/sys/arch/pmax/dev/dtop.c index 31ae2c9a612..a13ac2dd887 100644 --- a/sys/arch/pmax/dev/dtop.c +++ b/sys/arch/pmax/dev/dtop.c @@ -1,4 +1,4 @@ -/* $NetBSD: dtop.c,v 1.9 1995/09/25 21:12:33 jonathan Exp $ */ +/* $NetBSD: dtop.c,v 1.14.4.2 1996/06/16 17:17:14 mhitch Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -93,7 +93,7 @@ SOFTWARE. ********************************************************/ -#include +#include "dtop.h" #if NDTOP > 0 #include #include @@ -110,17 +110,23 @@ SOFTWARE. #include #include +#include + +#include #include #include #include -#include -#include #include +#include +#include +#include #include #include +#include +#include #include #include @@ -128,19 +134,6 @@ SOFTWARE. extern int pmax_boardtype; -void dtop_keyboard_repeat __P((void *)); -int dtop_null_device_handler __P((dtop_device_t, dtop_message_t, int, int)); -int dtop_locator_handler __P((dtop_device_t, dtop_message_t, int, int)); -int dtop_keyboard_handler __P((dtop_device_t, dtop_message_t, int, int)); -int dtopparam __P((struct tty *, struct termios *)); -int dtopstop __P((struct tty *, int)); -void dtopstart __P((struct tty *)); -void dtopKBDPutc __P((dev_t, int)); - -struct tty *dtop_tty[NDTOP]; -void (*dtopDivertXInput)(); /* X windows keyboard input routine */ -void (*dtopMouseEvent)(); /* X windows mouse motion event routine */ -void (*dtopMouseButtons)(); /* X windows mouse buttons event routine */ #define DTOP_MAX_POLL 0x7fff /* about half a sec */ @@ -158,7 +151,8 @@ typedef volatile unsigned int *poll_reg_t; /* SIR */ * Driver status */ struct dtop_softc { - struct device dtop_dv; + struct device sc_dv; + struct tty *dtop_tty; data_reg_t data; poll_reg_t poll; char polling_mode; @@ -172,10 +166,31 @@ struct dtop_softc { # define DTOP_DEVICE_NO(address) (((address)-DTOP_ADDR_FIRST)>>1) -} dtop_softc[NDTOP]; +}; +#define DTOP_TTY(unit) \ + ( ((struct dtop_softc*) dtop_cd.cd_devs[(unit)]) -> dtop_tty) typedef struct dtop_softc *dtop_softc_t; -struct tty *dtop_tty[NDTOP]; + +/* + * Forward/prototyped declarations + */ +int dtop_get_packet __P((dtop_softc_t dtop, dtop_message_t pkt)); +int dtop_escape __P((int c)); +void dtop_keyboard_repeat __P((void *)); +int dtop_null_device_handler __P((dtop_device_t, dtop_message_t, int, int)); +int dtop_locator_handler __P((dtop_device_t, dtop_message_t, int, int)); +int dtop_keyboard_handler __P((dtop_device_t, dtop_message_t, int, int)); +int dtopparam __P((struct tty *, struct termios *)); +void dtopstart __P((struct tty *)); + +void dtopKBDPutc __P((dev_t, int)); +int dtopKBDGetc __P((dev_t)); + + +void (*dtopDivertXInput)(); /* X windows keyboard input routine */ +void (*dtopMouseEvent)(); /* X windows mouse motion event routine */ +void (*dtopMouseButtons)(); /* X windows mouse buttons event routine */ /* @@ -193,6 +208,7 @@ static u_long keymodes[8] = {0, 0, 0, 0, 0, 0x0003e000, 0, 0}; + /* * Autoconfiguration data for config.new. * Use the statically-allocated softc until old autoconfig code and @@ -203,15 +219,19 @@ int dtopmatch __P((struct device * parent, void *cfdata, void *aux)); void dtopattach __P((struct device *parent, struct device *self, void *aux)); int dtopintr __P((void *sc)); -int dtop_doprobe __P((void *addr, int unit, int pri)); +extern struct cfdriver dtop_cd; -extern struct cfdriver dtopcd; -struct cfdriver dtopcd = { - NULL, "dtop", dtopmatch, dtopattach, DV_DULL, sizeof(struct device), 0 +struct cfattach dtop_ca = { + sizeof(struct dtop_softc), dtopmatch, dtopattach }; +struct cfdriver dtop_cd = { + NULL, "dtop", DV_DULL +}; + + /* - * match driver based on name + * Match driver based on name */ int dtopmatch(parent, match, aux) @@ -219,23 +239,15 @@ dtopmatch(parent, match, aux) void *match; void *aux; { - struct cfdata *cf = match; - struct confargs *ca = aux; - - static int nunits = 0; + /*struct cfdata *cf = match;*/ + struct ioasicdev_attach_args *d = aux; - if (!BUS_MATCHNAME(ca, "dtop")) + if (badaddr((caddr_t)(d->iada_addr), 2)) return (0); - /* - * Use statically-allocated softc and attach code until - * old config is completely gone. Don't over-run softc. - */ - if (nunits > NDTOP) { - printf("dtop: too many units for old config\n"); + if (strcmp(d->iada_modname, "dtop") != 0) return (0); - } - nunits++; + return (1); } @@ -245,49 +257,32 @@ dtopattach(parent, self, aux) struct device *self; void *aux; { - register struct confargs *ca = aux; + register struct ioasicdev_attach_args *d = aux; + struct dtop_softc *sc = (struct dtop_softc*) self; + int i; - (void) dtop_doprobe((void*)MACH_PHYS_TO_UNCACHED(BUS_CVTADDR(ca)), - self->dv_unit, ca->ca_slot); - /* tie pseudo-slot to device */ - BUS_INTR_ESTABLISH(ca, dtopintr, (void*)&dtop_softc[self->dv_unit]); - printf("\n"); -} - -dtop_doprobe(addr, unit, priority) - void *addr; - int unit, priority; -{ - register struct tty *tp; - register int cntr; - int i, s; - dtop_softc_t dtop; - - if (unit >= NDTOP) - return (0); - if (badaddr(addr, 2)) - return (0); - dtop = &dtop_softc[unit]; - - dtop->poll = (poll_reg_t)MACH_PHYS_TO_UNCACHED(XINE_REG_INTR); - dtop->data = (data_reg_t)addr; + sc->poll = (poll_reg_t)MACH_PHYS_TO_UNCACHED(XINE_REG_INTR); + sc->data = (data_reg_t)d->iada_addr; for (i = 0; i < DTOP_MAX_DEVICES; i++) - dtop->device[i].handler = dtop_null_device_handler; + sc->device[i].handler = dtop_null_device_handler; /* a lot more needed here, fornow: */ - dtop->device[DTOP_DEVICE_NO(0x6a)].handler = dtop_locator_handler; - dtop->device[DTOP_DEVICE_NO(0x6c)].handler = dtop_keyboard_handler; - dtop->device[DTOP_DEVICE_NO(0x6c)].status.keyboard.k_ar_state = + sc->device[DTOP_DEVICE_NO(0x6a)].handler = dtop_locator_handler; + sc->device[DTOP_DEVICE_NO(0x6c)].handler = dtop_keyboard_handler; + sc->device[DTOP_DEVICE_NO(0x6c)].status.keyboard.k_ar_state = K_AR_IDLE; - dtop->probed_once = 1; - printf("dtop%d at nexus0 csr 0x%x priority %d\n", - unit, addr, priority); - return (1); + sc->probed_once = 1; + + /* tie pseudo-slot to device */ + ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_NONE, dtopintr, sc); + printf("\n"); } + +int dtopopen(dev, flag, mode, p) dev_t dev; int flag, mode; @@ -298,11 +293,13 @@ dtopopen(dev, flag, mode, p) int s, error = 0; unit = minor(dev); - if (unit >= NDTOP) + if (unit >= dtop_cd.cd_ndevs) return (ENXIO); - tp = dtop_tty[unit]; - if (tp == NULL) - tp = dtop_tty[unit] = ttymalloc(); + tp = DTOP_TTY(unit); + if (tp == NULL) { + tp = DTOP_TTY(unit) = ttymalloc(); + tty_attach(tp); + } tp->t_oproc = dtopstart; tp->t_param = dtopparam; tp->t_dev = dev; @@ -324,8 +321,8 @@ dtopopen(dev, flag, mode, p) while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) && !(tp->t_state & TS_CARR_ON)) { tp->t_state |= TS_WOPEN; - if (error = ttysleep(tp, (caddr_t)&tp->t_rawq, TTIPRI | PCATCH, - ttopen, 0)) + if ((error = ttysleep(tp, (caddr_t)&tp->t_rawq, + TTIPRI | PCATCH, ttopen, 0)) != 0) break; } splx(s); @@ -336,6 +333,7 @@ dtopopen(dev, flag, mode, p) } /*ARGSUSED*/ +int dtopclose(dev, flag, mode, p) dev_t dev; int flag, mode; @@ -345,28 +343,30 @@ dtopclose(dev, flag, mode, p) register int unit; unit = minor(dev); - tp = dtop_tty[unit]; + tp = DTOP_TTY(unit); (*linesw[tp->t_line].l_close)(tp, flag); return (ttyclose(tp)); } +int dtopread(dev, uio, flag) dev_t dev; struct uio *uio; { register struct tty *tp; - tp = dtop_tty[minor(dev)]; + tp = DTOP_TTY(minor(dev)); return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); } +int dtopwrite(dev, uio, flag) dev_t dev; struct uio *uio; { register struct tty *tp; - tp = dtop_tty[minor(dev)]; + tp = DTOP_TTY(minor(dev)); return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); } @@ -374,14 +374,15 @@ struct tty * dtoptty(dev) dev_t dev; { - struct tty *tp = dtop_tty[minor(dev)]; + struct tty *tp = DTOP_TTY(minor(dev)); return (tp); } /*ARGSUSED*/ +int dtopioctl(dev, cmd, data, flag, p) dev_t dev; - int cmd; + u_long cmd; caddr_t data; int flag; struct proc *p; @@ -390,7 +391,7 @@ dtopioctl(dev, cmd, data, flag, p) register int unit = minor(dev); int error; - tp = dtop_tty[unit]; + tp = DTOP_TTY(unit); error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); if (error >= 0) return (error); @@ -449,14 +450,16 @@ dtopintr(sc) * If not probed yet, just throw the data away. */ if (!dtop->probed_once) - return; + return 0; devno = DTOP_DEVICE_NO(msg.src_address); if (devno < 0 || devno > 15) - return; + return (0); + (void) (*dtop->device[devno].handler) (&dtop->device[devno].status, &msg, DTOP_EVENT_RECEIVE_PACKET, 0); + return(0); } void @@ -479,7 +482,7 @@ dtopstart(tp) if (tp->t_outq.c_cc == 0) goto out; /* handle console specially */ - if (tp == dtop_tty[0]) { + if (tp == DTOP_TTY(0)) { while (tp->t_outq.c_cc > 0) { cc = getc(&tp->t_outq) & 0x7f; cnputc(cc); @@ -552,7 +555,9 @@ dtopKBDPutc(dev, c) * A packet MUST be there, this is not checked for. */ #define DTOP_ESC_CHAR 0xf8 +int dtop_escape(c) + int c; { /* I donno much about this stuff.. */ switch (c) { @@ -565,6 +570,7 @@ dtop_escape(c) } } +int dtop_get_packet(dtop, pkt) dtop_softc_t dtop; dtop_message_t pkt; @@ -624,12 +630,14 @@ bad: /* * Get a keyboard char for the console */ -dtopKBDGetc() +int +dtopKBDGetc(dev) + dev_t dev; { register int c; dtop_softc_t dtop; - dtop = &dtop_softc[0]; + dtop = dtop_cd.cd_devs[0]; again: c = -1; @@ -682,6 +690,7 @@ dtopparam(tp, t) * Stop output on a line. */ /*ARGSUSED*/ +int dtopstop(tp, flag) register struct tty *tp; int flag; @@ -694,6 +703,8 @@ dtopstop(tp, flag) tp->t_state |= TS_FLUSH; } splx(s); + + return (0); } /* @@ -782,7 +793,7 @@ dtop_keyboard_handler(dev, msg, event, outc) register u_char *ls, *le, *ns, *ne; u_char save[11], retc; int msg_len, c, s; - struct tty *tp = dtop_tty[0]; + struct tty *tp = DTOP_TTY(0); /* * Fiddle about emulating an lk201 keyboard. The lk501 @@ -838,7 +849,8 @@ dtop_keyboard_handler(dev, msg, event, outc) */ if (msg_len > 0 && dev->keyboard.last_codes_count > 0) { ls = dev->keyboard.last_codes; - le = &dev->keyboard.last_codes[dev->keyboard.last_codes_count]; + le = &dev->keyboard.last_codes[ ((u_int)dev->keyboard. + last_codes_count) ]; ne = &msg->body[msg_len]; for (; ls < le; ls++) { for (ns = msg->body; ns < ne; ns++) @@ -855,7 +867,7 @@ dtop_keyboard_handler(dev, msg, event, outc) le = dev->keyboard.last_codes; ls = &dev->keyboard.last_codes[dev->keyboard.last_codes_count - 1]; for ( ; ls >= le; ls--) - if (c = *ls) { + if ((c = *ls) != 0) { (void) kbdMapChar(c); if (outc == 0 && dtopDivertXInput && @@ -875,7 +887,7 @@ dtop_keyboard_handler(dev, msg, event, outc) if (dtopDivertXInput) { (*dtopDivertXInput)(*ns); c = -1; /* consumed by X */ - } else if (c >= 0) + } else if (c >= 0 && tp != NULL) (*linesw[tp->t_line].l_rint)(c, tp); dev->keyboard.k_ar_state = K_AR_ACTIVE; } @@ -904,7 +916,7 @@ dtop_keyboard_repeat(arg) { dtop_device_t dev = (dtop_device_t)arg; register int i, c; - struct tty *tp = dtop_tty[0]; + struct tty *tp = DTOP_TTY(0); int s = spltty(), gotone = 0; for (i = 0; i < dev->keyboard.last_codes_count; i++) { diff --git a/sys/arch/pmax/dev/dtopvar.h b/sys/arch/pmax/dev/dtopvar.h new file mode 100644 index 00000000000..0f47e91c284 --- /dev/null +++ b/sys/arch/pmax/dev/dtopvar.h @@ -0,0 +1,8 @@ +int dtopKBDGetc __P((dev_t dev)); +void dtopKBDPutc __P((dev_t dev, int c)); + +/* + * Device numbers. + */ +#define DTOPKBD_PORT 0 +#define DTOPMOUSE_PORT 1 diff --git a/sys/arch/pmax/dev/fb.c b/sys/arch/pmax/dev/fb.c index e44d98f12f4..0edc22e46bc 100644 --- a/sys/arch/pmax/dev/fb.c +++ b/sys/arch/pmax/dev/fb.c @@ -1,4 +1,4 @@ -/* $NetBSD: fb.c,v 1.9 1995/10/05 01:52:57 jonathan Exp $ */ +/* $NetBSD: fb.c,v 1.10.4.1 1996/08/13 08:32:18 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -80,24 +80,28 @@ #include #include +#include +#include + #include #include #include #include #include -/*#include */ +#include + #include #include #include -#include +#include "rasterconsole.h" -#include -#include -#include +#include "dc.h" +#include "scc.h" +#include "dtop.h" /* * This framebuffer driver is a generic driver for all supported @@ -121,26 +125,26 @@ extern void fbScreenInit __P (( struct fbinfo *fi)); #if NDC > 0 #include -extern int dcGetc(), dcparam(); -extern void dcPutc(); +#include #endif + #if NDTOP > 0 -#include -extern void dtopKBDPutc(); +#include #endif + #if NSCC > 0 -#include -extern int sccGetc(), sccparam(); -extern void sccPutc(); +#include #endif -/* LK-201 and successor keycode mapping */ -extern int kbdMapChar __P((int keycode)); -extern void KBDReset __P(( dev_t dev, void (*putc) (dev_t, int) )); +/* + * LK-201 and successor keycode mapping +*/ +#include +extern void rcons_connect __P((struct fbinfo *info)); /* XXX */ /* - * The blessed framebuffer; the fb that gets + * The "blessed" framebuffer; the fb that gets * the qvss-style ring buffer of mouse/kbd events, and is used * for glass-tty fb console output. */ @@ -163,7 +167,7 @@ u_short defCursor[32] = { */ #include -#include +#include "fb.h" static struct { @@ -171,11 +175,18 @@ static struct { int cd_ndevs; } fbcd = { {NULL}, 0} ; +void fbattach __P((int n)); + + +/* + * attach routine: required for pseudo-device + */ void fbattach(n) int n; { + /* allocate space for n framebuffers... */ } /* @@ -193,15 +204,17 @@ fbconnect (name, info, silent) static int first = 1; #ifndef FBDRIVER_DOES_ATTACH - /* See if we've already configured this frame buffer; if not, - find a slot for it. */ + /* + * See if we've already configured this frame buffer; + * if not, find an "fb" pseudo-device entry for it. + */ for (fbix = 0; fbix < fbcd.cd_ndevs; fbix++) if ((fbcd.cd_devs [fbix]->fi_type.fb_boardtype == info -> fi_type.fb_boardtype) && fbcd.cd_devs [fbix]->fi_unit == info -> fi_unit) goto got_it; - if (fbcd.cd_ndevs == NFB) { + if (fbcd.cd_ndevs >= NFB) { printf ("fb: more frame buffers probed than configured!\n"); return; } @@ -210,7 +223,9 @@ fbconnect (name, info, silent) fbcd.cd_devs [fbix] = info; #endif /* FBDRIVER_DOES_ATTACH */ - /* If this is the first frame buffer we've seen, pass it to rcons. */ + /* + * If this is the first frame buffer we've seen, pass it to rcons. + */ if (first) { extern dev_t cn_in_dev; /* XXX rcons hackery */ @@ -219,12 +234,7 @@ fbconnect (name, info, silent) #if NRASTERCONSOLE > 0 /*XXX*/ cn_in_dev = cn_tab->cn_dev; /*XXX*/ /* FIXME */ rcons_connect (info); -#else /* no raster console */ - printf("\n"); /* XXX flush out any prom output */ - fbScreenInit(firstfi); - fbScroll(firstfi); - cn_tab->cn_putc = fbPutc; -#endif /* no raster console */ +#endif /* NRASTERCONSOLE */ first = 0; } @@ -240,11 +250,8 @@ got_it: return; } -#if 0 -#include "new_fb.c" /* new framebufer driver with no X support yet */ -#else + #include "fb_usrreq.c" /* old pm-compatblie driver that supports X11R5 */ -#endif /* @@ -264,41 +271,44 @@ tb_kbdmouseconfig(fi) } switch (pmax_boardtype) { + #if NDC > 0 case DS_PMAX: case DS_3MAX: fi->fi_glasstty->KBDPutc = dcPutc; fi->fi_glasstty->kbddev = makedev(DCDEV, DCKBD_PORT); break; -#endif +#endif /* NDC */ + #if NSCC > 0 case DS_3MIN: case DS_3MAXPLUS: fi->fi_glasstty->KBDPutc = sccPutc; fi->fi_glasstty->kbddev = makedev(SCCDEV, SCCKBD_PORT); break; -#endif +#endif /* NSCC */ + #if NDTOP > 0 case DS_MAXINE: fi->fi_glasstty->KBDPutc = dtopKBDPutc; fi->fi_glasstty->kbddev = makedev(DTOPDEV, DTOPKBD_PORT); break; -#endif +#endif /* NDTOP */ + default: printf("Can't configure keyboard/mouse\n"); return (1); }; + return (0); } +/* + * pre-rcons glass-tty emulator (stub) + */ void fbScreenInit(fi) struct fbinfo *fi; { /* how to do this on rcons ? */ } - -#if 0 -/* Use 4.4bsd/pmax frambeuffer glass-tty for console output */ -#include "fb-tty.c" -#endif diff --git a/sys/arch/pmax/dev/fb_usrreq.c b/sys/arch/pmax/dev/fb_usrreq.c index 85e351f8090..5d87a27dfff 100644 --- a/sys/arch/pmax/dev/fb_usrreq.c +++ b/sys/arch/pmax/dev/fb_usrreq.c @@ -1,10 +1,11 @@ /*ARGSUSED*/ -fbopen(dev, flag) +int +fbopen(dev, flag, mode, p) dev_t dev; - int flag; + int flag, mode; + struct proc *p; { register struct fbinfo *fi; - int s; #ifdef fpinitialized if (!fp->initialized) @@ -32,14 +33,14 @@ fbopen(dev, flag) } /*ARGSUSED*/ -fbclose(dev, flag) +int +fbclose(dev, flag, mode, p) dev_t dev; - int flag; + int flag, mode; + struct proc *p; { register struct fbinfo *fi; register struct pmax_fbtty *fbtty; - int pixelsize; - int s; if (minor(dev) >= fbcd.cd_ndevs || (fi = fbcd.cd_devs[minor(dev)]) == NULL) @@ -61,14 +62,15 @@ fbclose(dev, flag) } /*ARGSUSED*/ +int fbioctl(dev, cmd, data, flag, p) dev_t dev; + u_long cmd; caddr_t data; struct proc *p; { register struct fbinfo *fi; register struct pmax_fbtty *fbtty; - int s; char cmap_buf [3]; if (minor(dev) >= fbcd.cd_ndevs || @@ -78,6 +80,11 @@ fbioctl(dev, cmd, data, flag, p) fbtty = fi->fi_glasstty; switch (cmd) { + + /* + * Ultrix-compatible, pm/qvss-style ioctls(). Mostly + * so that X consortium Xservers work. + */ case QIOCGINFO: return (fbmmap_fb(fi, dev, data, p)); @@ -157,13 +164,45 @@ fbioctl(dev, cmd, data, flag, p) (*fi->fi_driver->fbd_blank) (fi); break; + + /* + * Sun-style ioctls, mostly so that screenblank(1) and other + * ``native'' NetBSD applications work. + */ + case FBIOGTYPE: + *(struct fbtype *)data = fi->fi_type; + break; + + case FBIOGETCMAP: + return ((*(fi->fi_driver -> fbd_getcmap)) + (fi, data, 0, fi->fi_type.fb_cmsize)); + + case FBIOPUTCMAP: + return ((*(fi->fi_driver -> fbd_putcmap)) + (fi, data, 0, fi->fi_type.fb_cmsize)); + break; + + case FBIOGVIDEO: + *(int *)data = fi->fi_blanked; + break; + + case FBIOSVIDEO: + if (*(int *)data) + return (*(fi->fi_driver->fbd_blank)) (fi); + else + return (*(fi->fi_driver->fbd_unblank)) (fi); + default: - printf("fb%d: Unknown ioctl command %x\n", minor(dev), cmd); + printf("fb%d: Unknown ioctl command %lx\n", minor(dev), cmd); return (EINVAL); } return (0); } +/* + * Select on Digital-OS-compatible in-kernel input-event ringbuffer. + */ +int fbselect(dev, flag, p) dev_t dev; int flag; @@ -187,8 +226,10 @@ fbselect(dev, flag, p) * Return the physical page number that corresponds to byte offset 'off'. */ /*ARGSUSED*/ +int fbmmap(dev, off, prot) dev_t dev; + int off, prot; { int len; register struct fbinfo *fi; @@ -197,12 +238,12 @@ fbmmap(dev, off, prot) (fi = fbcd.cd_devs[minor(dev)]) == NULL) return(-1); - len = pmax_round_page(((vm_offset_t)fi->fi_fbu & PGOFSET) + len = mips_round_page(((vm_offset_t)fi->fi_fbu & PGOFSET) + sizeof(*fi->fi_fbu)); if (off < len) - return pmax_btop(MACH_CACHED_TO_PHYS(fi->fi_fbu) + off); + return (int)mips_btop(MACH_CACHED_TO_PHYS(fi->fi_fbu) + off); off -= len; if (off >= fi->fi_type.fb_size) return (-1); - return pmax_btop(MACH_UNCACHED_TO_PHYS(fi->fi_pixels) + off); + return (int)mips_btop(MACH_UNCACHED_TO_PHYS(fi->fi_pixels) + off); } diff --git a/sys/arch/pmax/dev/font.c b/sys/arch/pmax/dev/font.c index d8986811158..7452ec7a83d 100644 --- a/sys/arch/pmax/dev/font.c +++ b/sys/arch/pmax/dev/font.c @@ -1,4 +1,4 @@ -/* $NetBSD: font.c,v 1.7 1995/10/05 01:52:44 jonathan Exp $ */ +/* $NetBSD: font.c,v 1.8 1996/04/07 19:53:36 jonathan Exp $ */ /* * Copyright (c) 1991, 1993, 1995 @@ -60,6 +60,8 @@ #include /* Little-endian font for rcons */ +void rcons_font __P((struct rconsole *rc)); + void rcons_font(rc) register struct rconsole *rc; diff --git a/sys/arch/pmax/dev/ims332.c b/sys/arch/pmax/dev/ims332.c index 651a6b77a71..83abb3f9b63 100644 --- a/sys/arch/pmax/dev/ims332.c +++ b/sys/arch/pmax/dev/ims332.c @@ -1,4 +1,4 @@ -/* $NetBSD: ims332.c,v 1.1 1995/09/11 08:11:24 jonathan Exp $ */ +/* $NetBSD: ims332.c,v 1.2.4.1 1996/09/09 20:16:32 thorpej Exp $ */ /*- * Copyright (c) 1992, 1993, 1995 @@ -40,6 +40,7 @@ */ #include +#include #include #include #include @@ -50,19 +51,25 @@ #include #include +static u_int ims332_read_register (struct fbinfo *, int); +static void ims332_write_register (struct fbinfo *, int, unsigned int); + #define assert_ims332_reset_bit(r) *r &= ~0x40 #define deassert_ims332_reset_bit(r) *r |= 0x40 -int ims332init(fi) +int +ims332init(fi) struct fbinfo *fi; { - register u_int *reset = (u_int *)fi -> fi_base; int i; /* * Initialize the screen. (xcfb-specific) */ #ifdef notdef + register u_int *reset = (u_int *)fi -> fi_base; + + assert_ims332_reset_bit(reset); DELAY(1); /* specs sez 50ns.. */ deassert_ims332_reset_bit(reset); @@ -95,7 +102,7 @@ int ims332init(fi) ims332_write_register (fi, IMS332_REG_XFER_DELAY, 0xa); ims332_write_register (fi, IMS332_REG_COLOR_MASK, 0xffffff); -#endif +#endif /* notdef */ /* Zero out the cursor RAM... */ for (i = 0; i < 512; i++) @@ -191,13 +198,13 @@ ims332LoadColorMap(fi, bits, index, count) for (i = 0; i < count; i++) { ims332_write_register (fi, - IMS332_REG_LUT_BASE + i, - (cmap_bits [i * 3 + 1] << 16) | + IMS332_REG_LUT_BASE + i + index, + (cmap_bits [i * 3 + 2] << 16) | (cmap_bits [i * 3 + 1] << 8) | (cmap_bits [i * 3])); - cmap [(i + index) * 3] = cmap_bits [i * 3]; - cmap [(i + index) * 3 + 1] = cmap_bits [i * 3 + 1]; - cmap [(i + index) * 3 + 2] = cmap_bits [i * 3 + 2]; + cmap [i * 3] = cmap_bits [i * 3]; + cmap [i * 3 + 1] = cmap_bits [i * 3 + 1]; + cmap [i * 3 + 2] = cmap_bits [i * 3 + 2]; } return 0; } @@ -212,7 +219,6 @@ ims332GetColorMap(fi, bits, index, count) { u_char *cmap_bits; u_char *cmap; - int i; if (index > 256 || index < 0 || index + count > 256) return EINVAL; @@ -262,7 +268,6 @@ ims332_video_on (fi) struct fbinfo *fi; { u_char *cmap; - int i; u_int csr; if (!fi -> fi_blanked) @@ -334,7 +339,7 @@ ims332CursorColor (fi, color) struct fbinfo *fi; unsigned int color[]; { - register int i, j; + register int i; for (i = 0; i < 6; i++) cursor_RGB[i] = (u_char)(color[i] >> 8); diff --git a/sys/arch/pmax/dev/ims332.h b/sys/arch/pmax/dev/ims332.h index ff4659d2fdf..0f64e1b2db0 100644 --- a/sys/arch/pmax/dev/ims332.h +++ b/sys/arch/pmax/dev/ims332.h @@ -1,4 +1,4 @@ -/* $NetBSD: ims332.h,v 1.1 1995/09/11 08:11:25 jonathan Exp $ */ +/* $NetBSD: ims332.h,v 1.2 1996/04/08 00:57:38 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -168,8 +168,6 @@ #define IMS332_BOOT_xxx 0xffff80 /* reserved, mbz */ int ims332init (struct fbinfo *); -static u_int ims332_read_register (struct fbinfo *, int); -static void ims332_write_register (struct fbinfo *, int, unsigned int); void ims332InitColorMap (struct fbinfo *); int ims332LoadColorMap (struct fbinfo *, caddr_t, int, int); int ims332GetColorMap (struct fbinfo *, caddr_t, int, int); diff --git a/sys/arch/pmax/dev/lk201.c b/sys/arch/pmax/dev/lk201.c index 59f5972e40a..6a792aecf58 100644 --- a/sys/arch/pmax/dev/lk201.c +++ b/sys/arch/pmax/dev/lk201.c @@ -5,6 +5,7 @@ #include +#include #include #include #include @@ -12,6 +13,7 @@ #include #include +#include /* Exported functions */ diff --git a/sys/arch/pmax/dev/lk201var.h b/sys/arch/pmax/dev/lk201var.h new file mode 100644 index 00000000000..038ac8891f1 --- /dev/null +++ b/sys/arch/pmax/dev/lk201var.h @@ -0,0 +1,15 @@ +#ifndef _LK201VAR_H_ +#define _LK201VAR_H_ + + +#ifdef _KERNEL + +extern int kbdMapChar __P((int)); +extern void KBDReset __P((dev_t, void (*)(dev_t, int))); +extern void MouseInit __P((dev_t, void (*)(dev_t, int), int (*)(dev_t))); +extern void mouseInput __P((int cc)); + +extern int LKgetc __P((dev_t dev)); +extern void lk_divert __P((int (*getfn) __P ((dev_t dev)), dev_t in_dev)); +#endif +#endif /* _LK201VAR_H_ */ diff --git a/sys/arch/pmax/dev/mfb.c b/sys/arch/pmax/dev/mfb.c index 927467e4c8a..d1b243ce73e 100644 --- a/sys/arch/pmax/dev/mfb.c +++ b/sys/arch/pmax/dev/mfb.c @@ -1,4 +1,4 @@ -/* $NetBSD: mfb.c,v 1.8 1995/09/11 07:45:41 jonathan Exp $ */ +/* $NetBSD: mfb.c,v 1.13.4.2 1996/09/09 20:07:04 thorpej Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -80,14 +80,19 @@ * v 9.2 90/02/13 22:16:24 shirriff Exp SPRITE (DECWRL)"; */ -#include -#include +#include "fb.h" +#include "mfb.h" #if NMFB > 0 #include #include #include +#include #include #include +#include + +#include +#include #include #include @@ -107,15 +112,22 @@ struct fbuaccess mfbu; struct pmax_fbtty mfbfb; struct fbinfo mfbfi; /*XXX*/ +extern int pmax_boardtype; + /* * Forward references. */ +#define CMAP_BITS (3 * 256) /* 256 entries, 3 bytes per. */ +static u_char cmap_bits [CMAP_BITS]; /* colormap for console... */ + extern void fbScreenInit __P((struct fbinfo *fia)); void mfbPosCursor __P((struct fbinfo *fi, int x, int y)); +int mfbinit __P((struct fbinfo *fi, caddr_t mfbaddr, int unit, int silent)); + #if 1 /* these go away when we use the abstracted-out chip drivers */ static void mfbLoadCursor __P((struct fbinfo *fi, u_short *ptr)); static void mfbRestoreCursorColor __P((struct fbinfo *fi)); @@ -136,9 +148,16 @@ int mfbGetColorMap __P((struct fbinfo *fi, caddr_t, int, int)); static int bt455_video_on __P((struct fbinfo *)); static int bt455_video_off __P((struct fbinfo *)); -static void bt431_select_reg(); -static void bt431_write_reg(), bt431_init(); -static u_char bt431_read_reg(); + +static void bt431_init __P((bt431_regmap_t *regs)); +static void bt431_select_reg __P((bt431_regmap_t *regs, int regno)); +static void bt431_write_reg __P((bt431_regmap_t *regs, int regno, int val)); + +#ifdef notused +static u_char bt431_read_reg __P((bt431_regmap_t *regs, int regno)); +#endif + + /* * old pmax-framebuffer hackery @@ -173,8 +192,6 @@ struct fbdriver mfb_driver = { #define MFB_OFFSET_ROM 0x0 /* Diagnostic ROM */ #define MFB_FB_SIZE 0x200000 /* frame buffer size */ -#include -#include /* * Autoconfiguration data for config.new. @@ -184,22 +201,15 @@ struct fbdriver mfb_driver = { int mfbmatch __P((struct device *, void *, void *)); void mfbattach __P((struct device *, struct device *, void *)); +int mfb_intr __P((void *sc)); -struct cfdriver mfbcd = { - NULL, "mfb", mfbmatch, mfbattach, DV_DULL, sizeof(struct device), 0 +struct cfattach mfb_ca = { + sizeof(struct device), mfbmatch, mfbattach }; -#if 0 -int -mfbprobe(addr) - caddr_t addr; -{ - - /* make sure that we're looking for this type of device. */ - if (!BUS_MATCHNAME(ca, "PMAG-AA ")) - return (0); -} -#endif +struct cfdriver mfb_cd = { + NULL, "mfb", DV_DULL +}; int mfbmatch(parent, match, aux) @@ -207,9 +217,7 @@ mfbmatch(parent, match, aux) void *match; void *aux; { - struct cfdata *cf = match; - struct confargs *ca = aux; - static int nmfbs = 1; + struct tc_attach_args *ta = aux; #ifdef FBDRIVER_DOES_ATTACH /* leave configuration to the fb driver */ @@ -217,14 +225,9 @@ mfbmatch(parent, match, aux) #endif /* make sure that we're looking for this type of device. */ - if (!BUS_MATCHNAME(ca, "PMAG-AA ")) + if (!TC_BUS_MATCHNAME(ta, "PMAG-AA ")) return (0); -#ifdef notyet - /* if it can't have the one mentioned, reject it */ - if (cf->cf_unit >= nmfbs) - return (0); -#endif return (1); } @@ -234,23 +237,32 @@ mfbattach(parent, self, aux) struct device *self; void *aux; { - struct confargs *ca = aux; - caddr_t base = BUS_CVTADDR(ca); + struct tc_attach_args *ta = aux; + caddr_t mfbaddr = (caddr_t) ta->ta_addr; int unit = self->dv_unit; - struct fbinfo *fi = &mfbfi; + struct fbinfo *fi = (struct fbinfo *) self; #ifdef notyet + struct fbinfo *fi = &mfbfi; + /* if this is the console, it's already configured. */ - if (ca->ca_slotpri == cons_slot) + if (ta->ta_cookie == cons_slot) return; /* XXX patch up f softc pointer */ #endif - - if (!mfbinit(BUS_CVTADDR(ca), unit, 0)) + if (!mfbinit(fi, mfbaddr, unit, 0)) return; - /* no interrupts for MFB */ - /*BUS_INTR_ESTABLISH(ca, sccintr, self->dv_unit);*/ + /* + * 3MIN does not mask un-established TC option interrupts, + * so establish a handler. + * XXX Should store cmap updates in softc and apply in the + * interrupt handler, which interrupts during vertical-retrace. + */ + if (pmax_boardtype == DS_3MIN) { + tc_intr_establish(parent, (void*)ta->ta_cookie, TC_IPL_NONE, + mfb_intr, fi); + } printf("\n"); } @@ -259,17 +271,37 @@ mfbattach(parent, self, aux) * Initialization */ int -mfbinit(mfbaddr, unit, silent) +mfbinit(fi, mfbaddr, unit, silent) + struct fbinfo *fi; caddr_t mfbaddr; int unit; int silent; { - register struct fbinfo *fi = &mfbfi; + + register int isconsole = 0; + + /* + * If this device is being intialized as the console, malloc() + * is not yet up and we must use statically-allocated space. + */ + if (fi == NULL) { + fi = &mfbfi; /* XXX */ + fi->fi_cmap_bits = (caddr_t)cmap_bits; + isconsole = 1; + } + else { + fi->fi_cmap_bits = malloc(CMAP_BITS, M_DEVBUF, M_NOWAIT); + if (fi->fi_cmap_bits == NULL) { + printf("mfb%d: no memory for cmap\n", unit); + return (0); + } + } /* check for no frame buffer */ - if (badaddr(mfbaddr, 4)) + if (badaddr(mfbaddr, 4)) { + printf("mfb: bad address 0x%p\n", mfbaddr); return (0); - + } /* Fill in main frame buffer info struct. */ fi->fi_unit = unit; @@ -281,7 +313,6 @@ mfbinit(mfbaddr, unit, silent) fi->fi_linebytes = 1280; fi->fi_driver = &mfb_driver; fi->fi_blanked = 0; - fi->fi_cmap_bits = (caddr_t)0; /* Fill in Frame Buffer Type struct. */ fi->fi_type.fb_boardtype = PMAX_FBTYPE_MFB; @@ -326,7 +357,9 @@ mfbinit(mfbaddr, unit, silent) if (tb_kbdmouseconfig(fi)) return (0); - mfbInitColorMapBlack(fi, 0); + /* white-on-black if console, black-on-black otherwise. */ + mfbInitColorMapBlack(fi, isconsole); + /* * Connect to the raster-console pseudo-driver. @@ -417,11 +450,11 @@ mfbRestoreCursorColor (fi) else fg = 0; regs->addr_ovly = fg; - MachEmptyWriteBuffer(); + wbflush(); regs->addr_ovly = fg; - MachEmptyWriteBuffer(); + wbflush(); regs->addr_ovly = fg; - MachEmptyWriteBuffer(); + wbflush(); } /* Set the color of the cursor. */ @@ -431,7 +464,7 @@ mfbCursorColor(fi, color) struct fbinfo *fi; unsigned int color[]; { - register int i, j; + register int i; for (i = 0; i < 6; i++) cursor_RGB[i] = (u_char)(color[i] >> 8); @@ -544,14 +577,15 @@ mfbLoadColorMap(fi, bits, index, count) for (i = 0; i < count; i++) { cmap [(i + index) * 3] = regs->addr_cmap_data = cmap_bits [i * 3] >> 4; - MachEmptyWriteBuffer(); + wbflush(); cmap [(i + index) * 3 + 1] = regs->addr_cmap_data = cmap_bits [i * 3 + 1] >> 4; - MachEmptyWriteBuffer(); + wbflush(); cmap [(i + index) * 3 + 2] = regs->addr_cmap_data = cmap_bits [i * 3 + 2] >> 4; - MachEmptyWriteBuffer(); + wbflush(); } + return 0; } /* stub for driver */ @@ -573,10 +607,9 @@ mfbGetColorMap(fi, bits, index, count) caddr_t bits; int index, count; { - bt455_regmap_t *regs = (bt455_regmap_t *)(fi -> fi_vdac); + /*bt455_regmap_t *regs = (bt455_regmap_t *)(fi -> fi_vdac);*/ u_char *cmap_bits; u_char *cmap; - int i; if (index > 15 || index < 0 || index + count > 15) return EINVAL; @@ -599,7 +632,7 @@ bt455_video_on(fi) u_char *cmap; if (!fi -> fi_blanked) - return; + return 0; cmap = (u_char *)(fi -> fi_cmap_bits); @@ -607,10 +640,12 @@ bt455_video_on(fi) BT455_SELECT_ENTRY(regs, 0); for (i = 0; i < 6; i++) { regs->addr_cmap_data = cmap [i]; - MachEmptyWriteBuffer(); + wbflush(); } mfbRestoreCursorColor (fi); fi -> fi_blanked = 0; + + return 0; } /* @@ -638,7 +673,7 @@ bt455_video_off(fi) u_char *cmap; if (fi -> fi_blanked) - return; + return 0; cmap = (u_char *)(fi -> fi_cmap_bits); @@ -649,13 +684,15 @@ bt455_video_off(fi) for (i = 0; i < 6; i++) { cursor_RGB[i] = 0; regs->addr_cmap_data = 0; - MachEmptyWriteBuffer(); + wbflush(); } mfbRestoreCursorColor (fi); bcopy (cursor_save, cursor_RGB, 6); fi -> fi_blanked = 0; + + return 0; } /* @@ -667,7 +704,7 @@ bt431_select_reg(regs, regno) { regs->addr_lo = SET_VALUE(regno & 0xff); regs->addr_hi = SET_VALUE((regno >> 8) & 0xff); - MachEmptyWriteBuffer(); + wbflush(); } static void @@ -676,9 +713,10 @@ bt431_write_reg(regs, regno, val) { bt431_select_reg(regs, regno); regs->addr_reg = SET_VALUE(val); - MachEmptyWriteBuffer(); + wbflush(); } +#ifdef notused static u_char bt431_read_reg(regs, regno) bt431_regmap_t *regs; @@ -686,12 +724,13 @@ bt431_read_reg(regs, regno) bt431_select_reg(regs, regno); return (GET_VALUE(regs->addr_reg)); } +#endif + static void bt431_init(regs) bt431_regmap_t *regs; { - register int i; /* use 4:1 input mux */ bt431_write_reg(regs, BT431_REG_CMD, @@ -714,5 +753,24 @@ bt431_init(regs) BT431_WRITE_REG_AUTOI(regs, 0x00); BT431_WRITE_REG_AUTOI(regs, 0x00); } + +/* + * copied from cfb_intr + */ +int +mfb_intr(sc) + void *sc; +{ + struct fbinfo *fi = /* XXX (struct fbinfo *)sc */ &mfbfi; + volatile int junk; + char *slot_addr = (((char *)fi->fi_base) - MFB_OFFSET_BT431); + + /* reset vertical-retrace interrupt by writing a dont-care */ + junk = *(volatile int*) (slot_addr + MFB_OFFSET_IREQ); + *(volatile int*) (slot_addr + MFB_OFFSET_IREQ) = 0; + + return (0); +} + #endif /* NMFB */ diff --git a/sys/arch/pmax/dev/mfbreg.h b/sys/arch/pmax/dev/mfbreg.h index d4a25a6f49d..039ad395a42 100644 --- a/sys/arch/pmax/dev/mfbreg.h +++ b/sys/arch/pmax/dev/mfbreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: mfbreg.h,v 1.4 1994/10/26 21:09:11 cgd Exp $ */ +/* $NetBSD: mfbreg.h,v 1.4.6.1 1996/08/13 08:03:52 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -87,7 +87,7 @@ typedef struct { /* when using autoincrement */ #define BT431_WRITE_REG_AUTOI(regs, val) { \ (regs)->addr_reg = SET_VALUE(val); \ - MachEmptyWriteBuffer(); \ + wbflush(); \ } #define BT431_READ_REG_AUTOI(regs) \ @@ -95,7 +95,7 @@ typedef struct { #define BT431_WRITE_CMAP_AUTOI(regs, val) { \ (regs)->addr_cmap = (val); \ - MachEmptyWriteBuffer(); \ + wbflush(); \ } #define BT431_READ_CMAP_AUTOI(regs) \ @@ -118,7 +118,7 @@ typedef struct { */ #define BT455_SELECT_ENTRY(regs, regno) { \ (regs)->addr_cmap = (regno)&0x0f; \ - MachEmptyWriteBuffer(); \ + wbflush(); \ } /* diff --git a/sys/arch/pmax/dev/pdma.h b/sys/arch/pmax/dev/pdma.h index 96a74169f01..f0bc1c153ce 100644 --- a/sys/arch/pmax/dev/pdma.h +++ b/sys/arch/pmax/dev/pdma.h @@ -1,4 +1,4 @@ -/* $NetBSD: pdma.h,v 1.4 1994/10/26 21:09:11 cgd Exp $ */ +/* $NetBSD: pdma.h,v 1.5 1996/04/10 17:38:04 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -43,5 +43,5 @@ struct pdma { char *p_mem; char *p_end; int p_arg; - void (*p_fcn)(); + void (*p_fcn) __P((struct tty *tp)); }; diff --git a/sys/arch/pmax/dev/pm.c b/sys/arch/pmax/dev/pm.c index 28a4a093ee9..fa4244302ba 100644 --- a/sys/arch/pmax/dev/pm.c +++ b/sys/arch/pmax/dev/pm.c @@ -1,4 +1,4 @@ -/* $NetBSD: pm.c,v 1.10 1995/11/25 10:39:57 mellon Exp $ */ +/* $NetBSD: pm.c,v 1.14.4.1 1996/09/09 20:49:38 thorpej Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -56,9 +56,9 @@ */ -#include -#include -#include +#include "fb.h" +#include "pm.h" +#include "dc.h" #if NPM > 0 #if NDC == 0 pm needs dc device @@ -72,6 +72,7 @@ pm needs dc device #include #include #include +#include #include @@ -113,10 +114,6 @@ extern void pmScreenInit __P((struct fbinfo *fi)); static void pmLoadCursor __P((struct fbinfo *fi, u_short *ptr)); void pmPosCursor __P((struct fbinfo *fi, int x, int y)); -#ifdef notyet /* these should be removed */ -static void pmRestoreCursorColor __P(()); - -#endif void bt478CursorColor __P((struct fbinfo *fi, u_int *color)); void bt478InitColorMap __P((struct fbinfo *fi)); @@ -151,7 +148,7 @@ void genKbdEvent(), genMouseEvent(), genMouseButtons(); extern void pmEventQueueInit __P((pmEventQueue *qe)); #define CMAP_BITS (3 * 256) /* 256 entries, 3 bytes per. */ -static u_char cmap_bits [NPM * CMAP_BITS]; /* One colormap per pm... */ +static u_char cmap_bits [CMAP_BITS]; /* colormap for console... */ /* @@ -163,8 +160,12 @@ static u_char cmap_bits [NPM * CMAP_BITS]; /* One colormap per pm... */ int pmmatch __P((struct device *, void *, void *)); void pmattach __P((struct device *, struct device *, void *)); -struct cfdriver pmcd = { - NULL, "pm", pmmatch, pmattach, DV_DULL, sizeof(struct device), 0 +struct cfattach pm_ca = { + sizeof(struct device), pmmatch, pmattach +}; + +struct cfdriver pm_cd = { + NULL, "pm", DV_DULL }; /* new-style raster-cons "driver" methods */ @@ -188,22 +189,15 @@ pmmatch(parent, match, aux) { struct cfdata *cf = match; struct confargs *ca = aux; - static int npms = 1; - caddr_t pmaddr = BUS_CVTADDR(ca); - + caddr_t pmaddr = (caddr_t)ca->ca_addr; /* make sure that we're looking for this type of device. */ - if (!BUS_MATCHNAME(ca, "pm")) + if (strcmp(ca->ca_name, "pm") != 0) return (0); if (badaddr(pmaddr, 4)) return (0); -#ifdef notyet - /* if it can't have the one mentioned, reject it */ - if (cf->cf_unit >= npms) - return (0); -#endif return (1); } @@ -214,20 +208,21 @@ pmattach(parent, self, aux) void *aux; { struct confargs *ca = aux; - caddr_t pmaddr = BUS_CVTADDR(ca); + caddr_t pmaddr = (caddr_t)ca->ca_addr; if (!pminit(&pmfi, 0, 0)) return; /* no interrupts for PM */ /*BUS_INTR_ESTABLISH(ca, sccintr, self->dv_unit);*/ + printf("\n"); return; } /* - * Test to see if device is present. - * Return true if found and initialized ok. + * pmax FB initialization. This is abstracted out from pmbattch() so + * that a console framebuffer can be initialized early in boot. */ pminit(fi, unit, silent) struct fbinfo *fi; @@ -236,7 +231,21 @@ pminit(fi, unit, silent) { register PCCRegs *pcc = (PCCRegs *)MACH_PHYS_TO_UNCACHED(KN01_SYS_PCC); - if (fi == 0) fi = &pmfi; + /*XXX*/ + /* + * If this device is being intialized as the console, malloc() + * is not yet up and we must use statically-allocated space. + */ + if (fi == NULL) { + fi = &pmfi; /* XXX */ + fi->fi_cmap_bits = (caddr_t)cmap_bits; + } else { + fi->fi_cmap_bits = malloc(CMAP_BITS, M_DEVBUF, M_NOWAIT); + if (fi->fi_cmap_bits == NULL) { + printf("pm%d: no memory for cmap 0x%x\n", unit); + return (0); + } + } /* Set address of frame buffer... */ fi->fi_pixels = (caddr_t)MACH_PHYS_TO_UNCACHED(KN01_PHYS_FBUF_START); @@ -310,7 +319,7 @@ pminit(fi, unit, silent) /* * Initialize the color map, the screen, and the mouse. */ - bt478init(&pmfi); + bt478init(fi); /* * Initialize old-style pmax screen info. @@ -326,7 +335,7 @@ pminit(fi, unit, silent) #ifdef notanymore - bt478InitColorMap(&pmfi); /* done inside bt478init() */ + bt478InitColorMap(fi); /* done inside bt478init() */ #endif /* diff --git a/sys/arch/pmax/dev/pmvar.h b/sys/arch/pmax/dev/pmvar.h new file mode 100644 index 00000000000..c56f1b8c9ac --- /dev/null +++ b/sys/arch/pmax/dev/pmvar.h @@ -0,0 +1,5 @@ +/* + * Initialize a Decstation 3100/2100 baseboard framebuffer, + * so it can be used as a bitmapped glass-tty console device. + */ +int pminit __P((struct fbinfo *fi, int unit, int silent)); diff --git a/sys/arch/pmax/dev/qvss.h b/sys/arch/pmax/dev/qvss.h index 8fc863f07e9..e2fb9145bcd 100644 --- a/sys/arch/pmax/dev/qvss.h +++ b/sys/arch/pmax/dev/qvss.h @@ -1,4 +1,4 @@ -/* $NetBSD: qvss.h,v 1.3 1995/12/14 16:27:33 jonathan Exp $ */ +/* $NetBSD: qvss.h,v 1.4 1996/04/07 19:54:37 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -567,21 +567,21 @@ static u_int32_t qvss_58_pixels [] = { static struct raster qvss_58 = { 8, 15, 1, 1, qvss_58_pixels, 0 }; static u_int32_t qvss_59_pixels [] = { - 0x00, /* 0x00000000 /* */ - 0x00, /* 0x00000000 /* */ - 0x00, /* 0x00000000 /* */ - 0x00, /* 0x00000000 /* */ - 0x00, /* 0x00000000 /* */ - 0x08, /* 0x00001000 /* */ - 0x1c, /* 0x00011100 /* */ - 0x08, /* 0x00001000 /* */ - 0x00, /* 0x00000000 /* */ - 0x00, /* 0x00000000 /* */ - 0x1c, /* 0x00011100 /* */ - 0x0c, /* 0x00001100 /* */ - 0x02, /* 0x00000010 /* */ - 0x00, /* 0x00000000 /* */ - 0x00, /* 0x00000000 /* */ + 0x00, /* 0x00000000 ; */ + 0x00, /* 0x00000000 ; */ + 0x00, /* 0x00000000 ; */ + 0x00, /* 0x00000000 ; */ + 0x00, /* 0x00000000 ; */ + 0x08, /* 0x00001000 ; */ + 0x1c, /* 0x00011100 ; */ + 0x08, /* 0x00001000 ; */ + 0x00, /* 0x00000000 ; */ + 0x00, /* 0x00000000 ; */ + 0x1c, /* 0x00011100 ; */ + 0x0c, /* 0x00001100 ; */ + 0x02, /* 0x00000010 ; */ + 0x00, /* 0x00000000 ; */ + 0x00, /* 0x00000000 ; */ }; static struct raster qvss_59 = { 8, 15, 1, 1, qvss_59_pixels, 0 }; diff --git a/sys/arch/pmax/dev/qvss_compat.c b/sys/arch/pmax/dev/qvss_compat.c index ebca22aabac..f618efd81f9 100644 --- a/sys/arch/pmax/dev/qvss_compat.c +++ b/sys/arch/pmax/dev/qvss_compat.c @@ -1,4 +1,4 @@ -/* $NetBSD: qvss_compat.c,v 1.2 1995/09/18 03:01:24 jonathan Exp $ */ +/* $NetBSD: qvss_compat.c,v 1.4 1996/05/19 01:16:18 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -81,7 +81,7 @@ #include #include -#include +#include /* XXX should be renamed fbvar.h */ #include /*#include */ @@ -89,19 +89,27 @@ #include #include -#include -#include -#include +#include "dc.h" +#include "scc.h" +#include "dtop.h" /* * Forward / extern references. */ -extern void pmEventQueueInit __P((pmEventQueue *qe)); -void fbKbdEvent(), fbMouseEvent(), fbMouseButtons(), fbScroll(); +#include /* our own externs */ extern int pmax_boardtype; +extern void pmEventQueueInit __P((pmEventQueue *qe)); +void genKbdEvent __P((int ch)); +void genMouseEvent __P((MouseReport *newRepPtr)); +void genMouseButtons __P((MouseReport *newRepPtr)); +void genConfigMouse __P((void)); +void genDeconfigMouse __P((void)); +void mouseInput __P((int cc)); + + #if NDC > 0 extern void (*dcDivertXInput)(); @@ -146,6 +154,7 @@ extern struct fbinfo *firstfi; * are gone. Note that the QVSS/pm mapped event buffer includes the * fbu field initialized below. */ +void init_pmaxfbu(fi) struct fbinfo *fi; { @@ -188,8 +197,7 @@ init_pmaxfbu(fi) if (tty_rows != fbu->scrInfo.max_row || tty_cols != fbu->scrInfo.max_col) - printf("framebuffer init: size mismatch", - "given %dx%d, compute %dx%x\n", + printf("framebuffer init: size mismatch: given %dx%d, compute %dx%d\n", fbu->scrInfo.max_row, fbu->scrInfo.max_col, tty_rows, tty_cols); @@ -471,6 +479,7 @@ fbMouseButtons(newRepPtr, fi) * address space. * Return errno if there was an error. */ +int fbmmap_fb(fi, dev, data, p) struct fbinfo *fi; dev_t dev; @@ -485,9 +494,9 @@ fbmmap_fb(fi, dev, data, p) struct fbuaccess *fbp; register struct fbuaccess *fbu = fi->fi_fbu; - len = pmax_round_page(((vm_offset_t)fbu & PGOFSET) + + len = mips_round_page(((vm_offset_t)fbu & PGOFSET) + sizeof(struct fbuaccess)) + - pmax_round_page(fi->fi_type.fb_size); + mips_round_page(fi->fi_type.fb_size); addr = (vm_offset_t)0x20000000; /* XXX */ vn.v_type = VCHR; /* XXX */ vn.v_specinfo = &si; /* XXX */ @@ -509,7 +518,7 @@ fbmmap_fb(fi, dev, data, p) /* * Map the frame buffer into the user's address space. */ - fbu->scrInfo.bitmap = (char *)pmax_round_page(fbp + 1); + fbu->scrInfo.bitmap = (char *)mips_round_page(fbp + 1); return (0); } diff --git a/sys/arch/pmax/dev/qvssvar.h b/sys/arch/pmax/dev/qvssvar.h new file mode 100644 index 00000000000..8b8a9ea1c80 --- /dev/null +++ b/sys/arch/pmax/dev/qvssvar.h @@ -0,0 +1,28 @@ +/* $NetBSD: qvssvar.h,v 1.1 1996/05/19 00:48:43 jonathan Exp $ */ +/* + * Copyright 1996 The Board of Trustees of The Leland Stanford + * Junior University. All Rights Reserved. + * + * Permission to use, copy, modify, and distribute this + * software and its documentation for any purpose and without + * fee is hereby granted, provided that the above copyright + * notice appear in all copies. Stanford University + * makes no representations about the suitability of this + * software for any purpose. It is provided "as is" without + * express or implied warranty. + * + * This file contributed by Jonathan Stone. + */ + +#ifdef _KERNEL + +void pmEventQueueInit __P((pmEventQueue *qe)); + +void genKbdEvent __P((int ch)); +void genMouseEvent __P((MouseReport *newRepPtr)); +void genMouseButtons __P((MouseReport *newRepPtr)); +void genConfigMouse __P((void)); +void genDeconfigMouse __P((void)); +void mouseInput __P((int cc)); + +#endif /* _KERNEL */ diff --git a/sys/arch/pmax/dev/rcons.c b/sys/arch/pmax/dev/rcons.c index 12defae2008..6d07990b995 100644 --- a/sys/arch/pmax/dev/rcons.c +++ b/sys/arch/pmax/dev/rcons.c @@ -1,4 +1,4 @@ -/* $NetBSD: rcons.c,v 1.6 1995/10/05 01:52:51 jonathan Exp $ */ +/* $NetBSD: rcons.c,v 1.9 1996/05/19 01:06:14 jonathan Exp $ */ /* * Copyright (c) 1995 @@ -37,7 +37,7 @@ * */ -#include +#include "rasterconsole.h" #if NRASTERCONSOLE > 0 #include @@ -49,10 +49,12 @@ #include #include #include +#include #include #include + #include #include #include @@ -67,6 +69,7 @@ #include #include #include +#include #include #include @@ -91,11 +94,20 @@ dev_t cn_in_dev = NODEV; /* console input device. */ char rcons_maxcols [20]; -void rcons_vputc __P ((dev_t dev, int c)); +void rcons_connect __P((struct fbinfo *info)); +void rasterconsoleattach __P((int n)); +void rcons_vputc __P ((dev_t dev, int c)); + + +void rconsreset __P((struct tty *tp, int rw)); +void rconsstrategy __P((struct buf *bp)); +void rcons_input __P((dev_t dev, int ic)); + +void rconsstart __P((struct tty *)); -extern int (*v_putc) /*__P((dev_t dev, int c))*/ (); void nobell __P ((int)); + /* * rcons_connect is called by fbconnect when the first frame buffer is * attached. That frame buffer will always be the console frame buffer. @@ -107,7 +119,6 @@ rcons_connect (info) static struct rconsole rc; static int row, col; - void * tem; /* If we're running a serial console, don't set up a raster console even if there's a device that can support it. */ if (cn_tab -> cn_pri == CN_REMOTE) @@ -153,7 +164,6 @@ rcons_connect (info) row = (rc.rc_height / HW_FONT_HEIGHT) - 1; col = 0; - tem = v_putc; /* rcons putchar signature doesn't match dev/cons */ rcons_init (&rc); @@ -177,8 +187,6 @@ rcons_vputc(dev, c) dev_t dev; int c; { - int s; - /* * Call the pointer-to-function that rcons_init tried to give us, * discarding the dev_t argument. @@ -192,12 +200,18 @@ rcons_vputc(dev, c) * device, and isn't on a sparc; this is a useful point to set up * the vnode, clean up pmax console initialization, and set * the initial tty size. + */ /* ARGSUSED */ +void rasterconsoleattach (n) int n; { register struct tty *tp = &rcons_tty [0]; + +#ifdef notyet int status; +#endif + /* Set up the tty queues now... */ clalloc(&tp->t_rawq, 1024, 1); @@ -229,13 +243,14 @@ rasterconsoleattach (n) } /* ARGSUSED */ +int rconsopen(dev, flag, mode, p) dev_t dev; int flag, mode; struct proc *p; { register struct tty *tp = &rcons_tty [0]; - static int firstopen = 1; + /*static int firstopen = 1;*/ int status; if ((tp->t_state & TS_ISOPEN) == 0) { @@ -258,13 +273,13 @@ rconsopen(dev, flag, mode, p) } /* ARGSUSED */ +int rconsclose(dev, flag, mode, p) dev_t dev; int flag, mode; struct proc *p; { register struct tty *tp = &rcons_tty [0]; - struct vnode *vp; (*linesw[tp->t_line].l_close)(tp, flag); ttyclose(tp); @@ -273,6 +288,7 @@ rconsclose(dev, flag, mode, p) } /* ARGSUSED */ +int rconsread(dev, uio, flag) dev_t dev; struct uio *uio; @@ -284,6 +300,7 @@ rconsread(dev, uio, flag) } /* ARGSUSED */ +int rconswrite(dev, uio, flag) dev_t dev; struct uio *uio; @@ -303,6 +320,7 @@ rconstty(dev) return (tp); } +int rconsioctl(dev, cmd, data, flag, p) dev_t dev; u_long cmd; @@ -322,13 +340,16 @@ rconsioctl(dev, cmd, data, flag, p) } /* ARGSUSED */ +int rconsstop (tp, rw) struct tty *tp; int rw; { + return (0); } /*ARGSUSED*/ +void rconsreset (tp, rw) struct tty *tp; int rw; @@ -336,6 +357,7 @@ rconsreset (tp, rw) } /*ARGSUSED*/ +int rconsselect(dev, which, p) dev_t dev; int which; @@ -345,11 +367,16 @@ rconsselect(dev, which, p) } /*ARGSUSED*/ -rconsmmap () +int +rconsmmap (dev, off, prot) + dev_t dev; + int off; + int prot; { return 0; } +void rconsstrategy(bp) struct buf *bp; { @@ -358,6 +385,7 @@ rconsstrategy(bp) /* Called by real input device when there is input for rcons. Passes input through line discpline interrupt routine... */ +void rcons_input (dev, ic) dev_t dev; int ic; diff --git a/sys/arch/pmax/dev/rz.c b/sys/arch/pmax/dev/rz.c index 3de5bea69da..d387755c60f 100644 --- a/sys/arch/pmax/dev/rz.c +++ b/sys/arch/pmax/dev/rz.c @@ -1,4 +1,4 @@ -/* $NetBSD: rz.c,v 1.13 1996/01/07 22:02:52 thorpej Exp $ */ +/* $NetBSD: rz.c,v 1.15.4.1 1996/06/16 17:20:48 mhitch Exp $ */ /* * Copyright (c) 1992, 1993 @@ -68,15 +68,21 @@ #include -extern int splbio(); -extern void splx(); -extern int physio(); +#include +#include + +int rzprobe __P((void /*register struct pmax_scsi_device*/ *sd)); +void rzstart __P((int unit)); +void rzdone __P((int unit, int error, int resid, int status)); +void rzgetinfo __P((dev_t dev)); +int rzsize __P((dev_t dev)); + -int rzprobe(); -void rzstrategy(), rzstart(), rzdone(); struct pmax_driver rzdriver = { - "rz", rzprobe, rzstart, rzdone, + "rz", rzprobe, + (void (*) __P((struct ScsiCmd *cmd))) rzstart, + rzdone, }; struct size { @@ -94,28 +100,29 @@ struct size { */ static struct size rzdefaultpart[MAXPARTITIONS] = { #ifdef GENERIC /* greedy machines have 64 meg of swap */ - 0, 32768, /* A */ - 32768, 131072, /* B */ - 0, 0, /* C */ - 17408, 0, /* D */ - 115712, 0, /* E */ - 218112, 0, /* F */ - 163840, 0, /* G */ - 115712, 0, /* H */ + { 0, 32768 }, /* A */ + { 32768, 131072 }, /* B */ + { 0, 0 }, /* C */ + { 17408, 0 }, /* D */ + { 115712, 0 }, /* E */ + { 218112, 0 }, /* F */ + { 163840, 0 }, /* G */ + { 115712, 0 } /* H */ #else - 0, 16384, /* A */ - 16384, 65536, /* B */ - 0, 0, /* C */ - 17408, 0, /* D */ - 115712, 0, /* E */ - 218112, 0, /* F */ - 81920, 0, /* G */ - 115712, 0, /* H */ + { 0, 16384 }, /* A */ + { 16384, 65536 }, /* B */ + { 0, 0 }, /* C */ + { 17408, 0 }, /* D */ + { 115712, 0 }, /* E */ + { 218112, 0 }, /* F */ + { 81920, 0 }, /* G */ + { 115712, 0 } /* H */ #endif }; -extern char *readdisklabel __P((dev_t dev, void (*strat)(), - struct disklabel *lp, struct cpu_disklabel *osdep)); +extern char * +readdisklabel __P((dev_t dev, void (*strat) __P((struct buf *bp)), + struct disklabel *lp, struct cpu_disklabel *osdep)); /* * Ultrix disklabel declarations @@ -124,7 +131,7 @@ extern char *readdisklabel __P((dev_t dev, void (*strat)(), #include "../../stand/dec_boot.h" extern char * -compat_label __P((dev_t dev, void (*strat)(), +compat_label __P((dev_t dev, void (*strat) __P((struct buf *bp)), struct disklabel *lp, struct cpu_disklabel *osdep)); #endif @@ -325,13 +332,17 @@ rzready(sc) * Test to see if device is present. * Return true if found and initialized ok. */ -rzprobe(sd) - register struct pmax_scsi_device *sd; +int +rzprobe(xxxsd) + void *xxxsd; { + register struct pmax_scsi_device *sd = xxxsd; register struct rz_softc *sc = &rz_softc[sd->sd_unit]; register int i; ScsiInquiryData inqbuf; - ScsiClass7Sense *sp; + + if (sd->sd_unit >= NRZ) + return (0); /* init some parameters that don't change */ sc->sc_sd = sd; @@ -373,7 +384,8 @@ rzprobe(sd) break; default: /* not a disk */ - printf("rz%d: unknown media code 0x%x\n", inqbuf.type); + printf("rz%d: unknown media code 0x%x\n", + sd->sd_unit, inqbuf.type); goto bad; } sc->sc_type = inqbuf.type; @@ -388,7 +400,7 @@ rzprobe(sd) printf("rz%d at %s%d drive %d slave %d", sd->sd_unit, sd->sd_cdriver->d_name, sd->sd_ctlr, sd->sd_drive, sd->sd_slave); - if (inqbuf.version > 1 || i < 36) + if (inqbuf.version < 1 || i < 36) printf(" type 0x%x, qual 0x%x, ver %d", inqbuf.type, inqbuf.qualifier, inqbuf.version); else { @@ -469,7 +481,7 @@ rzlblkstrat(bp, bsize) addr = bp->b_un.b_addr; #ifdef DEBUG if (rzdebug & RZB_PARTIAL) - printf("rzlblkstrat: bp %x flags %x bn %x resid %x addr %x\n", + printf("rzlblkstrat: bp %p flags %lx bn %x resid %x addr %p\n", bp, bp->b_flags, bn, resid, addr); #endif @@ -486,7 +498,7 @@ rzlblkstrat(bp, bsize) cbp->b_bcount = bsize; #ifdef DEBUG if (rzdebug & RZB_PARTIAL) - printf(" readahead: bn %x cnt %x off %x addr %x\n", + printf(" readahead: bn %x cnt %x off %x addr %p\n", cbp->b_blkno, count, boff, addr); #endif rzstrategy(cbp); @@ -503,7 +515,7 @@ rzlblkstrat(bp, bsize) bcopy(addr, &cbuf[boff], count); #ifdef DEBUG if (rzdebug & RZB_PARTIAL) - printf(" writeback: bn %x cnt %x off %x addr %x\n", + printf(" writeback: bn %x cnt %x off %x addr %p\n", cbp->b_blkno, count, boff, addr); #endif } else { @@ -513,7 +525,7 @@ rzlblkstrat(bp, bsize) cbp->b_bcount = count; #ifdef DEBUG if (rzdebug & RZB_PARTIAL) - printf(" fulltrans: bn %x cnt %x addr %x\n", + printf(" fulltrans: bn %x cnt %x addr %p\n", cbp->b_blkno, count, addr); #endif } @@ -531,7 +543,7 @@ done: addr += count; #ifdef DEBUG if (rzdebug & RZB_PARTIAL) - printf(" done: bn %x resid %x addr %x\n", + printf(" done: bn %x resid %x addr %p\n", bn, resid, addr); #endif } @@ -647,7 +659,7 @@ rzstart(unit) sc->sc_rwcmd.lowBlockCount = n; #ifdef DEBUG if ((bp->b_bcount & (sc->sc_blksize - 1)) != 0) - printf("rz%d: partial block xfer -- %x bytes\n", + printf("rz%d: partial block xfer -- %lx bytes\n", unit, bp->b_bcount); #endif sc->sc_stats.rztransfers++; @@ -693,7 +705,7 @@ rzdone(unit, error, resid, status) if (sd->sd_dk >= 0) dk_busy &= ~(1 << sd->sd_dk); - disk_unbusy(&sc->sc_dkdev, (bp->b_bcount - bp->b_resid)); + disk_unbusy(&sc->sc_dkdev, (bp->b_bcount - resid)); if (sc->sc_flags & RZF_SENSEINPROGRESS) { sc->sc_flags &= ~RZF_SENSEINPROGRESS; @@ -932,9 +944,11 @@ rzopen(dev, flags, mode, p) return (0); } -rzclose(dev, flags, mode) +int +rzclose(dev, flags, mode, p) dev_t dev; int flags, mode; + struct proc *p; { register struct rz_softc *sc = &rz_softc[rzunit(dev)]; int mask = (1 << rzpart(dev)); @@ -965,9 +979,10 @@ rzclose(dev, flags, mode) } int -rzread(dev, uio) +rzread(dev, uio, ioflag) dev_t dev; struct uio *uio; + int ioflag; { register struct rz_softc *sc = &rz_softc[rzunit(dev)]; @@ -982,9 +997,10 @@ rzread(dev, uio) } int -rzwrite(dev, uio) +rzwrite(dev, uio, ioflag) dev_t dev; struct uio *uio; + int ioflag; { register struct rz_softc *sc = &rz_softc[rzunit(dev)]; @@ -998,7 +1014,7 @@ rzwrite(dev, uio) int rzioctl(dev, cmd, data, flag, p) dev_t dev; - int cmd; + u_long cmd; caddr_t data; int flag; struct proc *p; @@ -1129,20 +1145,27 @@ rzsize(dev) /* * Non-interrupt driven, non-dma dump routine. + * XXX + * Still an old-style dump function: arguments after "dev" are ignored. */ int -rzdump(dev) +rzdump(dev, blkno, va, size) dev_t dev; + daddr_t blkno; + caddr_t va; + size_t size; { int part = rzpart(dev); int unit = rzunit(dev); register struct rz_softc *sc = &rz_softc[unit]; - register struct pmax_scsi_device *sd = sc->sc_sd; register daddr_t baddr; register int maddr; register int pages, i; - int stat; extern int lowram; +#ifdef later + register struct pmax_scsi_device *sd = sc->sc_sd; + int stat; +#endif /* * Hmm... all vax drivers dump maxfree pages which is physmem minus diff --git a/sys/arch/pmax/dev/sccvar.h b/sys/arch/pmax/dev/sccvar.h deleted file mode 100644 index aa643752228..00000000000 --- a/sys/arch/pmax/dev/sccvar.h +++ /dev/null @@ -1,9 +0,0 @@ -/* $NetBSD: sccvar.h,v 1.1 1995/08/04 00:22:02 jonathan Exp $ */ - -/* - * external declarations from DECstation scc driver - */ - -extern int sccGetc __P ((dev_t dev)); -extern int sccparam __P((register struct tty *tp, register struct termios *t)); -extern void sccPutc __P ((dev_t dev, int c)); diff --git a/sys/arch/pmax/dev/scsi.c b/sys/arch/pmax/dev/scsi.c index a5f0f310463..ceab29a1625 100644 --- a/sys/arch/pmax/dev/scsi.c +++ b/sys/arch/pmax/dev/scsi.c @@ -1,4 +1,4 @@ -/* $NetBSD: scsi.c,v 1.4 1994/10/26 21:09:18 cgd Exp $ */ +/* $NetBSD: scsi.c,v 1.5 1996/04/07 22:53:55 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -43,6 +43,7 @@ */ #include +#include #include #include @@ -120,6 +121,7 @@ static char **scsiErrors[] = { /* * Decode the sense data and print a suitable message. */ +void scsiPrintSense(sp, len) register ScsiClass7Sense *sp; int len; @@ -202,3 +204,36 @@ scsiGroup1Cmd(cmd, lun, block, count, c) c->lowBlockCount = count; c->control = 0; } + +/* + * Print a SCSI identify resutl + */ +void +scsiPrintInquiry(inqbuf, i) + ScsiInquiryData *inqbuf; + int i; +{ + if (inqbuf->version > 1 || i < 36) + printf(" type 0x%x, qual 0x%x, ver %d", + inqbuf->type, inqbuf->qualifier, inqbuf->version); + else { + char vid[9], pid[17], revl[5]; + + bcopy((caddr_t)inqbuf->vendorID, (caddr_t)vid, 8); + bcopy((caddr_t)inqbuf->productID, (caddr_t)pid, 16); + bcopy((caddr_t)inqbuf->revLevel, (caddr_t)revl, 4); + for (i = 8; --i > 0; ) + if (vid[i] != ' ') + break; + vid[i+1] = 0; + for (i = 16; --i > 0; ) + if (pid[i] != ' ') + break; + pid[i+1] = 0; + for (i = 4; --i > 0; ) + if (revl[i] != ' ') + break; + revl[i+1] = 0; + printf(" %s %s rev %s", vid, pid, revl); + } +} \ No newline at end of file diff --git a/sys/arch/pmax/dev/scsi.h b/sys/arch/pmax/dev/scsi.h index 0a0ebd15750..1043a745bc6 100644 --- a/sys/arch/pmax/dev/scsi.h +++ b/sys/arch/pmax/dev/scsi.h @@ -1,4 +1,4 @@ -/* $NetBSD: scsi.h,v 1.5 1995/03/28 18:19:00 jtc Exp $ */ +/* $NetBSD: scsi.h,v 1.7 1996/04/07 22:53:54 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -380,6 +380,7 @@ typedef struct ScsiInquiryData { u_char revLevel[4]; /* Revision level (ASCII) */ u_char revData[8]; /* Revision data (ASCII) */ #endif + u_char pading[1024]; /* newer SCSI II drives give additional data */ } ScsiInquiryData; /* @@ -551,8 +552,20 @@ struct scsi_fmt_sense { /* * Routines. */ -extern void scsiGroup0Cmd(); -extern void scsiGroup1Cmd(); +extern void scsiGroup0Cmd __P((unsigned cmd, /* group0 SCSI command */ + unsigned lun, /* Logical Unit Number */ + register unsigned block, + unsigned count, + register ScsiGroup0Cmd *c)); + +extern void scsiGroup1Cmd __P((unsigned cmd, /* group0 SCSI command */ + unsigned lun, /* Logical Unit Number */ + register unsigned block, + unsigned count, + register ScsiGroup1Cmd *c)); + +extern void scsiPrintSense __P((register ScsiClass7Sense *sp, int len)); +extern void scsiPrintInquiry __P((ScsiInquiryData *inqbuf, int len)); #endif /* _KERNEL */ #endif /* _SCSI_H */ diff --git a/sys/arch/pmax/dev/sfb.c b/sys/arch/pmax/dev/sfb.c index 31d1769acd7..1e744970f3d 100644 --- a/sys/arch/pmax/dev/sfb.c +++ b/sys/arch/pmax/dev/sfb.c @@ -1,4 +1,4 @@ -/* $NetBSD: sfb.c,v 1.4 1995/09/12 07:30:45 jonathan Exp $ */ +/* $NetBSD: sfb.c,v 1.11.4.3 1996/09/09 20:47:40 thorpej Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -36,7 +36,6 @@ * SUCH DAMAGE. * * from: @(#)sfb.c 8.1 (Berkeley) 6/10/93 - * $Id: sfb.c,v 1.1.1.1 1995/10/18 08:51:28 deraadt Exp $ */ /* @@ -81,16 +80,19 @@ * rights to redistribute these changes. */ -#include -#include +#include "fb.h" +#include "sfb.h" #include +#include /* printf() */ #include #include #include #include +#include #include +#include #include #include @@ -117,16 +119,21 @@ extern int pmax_boardtype; * Forward references. */ -int sfbinit (char *, int, int); +int sfbinit __P((struct fbinfo *fi, caddr_t sfbaddr, int unit, int silent)); #define CMAP_BITS (3 * 256) /* 256 entries, 3 bytes per. */ -static u_char cmap_bits [NSFB * CMAP_BITS]; /* One colormap per sfb... */ +static u_char cmap_bits [CMAP_BITS]; /* colormap for console... */ int sfbmatch __P((struct device *, void *, void *)); void sfbattach __P((struct device *, struct device *, void *)); +int sfb_intr __P((void *sc)); -struct cfdriver sfbcd = { - NULL, "sfb", sfbmatch, sfbattach, DV_DULL, sizeof(struct device), 0 +struct cfattach sfb_ca = { + sizeof(struct device), sfbmatch, sfbattach +}; + +struct cfdriver sfb_cd = { + NULL, "sfb", DV_DULL }; struct fbdriver sfb_driver = { @@ -149,28 +156,27 @@ sfbmatch(parent, match, aux) void *match; void *aux; { - struct cfdata *cf = match; - struct confargs *ca = aux; - static int nsfbs = 1; - caddr_t sfbaddr = BUS_CVTADDR(ca); + /*struct cfdata *cf = match;*/ + struct tc_attach_args *ta = aux; /* make sure that we're looking for this type of device. */ - /*if (!sfbprobe(sfbaddr)) return 0;*/ - if (!BUS_MATCHNAME(ca, "PMAGB-BA")) + if (!TC_BUS_MATCHNAME(ta, "PMAGB-BA")) return (0); - -#ifdef notyet - /* if it can't have the one mentioned, reject it */ - if (cf->cf_unit >= nsfbs) + /* + * if the TC rom ident matches, assume the VRAM is present too. + */ +#if 0 + if (badaddr( ((caddr_t)ta->ta_addr) + SFB_OFFSET_VRAM, 4)) return (0); #endif + return (1); } /* * Attach a device. Hand off all the work to sfbinit(), - * so console-config cod can attach sfbs early in boot. + * so console-config code can attach sfbs early in boot. */ void sfbattach(parent, self, aux) @@ -178,51 +184,70 @@ sfbattach(parent, self, aux) struct device *self; void *aux; { - struct confargs *ca = aux; - caddr_t base = BUS_CVTADDR(ca); + struct tc_attach_args *ta = aux; + caddr_t sfbaddr = (caddr_t)ta->ta_addr; int unit = self->dv_unit; + struct fbinfo *fi = (struct fbinfo *) self; #ifdef notyet /* if this is the console, it's already configured. */ - if (ca->ca_slotpri == cons_slot) + if (ta->ta_cookie == cons_slot) return; /* XXX patch up f softc pointer */ #endif - if (!sfbinit(base, unit, 0)) + if (!sfbinit(fi, sfbaddr, unit, 0)) return; #if 0 /*XXX*/ - *(base + SFB_INTERRUPT_ENABLE) = 0; -#endif -} + /* + * Sean Davidson (davidson@sean.zk3.dec.com) reports this + * isn't sufficient on a 3MIN, Use an interrupt handler instead. + */ -/* - * Test to see if device is present. - * Return true if found and initialized ok. - */ -/*ARGSUSED*/ -sfbprobe(cp) - struct pmax_ctlr *cp; -{ + *(sfbaddr + SFB_INTERRUPT_ENABLE) = 0; + +#endif + /* + * By default, the SFB requests an interrupt during every vertical-retrace period. + * We never enable interrupts from SFB cards, except on the + * 3MIN, where TC options interrupt at spl0 through spl2, and + * disabling of TC option interrupts doesn't work. + */ + if (pmax_boardtype == DS_3MIN) { + tc_intr_establish(parent, (void*)ta->ta_cookie, TC_IPL_NONE, + sfb_intr, fi); + } + printf("\n"); } + /* * Initialization */ int -sfbinit(base, unit, silent) +sfbinit(fi, base, unit, silent) + struct fbinfo *fi; char *base; int unit; int silent; { - struct fbinfo *fi; - u_char foo; - - fi = &sfbfi; /* XXX use softc */ - if (unit > NSFB) - return (0); + /* + * If this device is being intialized as the console, malloc() + * is not yet up and we must use statically-allocated space. + */ + if (fi == NULL) { + fi = &sfbfi; /* XXX */ + fi->fi_cmap_bits = (caddr_t)cmap_bits; + } + else { + fi->fi_cmap_bits = malloc(CMAP_BITS, M_DEVBUF, M_NOWAIT); + if (fi->fi_cmap_bits == NULL) { + printf("sfb%d: no memory for cmap\n", unit); + return (0); + } + } /* check for no frame buffer */ if (badaddr(base + SFB_OFFSET_VRAM, 4)) @@ -238,7 +263,6 @@ sfbinit(base, unit, silent) fi->fi_linebytes = 1280; fi->fi_driver = &sfb_driver; fi->fi_blanked = 0; - fi->fi_cmap_bits = (caddr_t)&cmap_bits [CMAP_BITS * unit]; /* Fill in Frame Buffer Type struct. */ fi->fi_type.fb_boardtype = PMAX_FBTYPE_SFB; @@ -298,4 +322,30 @@ sfbinit(base, unit, silent) return (1); } + +/* + * The TURBOChannel sfb interrupts by default on every vertical retrace, + * and we don't know to disable those interrupt requests. + * The 4.4BSD/pamx kernel never enabled delivery of those interrupts from the TC bus, + * but there's a kernel design bug on the 3MIN, where disabling + * (or enabling) TC option interrupts has no effect; each slot interrupt is + * mapped directly to a separate R3000 interrupt and they always seem to be taken. + * + * This function simply dismisses SFB interrupts, or the interrupt + * request from the card will still be active. + */ +int +sfb_intr(sc) + void *sc; +{ + struct fbinfo *fi = /* XXX (struct fbinfo *)sc */ &sfbfi; + + char *slot_addr = (((char *)fi->fi_base) - SFB_ASIC_OFFSET); + + /* reset vertical-retrace interrupt by writing a dont-care */ + *(int*) (slot_addr + SFB_CLEAR) = 0; + + return (0); +} + /* old bt459 code used to be here */ diff --git a/sys/arch/pmax/dev/sfbreg.h b/sys/arch/pmax/dev/sfbreg.h index d9ea5352acb..3e760dab0ca 100644 --- a/sys/arch/pmax/dev/sfbreg.h +++ b/sys/arch/pmax/dev/sfbreg.h @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)sfb.c 8.1 (Berkeley) 6/10/93 - * $Id: sfbreg.h,v 1.1.1.1 1995/10/18 08:51:28 deraadt Exp $ + * $Id: sfbreg.h,v 1.2 1996/09/15 21:12:35 deraadt Exp $ */ #define SFB_OFFSET_VRAM 0x201000 /* from module's base */ diff --git a/sys/arch/pmax/dev/sii.c b/sys/arch/pmax/dev/sii.c index 4cd2086dd7b..e0d310d8f1a 100644 --- a/sys/arch/pmax/dev/sii.c +++ b/sys/arch/pmax/dev/sii.c @@ -1,4 +1,4 @@ -/* $NetBSD: sii.c,v 1.8 1995/09/13 19:35:58 jonathan Exp $ */ +/* $NetBSD: sii.c,v 1.12.4.2 1996/09/09 20:24:36 thorpej Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -118,9 +118,14 @@ int sii_doprobe __P((void *addr, int unit, int flags, int pri, struct device *self)); int siiintr __P((void *sc)); -extern struct cfdriver siicd; -struct cfdriver siicd = { - NULL, "sii", siimatch, siiattach, DV_DULL, sizeof(struct siisoftc) +extern struct cfdriver sii_cd; + +struct cfattach sii_ca = { + sizeof(struct siisoftc), siimatch, siiattach +}; + +struct cfdriver sii_cd = { + NULL, "sii", DV_DULL }; #ifdef USE_NEW_SCSI @@ -145,13 +150,15 @@ struct scsi_device sii_dev = { #endif /* - * Definition of the controller for the old auto-configuration program. + * Definition of the controller for the old auto-configuration program + * and old-style pmax scsi drivers. */ void siistart(); struct pmax_driver siidriver = { "sii", NULL, siistart, 0, }; + /* * MACROS for timing out spin loops. * @@ -208,14 +215,29 @@ u_char sii_buf[256]; /* used for extended messages */ #define SII_BUF_ADDR (MACH_PHYS_TO_UNCACHED(KN01_SYS_SII_B_START) \ + SII_MAX_DMA_XFER_LENGTH * 14) -static void sii_Reset(); -static void sii_StartCmd(); -static void sii_CmdDone(); -static void sii_DoIntr(); -static void sii_StateChg(); -static void sii_DoSync(); -static void sii_StartDMA(); -static int sii_GetByte(); + +/* + * Other forward references + */ + +static void sii_Reset __P((register struct siisoftc *sc, int resetbus)); +static void sii_StartCmd __P((register struct siisoftc *sc, int target)); +static void sii_CmdDone __P((register struct siisoftc *sc, int target, + int error)); +static void sii_DoIntr __P((register struct siisoftc *sc, u_int dstat)); +static void sii_StateChg __P((register struct siisoftc *sc, u_int cstat)); +static int sii_GetByte __P((register SIIRegs *regs, int phase, int ack)); +static void sii_DoSync __P((register SIIRegs *regs, register State *state)); +static void sii_StartDMA __P((register SIIRegs *regs, int phase, + u_short *dmaAddr, int size)); + +void siistart __P((register ScsiCmd *scsicmd)); +void sii_DumpLog __P((void)); + +void CopyToBuffer __P((u_short *src, /* NOTE: must be short aligned */ + volatile u_short *dst, int length)); +void CopyFromBuffer __P((volatile u_short *src, char *dst, int length)); + /* @@ -227,14 +249,20 @@ siimatch(parent, match, aux) void *match; void *aux; { - struct cfdata *cf = match; struct confargs *ca = aux; - if (!BUS_MATCHNAME(ca, "sii") && !BUS_MATCHNAME(ca, "PMAZ-AA ")) + if (strcmp(ca->ca_name, "sii") != 0 && + strncmp(ca->ca_name, "PMAZ-AA ", 8) != 0) /*XXX*/ return (0); /* XXX check for bad address */ - /* XXX kn01s have exactly one SII. Does any other machine use them? */ + /* + * XXX KN01s (3100/2100) have exactly one SII. + * the Decsystem 5100 apparently uses them also, but as yet we + * don't know at what address. + * + * XXX PVAXES apparently use the SII also. + */ return (1); } @@ -249,7 +277,7 @@ siiattach(parent, self, aux) register void *siiaddr; register int i; - siiaddr = (void*)MACH_PHYS_TO_UNCACHED(BUS_CVTADDR(ca)); + siiaddr = (void*)MACH_PHYS_TO_UNCACHED(ca->ca_addr); sc->sc_regs = (SIIRegs *)siiaddr; sc->sc_flags = sc->sc_dev.dv_cfdata->cf_flags; @@ -288,7 +316,7 @@ siistart(scsicmd) register ScsiCmd *scsicmd; /* command to start */ { register struct pmax_scsi_device *sdp = scsicmd->sd; - register struct siisoftc *sc = siicd.cd_devs[sdp->sd_ctlr]; + register struct siisoftc *sc = sii_cd.cd_devs[sdp->sd_ctlr]; int s; s = splbio(); @@ -324,8 +352,12 @@ siiintr(xxxsc) * Find which controller caused the interrupt. */ dstat = sc->sc_regs->dstat; - if (dstat & (SII_CI | SII_DI)) + if (dstat & (SII_CI | SII_DI)) { sii_DoIntr(sc, dstat); + return (0); /* XXX */ + } + + return (1); /* XXX spurious interrupt? */ } /* @@ -371,7 +403,7 @@ sii_Reset(sc, reset) * Delay 250 ms before doing any commands. */ regs->comm = SII_DO_RST; - MachEmptyWriteBuffer(); + wbflush(); DELAY(250000); /* rearbitrate synchronous offset */ @@ -389,7 +421,7 @@ sii_Reset(sc, reset) * Reselect Enable, and Interrupt Enable. */ regs->csr = SII_HPM | SII_RSE | SII_PCE | SII_IE; - MachEmptyWriteBuffer(); + wbflush(); } /* @@ -436,7 +468,7 @@ sii_StartCmd(sc, target) #ifdef DEBUG if (sii_debug > 1) { - printf("sii_StartCmd: %s target %d cmd 0x%x addr %x size %d dma %d\n", + printf("sii_StartCmd: %s target %d cmd 0x%x addr %p size %d dma %d\n", scsicmd->sd->sd_driver->d_name, target, scsicmd->cmd[0], scsicmd->buf, scsicmd->buflen, state->dmaDataPhase); @@ -504,7 +536,7 @@ sii_StartCmd(sc, target) regs->comm = SII_INXFER | SII_SELECT | SII_ATN | SII_CON | SII_MSG_OUT_PHASE; } - MachEmptyWriteBuffer(); + wbflush(); /* * Wait for something to happen @@ -517,7 +549,7 @@ sii_StartCmd(sc, target) if ((status & (SII_RST | SII_SCH | SII_STATE_MSK)) == (SII_SCH | SII_CON)) { regs->cstat = status; - MachEmptyWriteBuffer(); + wbflush(); #ifdef DEBUG sii_logp->target = target; @@ -586,7 +618,7 @@ sii_StartCmd(sc, target) if (status & SII_SIP) { error = ENXIO; /* device didn't respond */ regs->comm = SII_DISCON; - MachEmptyWriteBuffer(); + wbflush(); SII_WAIT_UNTIL(status, regs->cstat, !(status & (SII_CON | SII_SIP)), SII_WAIT_COUNT, retval); @@ -601,7 +633,7 @@ sii_StartCmd(sc, target) regs->cstat = 0xffff; regs->dstat = 0xffff; regs->comm = 0; - MachEmptyWriteBuffer(); + wbflush(); sii_CmdDone(sc, target, error); } @@ -643,7 +675,7 @@ again: #endif regs->dstat = dstat; /* acknowledge everything */ - MachEmptyWriteBuffer(); + wbflush(); if (dstat & SII_CI) { /* deglitch cstat register */ @@ -651,7 +683,7 @@ again: while (msg != (cstat = regs->cstat)) msg = cstat; regs->cstat = cstat; /* acknowledge everything */ - MachEmptyWriteBuffer(); + wbflush(); #ifdef DEBUG if (sii_logp > sii_log) sii_logp[-1].cstat = cstat; @@ -760,7 +792,7 @@ again: sii_StartDMA(regs, state->dmaCurPhase = SII_DATA_IN_PHASE, state->dmaAddr[state->dmaBufIndex], - state->dmalen = len); + state->dmaCnt = state->dmalen = len); dstat &= ~(SII_IBF | SII_TBE); } /* copy in the data */ @@ -782,7 +814,7 @@ again: sii_StartDMA(regs, state->dmaCurPhase = SII_DATA_OUT_PHASE, state->dmaAddr[state->dmaBufIndex], - state->dmalen = + state->dmaCnt = state->dmalen = SII_MAX_DMA_XFER_LENGTH); /* prepare for next chunk */ i -= SII_MAX_DMA_XFER_LENGTH; @@ -796,7 +828,7 @@ again: sii_StartDMA(regs, state->dmaCurPhase = SII_DATA_OUT_PHASE, state->dmaAddr[state->dmaBufIndex], - state->dmalen = i); + state->dmaCnt = state->dmalen = i); } dstat &= ~(SII_IBF | SII_TBE); } @@ -846,7 +878,7 @@ again: regs->dmabyte = state->dmaByte; regs->comm = SII_DMA | SII_INXFER | (comm & SII_STATE_MSK) | SII_CMD_PHASE; - MachEmptyWriteBuffer(); + wbflush(); #ifdef DEBUG if (sii_debug > 4) printf("Cmd dcnt %d dadr %x ", @@ -867,7 +899,7 @@ again: i); sii_StartDMA(regs, state->dmaCurPhase = SII_CMD_PHASE, state->dmaAddr[0], - state->dmalen = i); + state->dmaCnt = state->dmalen = i); } /* wait a short time for XFER complete */ SII_WAIT_UNTIL(dstat, regs->dstat, @@ -914,7 +946,7 @@ again: regs->comm = SII_DMA | SII_INXFER | (comm & SII_STATE_MSK) | state->dmaCurPhase; - MachEmptyWriteBuffer(); + wbflush(); #ifdef DEBUG if (sii_debug > 4) printf("Data %d dcnt %d dadr %x ", @@ -950,7 +982,7 @@ again: sii_StartDMA(regs, state->dmaCurPhase = SII_DATA_IN_PHASE, state->dmaAddr[state->dmaBufIndex], - state->dmalen = i); + state->dmaCnt = state->dmalen = i); break; } /* start first chunk */ @@ -963,7 +995,7 @@ again: sii_StartDMA(regs, state->dmaCurPhase = SII_DATA_OUT_PHASE, state->dmaAddr[state->dmaBufIndex], - state->dmalen = i); + state->dmaCnt = state->dmalen = i); i = state->buflen - SII_MAX_DMA_XFER_LENGTH; if (i > 0) { /* prepare for next chunk */ @@ -996,9 +1028,9 @@ again: regs->dmlotc = 0; regs->comm = comm & (SII_STATE_MSK | SII_PHASE_MSK); - MachEmptyWriteBuffer(); + wbflush(); regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); #ifdef DEBUG if (sii_debug > 4) printf("DMA amt %d ", i); @@ -1056,20 +1088,22 @@ again: /* save dma registers */ state->dmaPrevPhase = state->dmaCurPhase; state->dmaCurPhase = -1; - state->dmaCnt = i = regs->dmlotc; if (dstat & SII_OBB) state->dmaByte = regs->dmabyte; - if (i == 0) - i = SII_MAX_DMA_XFER_LENGTH; - i = state->dmalen - i; + i = regs->dmlotc; + if (i != 0) + i = state->dmaCnt - i; /* note: no carry from dmaddrl to dmaddrh */ state->dmaAddrL = regs->dmaddrl + i; state->dmaAddrH = regs->dmaddrh; + state->dmaCnt = regs->dmlotc; + if (state->dmaCnt == 0) + state->dmaCnt = SII_MAX_DMA_XFER_LENGTH; regs->comm = comm & (SII_STATE_MSK | SII_PHASE_MSK); - MachEmptyWriteBuffer(); + wbflush(); regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); #ifdef DEBUG if (sii_debug > 4) { printf("SavP dcnt %d dadr %x ", @@ -1114,7 +1148,7 @@ again: SII_WAIT_UNTIL(dstat, regs->dstat, dstat & SII_DNE, SII_WAIT_COUNT, i); regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); msg = sc->sc_target; sc->sc_target = -1; /* @@ -1129,7 +1163,7 @@ again: SII_STATE_MSK)) == SII_SCH) { regs->cstat = SII_SCH | SII_BER; regs->comm = 0; - MachEmptyWriteBuffer(); + wbflush(); /* * Double check that we didn't miss a * state change between seeing it and @@ -1155,7 +1189,7 @@ again: SII_WAIT_UNTIL(dstat, regs->dstat, dstat & SII_DNE, SII_WAIT_COUNT, i); regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); /* read the message length */ msg = sii_GetByte(regs, SII_MSG_IN_PHASE, 1); if (msg < 0) { @@ -1190,7 +1224,7 @@ again: dstat & SII_DNE, SII_WAIT_COUNT, i); regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); i = (sii_buf[3] << 24) | (sii_buf[4] << 16) | (sii_buf[5] << 8) | @@ -1213,7 +1247,7 @@ again: dstat & SII_DNE, SII_WAIT_COUNT, i); regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); sii_DoSync(regs, state); break; @@ -1230,7 +1264,7 @@ again: dstat & SII_DNE, SII_WAIT_COUNT, i); regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); /* wait for MSG_OUT phase */ SII_WAIT_UNTIL(dstat, regs->dstat, @@ -1246,7 +1280,7 @@ again: dstat & SII_DNE, SII_WAIT_COUNT, i); regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); } break; @@ -1258,7 +1292,7 @@ again: SII_WAIT_UNTIL(dstat, regs->dstat, dstat & SII_DNE, SII_WAIT_COUNT, i); regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); /* wait a short time for another msg */ SII_WAIT_UNTIL(dstat, regs->dstat, dstat & (SII_CI | SII_DI), @@ -1279,7 +1313,7 @@ again: SII_WAIT_UNTIL(dstat, regs->dstat, dstat & SII_DNE, SII_WAIT_COUNT, i); regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); state->prevComm = comm; #ifdef DEBUG if (sii_debug > 4) @@ -1304,7 +1338,7 @@ again: } regs->cstat = SII_SCH | SII_BER; regs->comm = 0; - MachEmptyWriteBuffer(); + wbflush(); sc->sc_target = -1; /* * Double check that we didn't miss a state @@ -1324,7 +1358,7 @@ again: SII_WAIT_UNTIL(dstat, regs->dstat, dstat & SII_DNE, SII_WAIT_COUNT, i); regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); printf("%s: device %d: message reject.\n", sc->sc_dev.dv_xname, sc->sc_target); break; @@ -1345,7 +1379,7 @@ again: SII_WAIT_UNTIL(dstat, regs->dstat, dstat & SII_DNE, SII_WAIT_COUNT, i); regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); /* may want to check LUN some day */ /* wait a short time for another msg */ SII_WAIT_UNTIL(dstat, regs->dstat, @@ -1380,7 +1414,7 @@ again: regs->data = SCSI_NO_OP; regs->comm = SII_INXFER | (comm & SII_STATE_MSK) | SII_MSG_OUT_PHASE; - MachEmptyWriteBuffer(); + wbflush(); /* wait a short time for XFER complete */ SII_WAIT_UNTIL(dstat, regs->dstat, dstat & SII_DNE, @@ -1392,7 +1426,7 @@ again: /* just clear the DNE bit and check errors later */ if (dstat & SII_DNE) { regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); } break; @@ -1442,7 +1476,7 @@ abort: regs->data = SCSI_ABORT; regs->comm = SII_INXFER | SII_ATN | (cstat & SII_STATE_MSK) | SII_MSG_OUT_PHASE; - MachEmptyWriteBuffer(); + wbflush(); SII_WAIT_UNTIL(dstat, regs->dstat, (dstat & (SII_DNE | SII_PHASE_MSK)) == (SII_DNE | SII_MSG_OUT_PHASE), @@ -1451,11 +1485,11 @@ abort: if (sii_debug > 0) printf("Abort: cs %x ds %x i %d\n", cstat, dstat, i); #endif - if (dstat & (SII_DNE | SII_PHASE_MSK) == + if ((dstat & (SII_DNE | SII_PHASE_MSK)) == (SII_DNE | SII_MSG_OUT_PHASE)) { /* disconnect if command in progress */ regs->comm = SII_DISCON; - MachEmptyWriteBuffer(); + wbflush(); SII_WAIT_UNTIL(cstat, regs->cstat, !(cstat & SII_CON), SII_WAIT_COUNT, i); } @@ -1468,7 +1502,7 @@ abort: regs->cstat = 0xffff; regs->dstat = 0xffff; regs->comm = 0; - MachEmptyWriteBuffer(); + wbflush(); i = sc->sc_target; sc->sc_target = -1; @@ -1544,7 +1578,7 @@ sii_StateChg(sc, cstat) state = &sc->sc_st[i]; regs->comm = SII_CON | SII_DST | SII_MSG_IN_PHASE; regs->dmctrl = state->dmaReqAck; - MachEmptyWriteBuffer(); + wbflush(); if (!state->prevComm) { printf("%s: device %d: spurious reselection\n", sc->sc_dev.dv_xname, i); @@ -1564,7 +1598,7 @@ sii_StateChg(sc, cstat) printf("%s: Selected by device %d as target!!\n", sc->sc_dev.dv_xname, regs->destat); regs->comm = SII_DISCON; - MachEmptyWriteBuffer(); + wbflush(); SII_WAIT_UNTIL(!(regs->cstat & SII_CON), SII_WAIT_COUNT, i); regs->cstat = 0xffff; @@ -1600,7 +1634,7 @@ sii_GetByte(regs, phase, ack) state = regs->cstat & SII_STATE_MSK; if (!(dstat & SII_IBF) || (dstat & SII_MIS)) { regs->comm = state | phase; - MachEmptyWriteBuffer(); + wbflush(); /* wait a short time for IBF */ SII_WAIT_UNTIL(dstat, regs->dstat, dstat & SII_IBF, SII_WAIT_COUNT, i); @@ -1631,7 +1665,7 @@ sii_GetByte(regs, phase, ack) if (ack) { regs->comm = SII_INXFER | state | phase; - MachEmptyWriteBuffer(); + wbflush(); /* wait a short time for XFER complete */ SII_WAIT_UNTIL(dstat, regs->dstat, dstat & SII_DNE, @@ -1640,7 +1674,7 @@ sii_GetByte(regs, phase, ack) /* clear the DNE */ if (dstat & SII_DNE) { regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); } } @@ -1698,7 +1732,7 @@ sii_DoSync(regs, state) regs->data = sii_buf[j]; regs->comm = comm; - MachEmptyWriteBuffer(); + wbflush(); /* wait a short time for XFER complete */ SII_WAIT_UNTIL(dstat, regs->dstat, dstat & SII_DNE, @@ -1712,7 +1746,7 @@ sii_DoSync(regs, state) /* clear the DNE, other errors handled later */ regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); } #else CopyToBuffer((u_short *)sii_buf, (volatile u_short *)SII_BUF_ADDR, 5); @@ -1726,7 +1760,7 @@ sii_DoSync(regs, state) regs->dmlotc = 5; regs->comm = SII_DMA | SII_INXFER | SII_ATN | (regs->cstat & SII_STATE_MSK) | SII_MSG_OUT_PHASE; - MachEmptyWriteBuffer(); + wbflush(); /* wait a short time for XFER complete */ SII_WAIT_UNTIL(dstat, regs->dstat, @@ -1741,7 +1775,7 @@ sii_DoSync(regs, state) } /* clear the DNE, other errors handled later */ regs->dstat = SII_DNE; - MachEmptyWriteBuffer(); + wbflush(); #endif #if 0 @@ -1778,7 +1812,7 @@ sii_StartDMA(regs, phase, dmaAddr, size) regs->dmlotc = size; regs->comm = SII_DMA | SII_INXFER | (regs->cstat & SII_STATE_MSK) | phase; - MachEmptyWriteBuffer(); + wbflush(); #ifdef DEBUG if (sii_debug > 5) { @@ -1831,6 +1865,7 @@ sii_CmdDone(sc, target, error) } #ifdef DEBUG +void sii_DumpLog() { register struct sii_log *lp; diff --git a/sys/arch/pmax/dev/tz.c b/sys/arch/pmax/dev/tz.c index b556191ad11..a8b99d367ea 100644 --- a/sys/arch/pmax/dev/tz.c +++ b/sys/arch/pmax/dev/tz.c @@ -1,4 +1,4 @@ -/* $NetBSD: tz.c,v 1.8 1995/09/18 03:04:55 jonathan Exp $ */ +/* $NetBSD: tz.c,v 1.10 1996/04/10 16:33:44 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -54,17 +54,26 @@ #include #include #include +#include #include #include +#include +#include + #include #include -int tzprobe(); -void tzstart(), tzdone(); +int tzprobe __P(( void *sd /*struct pmax_scsi_device *sd*/)); +int tzcommand __P((dev_t dev, int command, int code, + int count, caddr_t data)); +void tzstart __P((int unit)); +void tzdone __P((int unit, int error, int resid, int status)); struct pmax_driver tzdriver = { - "tz", tzprobe, tzstart, tzdone, + "tz", tzprobe, + (void (*) __P((struct ScsiCmd *cmd))) tzstart, + tzdone, }; struct tz_softc { @@ -105,19 +114,21 @@ struct tz_softc { int tzdebug = 0; #endif -void tzstrategy __P((register struct buf *bp)); /* * Test to see if device is present. * Return true if found and initialized ok. */ -tzprobe(sd) - struct pmax_scsi_device *sd; +int +tzprobe(xxxsd) + void *xxxsd; { + + register struct pmax_scsi_device *sd = xxxsd; + register struct tz_softc *sc = &tz_softc[sd->sd_unit]; register int i; ScsiInquiryData inqbuf; - ScsiClass7Sense *sp; /* init some parameters that don't change */ sc->sc_sd = sd; @@ -214,8 +225,7 @@ tzprobe(sd) sc->sc_tapeid = MT_ISMFOUR; } else { printf("tz%d: assuming GENERIC SCSI tape device\n", - sd->sd_unit, - inqbuf.type, inqbuf.qualifier, inqbuf.version); + sd->sd_unit); sc->sc_tapeid = 0; } } @@ -231,6 +241,7 @@ bad: /* * Perform a special tape command on a SCSI Tape drive. */ +int tzcommand(dev, command, code, count, data) dev_t dev; int command; @@ -280,7 +291,7 @@ tzcommand(dev, command, code, count, data) sc->sc_buf.b_flags = 0; sc->sc_cmd.flags = 0; if (sc->sc_buf.b_resid) - printf("tzcommand: resid %d\n", sc->sc_buf.b_resid); /* XXX */ + printf("tzcommand: resid %ld\n", sc->sc_buf.b_resid); /* XXX */ if (error == 0) switch (command) { case SCSI_SPACE: @@ -386,7 +397,7 @@ tzdone(unit, error, resid, status) sc->sc_sense.sense[2] = SCSI_CLASS7_NO_SENSE; } else if (!cold) { ScsiClass7Sense *sp; - long resid; + long resid = 0; sp = (ScsiClass7Sense *)sc->sc_sense.sense; if (sp->error7 != 0x70) @@ -412,7 +423,7 @@ tzdone(unit, error, resid, status) } if (sc->sc_blklen && sp->badBlockLen) { tprintf(sc->sc_ctty, - "tz%d: Incorrect Block Length, expected %d got %d\n", + "tz%d: Incorrect Block Length, expected %d got %ld\n", unit, sc->sc_blklen, resid); break; } @@ -423,7 +434,7 @@ tzdone(unit, error, resid, status) * full record. */ tprintf(sc->sc_ctty, - "tz%d: Partial Read of Variable Length Tape Block, expected %d read %d\n", + "tz%d: Partial Read of Variable Length Tape Block, expected %ld read %ld\n", unit, bp->b_bcount - resid, bp->b_bcount); bp->b_resid = 0; @@ -491,7 +502,7 @@ tzdone(unit, error, resid, status) bp->b_resid = resid; } - if (dp = bp->b_actf) + if ((dp = bp->b_actf) != 0) dp->b_actb = bp->b_actb; else sc->sc_tab.b_actb = bp->b_actb; @@ -509,6 +520,7 @@ tzdone(unit, error, resid, status) } /* ARGSUSED */ +int tzopen(dev, flags, type, p) dev_t dev; int flags, type; @@ -663,9 +675,12 @@ tzopen(dev, flags, type, p) return (0); } -tzclose(dev, flag) +int +tzclose(dev, flag, mode, p) dev_t dev; - int flag; + int flag, mode; + struct proc *p; + { register struct tz_softc *sc = &tz_softc[tzunit(dev)]; int error = 0; @@ -699,14 +714,15 @@ tzclose(dev, flag) } int -tzread(dev, uio) +tzread(dev, uio, iomode) dev_t dev; struct uio *uio; + int iomode; { +#if 0 + /*XXX*/ /* check for hardware write-protect? */ register struct tz_softc *sc = &tz_softc[tzunit(dev)]; - /*XXX*/ /* check for hardware write-protect? */ -#if 0 if (sc->sc_type == SCSI_ROM_TYPE) return (EROFS); @@ -719,13 +735,14 @@ tzread(dev, uio) } int -tzwrite(dev, uio) +tzwrite(dev, uio, iomode) dev_t dev; struct uio *uio; + int iomode; { +#if 0 register struct tz_softc *sc = &tz_softc[tzunit(dev)]; -#if 0 if (sc->sc_format_pid && sc->sc_format_pid != curproc->p_pid) return (EPERM); #endif @@ -735,14 +752,14 @@ tzwrite(dev, uio) } int -tzioctl(dev, cmd, data, flag) +tzioctl(dev, cmd, data, flag, p) dev_t dev; - int cmd; + u_long cmd; caddr_t data; int flag; + struct proc *p; { register struct tz_softc *sc = &tz_softc[tzunit(dev)]; - register struct buf *bp = &sc->sc_buf; struct mtop *mtop; struct mtget *mtget; int code, count; @@ -841,8 +858,11 @@ tzstrategy(bp) * Non-interrupt driven, non-dma dump routine. */ int -tzdump(dev) +tzdump(dev, blkno, va, size) dev_t dev; + daddr_t blkno; + caddr_t va; + size_t size; { /* Not implemented. */ return (ENXIO); diff --git a/sys/arch/pmax/dev/xcfb.c b/sys/arch/pmax/dev/xcfb.c index cebba5321fb..8efa14f43b8 100644 --- a/sys/arch/pmax/dev/xcfb.c +++ b/sys/arch/pmax/dev/xcfb.c @@ -1,4 +1,4 @@ -/* $NetBSD: xcfb.c,v 1.9 1995/10/09 01:45:26 jonathan Exp $ */ +/* $NetBSD: xcfb.c,v 1.14.4.1 1996/05/30 04:04:01 mhitch Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -80,16 +80,17 @@ * v 9.2 90/02/13 22:16:24 shirriff Exp SPRITE (DECWRL)"; */ -#include +#include "fb.h" -#include -#include +#include "xcfb.h" +#include "dtop.h" #if NXCFB > 0 #if NDTOP == 0 xcfb needs dtop device #else #include +#include #include #include #include @@ -97,10 +98,12 @@ xcfb needs dtop device #include #include #include +#include #include #include +#include #include #include #include @@ -111,9 +114,9 @@ xcfb needs dtop device #include #include +#include #include #include -#include #include @@ -131,10 +134,10 @@ struct fbuaccess xcfbu; struct pmax_fbtty xcfbfb; struct fbinfo xcfbfi; /*XXX*/ -extern struct cfdriver cfb; +extern struct cfdriver cfb_cd; #define CMAP_BITS (3 * 256) /* 256 entries, 3 bytes per. */ -static u_char cmap_bits [NXCFB * CMAP_BITS]; /* One colormap per cfb... */ +static u_char cmap_bits [CMAP_BITS]; /* colormap for console... */ #define XCFB_FB_SIZE 0x100000 /* size of raster (mapped into userspace) */ @@ -176,8 +179,12 @@ extern u_short defCursor[32]; int xcfbmatch __P((struct device *, void *, void *)); void xcfbattach __P((struct device *, struct device *, void *)); -struct cfdriver xcfbcd = { - NULL, "xcfb", xcfbmatch, xcfbattach, DV_DULL, sizeof(struct device), 0 +struct cfattach xcfb_ca = { + sizeof(struct device), xcfbmatch, xcfbattach +}; + +struct cfdriver xcfb_cd = { + NULL, "xcfb", DV_DULL }; int @@ -186,19 +193,14 @@ xcfbmatch(parent, match, aux) void *match; void *aux; { - struct cfdata *cf = match; - struct confargs *ca = aux; - static int nxcfbs = 1; + /*struct cfdata *cf = match;*/ + struct tc_attach_args *ta = aux; - /* make sure that we're looking for this type of device. */ - if (!BUS_MATCHNAME(ca, "PMAG-DV ") && !BUS_MATCHNAME(ca, "xcfb")) + /* Make sure that it's an xcfb. */ + if (!TC_BUS_MATCHNAME(ta, "PMAG-DV ") && + strcmp(ta->ta_modname, "xcfb") != 0) return (0); -#ifdef notyet - /* if it can't have the one mentioned, reject it */ - if (cf->cf_unit >= nxcfbs) - return (0); -#endif return (1); } @@ -208,9 +210,9 @@ xcfbattach(parent, self, aux) struct device *self; void *aux; { - struct confargs *ca = aux; + struct tc_attach_args *ta = aux; - if (!xcfbinit(NULL, BUS_CVTADDR(ca), self->dv_unit, 0)); + if (!xcfbinit(NULL, (caddr_t)ta->ta_addr, self->dv_unit, 0)); return; /* no interrupts for XCFB */ @@ -229,10 +231,21 @@ xcfbinit(fi, base, unit, silent) int unit; int silent; { - register u_int *reset = (u_int *)IMS332_RESET_ADDRESS; - - if (fi == 0) fi = &xcfbfi; - unit = 0; /*XXX*/ /* FIXME */ + /*XXX*/ + /* + * If this device is being intialized as the console, malloc() + * is not yet up and we must use statically-allocated space. + */ + if (fi == NULL) { + fi = &xcfbfi; /* XXX */ + fi->fi_cmap_bits = (caddr_t)cmap_bits; + } else { + fi->fi_cmap_bits = malloc(CMAP_BITS, M_DEVBUF, M_NOWAIT); + if (fi->fi_cmap_bits == NULL) { + printf("cfb%d: no memory for cmap\n", unit); + return (0); + } + } /*XXX*/ /* @@ -252,7 +265,6 @@ xcfbinit(fi, base, unit, silent) fi->fi_linebytes = 1024; fi->fi_driver = &xcfb_driver; fi->fi_blanked = 0; - fi->fi_cmap_bits = (caddr_t)&cmap_bits [CMAP_BITS * unit]; /* Fill in Frame Buffer Type struct. */ fi->fi_type.fb_boardtype = PMAX_FBTYPE_XCFB; diff --git a/sys/arch/pmax/dev/xcfbvar.h b/sys/arch/pmax/dev/xcfbvar.h new file mode 100644 index 00000000000..e6261cb2cd6 --- /dev/null +++ b/sys/arch/pmax/dev/xcfbvar.h @@ -0,0 +1,6 @@ +/* + * Initialize a Personal Decstation baseboard framebuffer, + * so it can be used as a bitmapped glass-tty console device. + */ +extern int +xcfbinit __P((struct fbinfo *fi, caddr_t base, int unit, int silent)); diff --git a/sys/arch/pmax/dist/get b/sys/arch/pmax/dist/get index 066a5fd7ba5..18e51e395c3 100644 --- a/sys/arch/pmax/dist/get +++ b/sys/arch/pmax/dist/get @@ -1,5 +1,5 @@ #!/bin/sh - -# $NetBSD: get,v 1.6 1995/12/22 08:08:14 jonathan Exp $ +# $NetBSD: get,v 1.6.4.1 1996/08/13 07:55:50 jonathan Exp $ # # Copyright (c) 1992, 1993 # The Regents of the University of California. All rights reserved. @@ -61,7 +61,7 @@ for i in $ETC; do cp $DISTROOT/etc/$i etc/$i done -SBIN="disklabel fsck ifconfig init mknod mount mount_ffs mount_nfs newfs restore route umount" +SBIN="disklabel fsck fsck_ffs ifconfig init mknod mount mount_ffs mount_nfs newfs restore route umount" USBIN="pwd_mkdb" for i in $SBIN; do cp $DISTROOT/sbin/$i sbin/$i @@ -74,7 +74,7 @@ ln sbin/mount_ffs sbin/mount_ufs BIN="[ cat cp dd echo ed expr ls mkdir mv pax rcp rm sh stty sync mt" #UBIN="" -UBIN="awk" +UBIN="awk gzip tar" for i in $BIN; do cp $DISTROOT/bin/$i bin/$i done @@ -82,6 +82,7 @@ for i in $UBIN; do cp $DISTROOT/usr/bin/$i bin/$i done ln bin/[ bin/test +ln bin/gzip bin/gunzip MDEC="rzboot bootrz" for i in $MDEC; do diff --git a/sys/arch/pmax/include/ansi.h b/sys/arch/pmax/include/ansi.h index 1b329b0d39c..607e3ce3021 100644 --- a/sys/arch/pmax/include/ansi.h +++ b/sys/arch/pmax/include/ansi.h @@ -1,74 +1,3 @@ -/* $NetBSD: ansi.h,v 1.5 1994/10/26 21:09:33 cgd Exp $ */ +/* $NetBSD: ansi.h,v 1.7 1996/03/19 11:00:16 jonathan Exp $ */ -/*- - * Copyright (c) 1990, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)ansi.h 8.2 (Berkeley) 1/4/94 - */ - -#ifndef _ANSI_H_ -#define _ANSI_H_ - -/* - * Types which are fundamental to the implementation and may appear in - * more than one standard header are defined here. Standard headers - * then use: - * #ifdef _BSD_SIZE_T_ - * typedef _BSD_SIZE_T_ size_t; - * #undef _BSD_SIZE_T_ - * #endif - */ -#define _BSD_CLOCK_T_ unsigned long /* clock() */ -#define _BSD_PTRDIFF_T_ int /* ptr1 - ptr2 */ -#define _BSD_SIZE_T_ unsigned int /* sizeof() */ -#define _BSD_SSIZE_T_ int /* byte count or error */ -#define _BSD_TIME_T_ long /* time() */ -#define _BSD_VA_LIST_ char * /* va_list */ - -/* - * Runes (wchar_t) is declared to be an ``int'' instead of the more natural - * ``unsigned long'' or ``long''. Two things are happening here. It is not - * unsigned so that EOF (-1) can be naturally assigned to it and used. Also, - * it looks like 10646 will be a 31 bit standard. This means that if your - * ints cannot hold 32 bits, you will be in trouble. The reason an int was - * chosen over a long is that the is*() and to*() routines take ints (says - * ANSI C), but they use _RUNE_T_ instead of int. By changing it here, you - * lose a bit of ANSI conformance, but your programs will still work. - * - * Note that _WCHAR_T_ and _RUNE_T_ must be of the same type. When wchar_t - * and rune_t are typedef'd, _WCHAR_T_ will be undef'd, but _RUNE_T remains - * defined for ctype.h. - */ -#define _BSD_WCHAR_T_ int /* wchar_t */ -#define _BSD_RUNE_T_ int /* rune_t */ - -#endif /* _ANSI_H_ */ +#include diff --git a/sys/arch/pmax/include/autoconf.h b/sys/arch/pmax/include/autoconf.h index 7f5c589393e..59c3eaa6791 100644 --- a/sys/arch/pmax/include/autoconf.h +++ b/sys/arch/pmax/include/autoconf.h @@ -1,4 +1,4 @@ -/* $NetBSD: autoconf.h,v 1.3 1996/01/11 05:57:04 jonathan Exp $ */ +/* $NetBSD: autoconf.h,v 1.6.4.1 1996/05/30 04:07:36 mhitch Exp $ */ /* * Copyright (c) 1994, 1995 Carnegie-Mellon University. @@ -31,50 +31,43 @@ * Machine-dependent structures of autoconfiguration */ +#include + struct confargs; + /* Handle device interrupt for given unit of a driver */ typedef void* intr_arg_t; /* pointer to some softc */ typedef int (*intr_handler_t) __P((intr_arg_t)); +/* + * XXX Establish interrupt on an arbitrary decstation/decsystem bus. + */ +extern void +generic_intr_establish __P(( void * parent, void * cookie, + int level, + intr_handler_t handler, intr_arg_t arg)); -struct abus { - struct device *ab_dv; /* back-pointer to device */ - int ab_type; /* bus type (see below) */ - void (*ab_intr_establish) /* bus's set-handler function */ - __P((struct confargs *, intr_handler_t, intr_arg_t)); - void (*ab_intr_disestablish) /* bus's unset-handler function */ - __P((struct confargs *)); - caddr_t (*ab_cvtaddr) /* convert slot/offset to address */ - __P((struct confargs *)); - int (*ab_matchname) /* see if name matches driver */ - __P((struct confargs *, char *)); -}; - -#define BUS_MAIN 1 /* mainbus */ -#define BUS_TC 2 /* TurboChannel */ -#define BUS_ASIC 3 /* IOCTL ASIC; under TurboChannel */ -#define BUS_TCDS 4 /* TCDS ASIC; under TurboChannel */ -#define KN02_ASIC_NAME "KN02 " /* very special */ +#define KN02_ASIC_NAME "KN02 " /* ROM name in 3max system slot */ -#define BUS_INTR_ESTABLISH(ca, handler, val) \ - (*(ca)->ca_bus->ab_intr_establish)((ca), (handler), (val)) -#define BUS_INTR_DISESTABLISH(ca) \ - (*(ca)->ca_bus->ab_intr_establish)(ca) -#define BUS_CVTADDR(ca) \ - (*(ca)->ca_bus->ab_cvtaddr)(ca) -#define BUS_MATCHNAME(ca, name) \ - (*(ca)->ca_bus->ab_matchname)((ca), (name)) +#define INTR_ESTABLISH(parent, cookie, level, handler, val) \ + generic_intr_establish((parent), (cookie), (level), (handler), (val)) + +#define BUS_INTR_ESTABLISH(ca, handler, val) \ + generic_intr_establish( ((struct device*)(val))->dv_parent, \ + (void*)(ca)->ca_slotpri, 0, (handler), (val)) + struct confargs { char *ca_name; /* Device name. */ int ca_slot; /* Device slot (table entry). */ int ca_offset; /* Offset into slot. */ + tc_addr_t ca_addr; /* Device address. */ int ca_slotpri; /* Device interrupt "priority" */ - struct abus *ca_bus; /* bus device resides on. */ }; +extern caddr_t baseboard_cvtaddr __P((struct confargs *)); /*XXX*/ #ifndef pmax void set_clockintr __P((void (*)(struct clockframe *))); diff --git a/sys/arch/pmax/include/bsd-aout.h b/sys/arch/pmax/include/bsd-aout.h index 5d496ff1d09..1d98a19d7ab 100644 --- a/sys/arch/pmax/include/bsd-aout.h +++ b/sys/arch/pmax/include/bsd-aout.h @@ -1,33 +1,7 @@ +/* $NetBSD: bsd-aout.h,v 1.3 1996/03/19 03:06:28 jonathan Exp $ */ + /* bsd-aout.h 4.4bsd a.out format, for backwards compatibility... */ -#ifndef __MACHINE_BSD_AOUT_H__ -#define __MACHINE_BSD_AOUT_H__ -#define BSD_OMAGIC 0407 /* old impure format */ -#define BSD_NMAGIC 0410 /* read-only text */ -#define BSD_ZMAGIC 0413 /* demand load format */ - -struct bsd_aouthdr { -#if BYTE_ORDER == BIG_ENDIAN - u_short a_mid; /* machine ID */ - u_short a_magic; /* magic number */ -#else - u_short a_magic; /* magic number */ - u_short a_mid; /* machine ID */ -#endif - - u_long a_text; /* text segment size */ - u_long a_data; /* initialized data size */ - u_long a_bss; /* uninitialized data size */ - u_long a_syms; /* symbol table size */ - u_long a_entry; /* entry point */ - u_long a_trsize; /* text relocation size */ - u_long a_drsize; /* data relocation size */ -}; - -#ifndef _KERNEL -#define _AOUT_INCLUDE_ -#include -#endif /* _KERNEL */ -#endif /* __MACHINE_BSD_AOUT_H__ */ +#include diff --git a/sys/arch/pmax/include/cdefs.h b/sys/arch/pmax/include/cdefs.h index 47499b695ea..ece6d966740 100644 --- a/sys/arch/pmax/include/cdefs.h +++ b/sys/arch/pmax/include/cdefs.h @@ -1,45 +1,3 @@ -/* $NetBSD: cdefs.h,v 1.4 1995/12/15 01:17:04 jonathan Exp $ */ +/* $NetBSD: cdefs.h,v 1.5 1996/03/19 04:39:03 jonathan Exp $ */ -/* - * Copyright (c) 1995 Carnegie-Mellon University. - * All rights reserved. - * - * Author: Chris G. Demetriou - * - * Permission to use, copy, modify and distribute this software and - * its documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND - * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie the - * rights to redistribute these changes. - */ - -#ifndef _MACHINE_CDEFS_H_ -#define _MACHINE_CDEFS_H_ - -#define _C_LABEL(x) _STRING(x) - -#define __indr_references(sym,msg) /* nothing */ - -#if defined __GNUC__ && defined __STDC__ -#define __warn_references(sym, msg) \ - static const char __evoke_link_warning_##sym[] \ - __attribute__ ((section (".gnu.warning." #sym))) = msg; -#else -#define __warn_references(sym,msg) /* nothing */ -#endif - -#endif /* !_MACHINE_CDEFS_H_ */ +#include diff --git a/sys/arch/pmax/include/conf.h b/sys/arch/pmax/include/conf.h new file mode 100644 index 00000000000..e854da965a1 --- /dev/null +++ b/sys/arch/pmax/include/conf.h @@ -0,0 +1,35 @@ +/* $NetBSD: conf.h,v 1.2 1996/04/14 00:56:59 jonathan Exp $ */ + + +/* + * Copyright 1996 The Board of Trustees of The Leland Stanford + * Junior University. All Rights Reserved. + * + * Permission to use, copy, modify, and distribute this + * software and its documentation for any purpose and without + * fee is hereby granted, provided that the above copyright + * notice appear in all copies. Stanford University + * makes no representations about the suitability of this + * software for any purpose. It is provided "as is" without + * express or implied warranty. + * + * This file contributed by Jonathan Stone. + */ + +#define mmread mmrw +#define mmwrite mmrw +cdev_decl(mm); + + +cdev_decl(scc); /* pmax (also alpha m-d z8530 SCC */ +cdev_decl(dc); /* dc7085 dz11-on-a-chip */ + +bdev_decl(rz); /* antique 4.4bsd/pmax SCSI disk */ +cdev_decl(rz); + +bdev_decl(tz); /* antique 4.4bsd/pmax SCSI tape driver */ +cdev_decl(tz); + +cdev_decl(dtop); /* Personal Decstation (MAXINE) desktop bus */ +cdev_decl(fb); /* generic framebuffer pseudo-device */ +cdev_decl(rcons); /* framebuffer-based raster console pseudo-device */ diff --git a/sys/arch/pmax/include/cpu.h b/sys/arch/pmax/include/cpu.h index 80909d2a29b..a185964ac80 100644 --- a/sys/arch/pmax/include/cpu.h +++ b/sys/arch/pmax/include/cpu.h @@ -1,158 +1,16 @@ -/* $NetBSD: cpu.h,v 1.12 1995/06/28 02:56:01 cgd Exp $ */ +/* $NetBSD: cpu.h,v 1.15 1996/05/19 01:28:47 jonathan Exp $ */ -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell and Rick Macklem. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)cpu.h 8.4 (Berkeley) 1/4/94 - */ +#include +#include /* XXX */ -#ifndef _CPU_H_ -#define _CPU_H_ +#define CLKF_USERMODE(framep) CLKF_USERMODE_R3K(framep) +#define CLKF_BASEPRI(framep) CLKF_BASEPRI_R3K(framep) -#include - -/* - * Exported definitions unique to pmax/mips cpu support. - */ - -/* - * definitions of cpu-dependent requirements - * referenced in generic code - */ -#define cpu_wait(p) /* nothing */ -#define cpu_set_init_frame(p, fp) /* nothing */ -#define cpu_swapout(p) panic("cpu_swapout: can't get here"); - -/* - * Arguments to hardclock and gatherstats encapsulate the previous - * machine state in an opaque clockframe. - */ -struct clockframe { - int pc; /* program counter at time of interrupt */ - int sr; /* status register at time of interrupt */ -}; - -#define CLKF_USERMODE(framep) ((framep)->sr & MACH_SR_KU_PREV) -#define CLKF_BASEPRI(framep) \ - ((~(framep)->sr & (MACH_INT_MASK | MACH_SR_INT_ENA_PREV)) == 0) -#define CLKF_PC(framep) ((framep)->pc) -#define CLKF_INTR(framep) (0) - -/* - * Preempt the current process if in interrupt from user mode, - * or after the current trap/syscall if in system mode. - */ -#define need_resched() { want_resched = 1; aston(); } - -/* - * Give a profiling tick to the current process when the user profiling - * buffer pages are invalid. On the PMAX, request an ast to send us - * through trap, marking the proc as needing a profiling tick. - */ -#define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); } - -/* - * Notify the current process (p) that it has a signal pending, - * process as soon as possible. - */ -#define signotify(p) aston() - -#define aston() (astpending = 1) - -int astpending; /* need to trap before returning to user mode */ -int want_resched; /* resched() was called */ - -/* - * CPU identification, from PRID register. - */ -union cpuprid { - int cpuprid; - struct { -#if BYTE_ORDER == BIG_ENDIAN - u_int pad1:16; /* reserved */ - u_int cp_imp:8; /* implementation identifier */ - u_int cp_majrev:4; /* major revision identifier */ - u_int cp_minrev:4; /* minor revision identifier */ -#else - u_int cp_minrev:4; /* minor revision identifier */ - u_int cp_majrev:4; /* major revision identifier */ - u_int cp_imp:8; /* implementation identifier */ - u_int pad1:16; /* reserved */ -#endif - } cpu; -}; - -/* - * CTL_MACHDEP definitions. - */ -#define CPU_CONSDEV 1 /* dev_t: console terminal device */ -#define CPU_MAXID 2 /* number of valid machdep ids */ - -#define CTL_MACHDEP_NAMES { \ - { 0, 0 }, \ - { "console_device", CTLTYPE_STRUCT }, \ -} - -/* - * MIPS CPU types (cp_imp). - */ -#define MIPS_R2000 0x01 -#define MIPS_R3000 0x02 -#define MIPS_R6000 0x03 -#define MIPS_R4000 0x04 -#define MIPS_R6000A 0x06 - -/* - * MIPS FPU types - */ -#define MIPS_R2010 0x02 -#define MIPS_R3010 0x03 -#define MIPS_R6010 0x04 -#define MIPS_R4010 0x05 #ifdef _KERNEL -union cpuprid cpu; -union cpuprid fpu; +union cpuprid cpu_id; +union cpuprid fpu_id; u_int machDataCacheSize; u_int machInstCacheSize; extern struct intr_tab intr_tab[]; #endif - -/* - * Enable realtime clock (always enabled). - */ -#define enablertclock() - -#endif /* _CPU_H_ */ diff --git a/sys/arch/pmax/include/ecoff.h b/sys/arch/pmax/include/ecoff.h index c0f30e17077..91631b47cf9 100644 --- a/sys/arch/pmax/include/ecoff.h +++ b/sys/arch/pmax/include/ecoff.h @@ -1,46 +1,3 @@ -/* $NetBSD: ecoff.h,v 1.4 1995/06/16 02:07:33 mellon Exp $ */ +/* $NetBSD: ecoff.h,v 1.5 1996/03/19 03:17:24 jonathan Exp $ */ -/* - * Copyright (c) 1994 Adam Glass - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Adam Glass. - * 4. The name of the Author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Adam Glass ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Adam Glass BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#define ECOFF_LDPGSZ 4096 - -#define ECOFF_PAD - -#define ECOFF_MACHDEP \ - u_long ea_gprmask; \ - u_long ea_cprmask[4]; \ - u_long ea_gp_value - -#define ECOFF_MAGIC_MIPSEL 0x0162 -#define ECOFF_BADMAG(ex) ((ex)->ef_magic != ECOFF_MAGIC_MIPSEL) - -#define ECOFF_SEGMENT_ALIGNMENT(eap) ((eap)->ea_vstamp < 23 ? 8 : 16) +#include diff --git a/sys/arch/pmax/include/elf.h b/sys/arch/pmax/include/elf.h index 5cb8b03421d..ab305c5df17 100644 --- a/sys/arch/pmax/include/elf.h +++ b/sys/arch/pmax/include/elf.h @@ -1,137 +1,3 @@ -/* $NetBSD: elf.h,v 1.2 1995/03/28 18:19:14 jtc Exp $ */ +/* $NetBSD: elf.h,v 1.3 1996/03/19 03:06:41 jonathan Exp $ */ -/* - * Copyright (c) 1994 Ted Lemon - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#ifndef __MACHINE_ELF_H__ -#define __MACHINE_ELF_H__ - -/* ELF executable header... */ -struct ehdr { - char elf_magic [4]; /* Elf magic number... */ - unsigned long magic [3]; /* Magic number... */ - unsigned short type; /* Object file type... */ - unsigned short machine; /* Machine ID... */ - unsigned long version; /* File format version... */ - unsigned long entry; /* Entry point... */ - unsigned long phoff; /* Program header table offset... */ - unsigned long shoff; /* Section header table offset... */ - unsigned long flags; /* Processor-specific flags... */ - unsigned short ehsize; /* Elf header size in bytes... */ - unsigned short phsize; /* Program header size... */ - unsigned short phcount; /* Program header count... */ - unsigned short shsize; /* Section header size... */ - unsigned short shcount; /* Section header count... */ - unsigned short shstrndx; /* Section header string table index... */ -}; - -/* Program header... */ -struct phdr { - unsigned long type; /* Segment type... */ - unsigned long offset; /* File offset... */ - unsigned long vaddr; /* Virtual address... */ - unsigned long paddr; /* Physical address... */ - unsigned long filesz; /* Size of segment in file... */ - unsigned long memsz; /* Size of segment in memory... */ - unsigned long flags; /* Segment flags... */ - unsigned long align; /* Alighment, file and memory... */ -}; - -/* Section header... */ -struct shdr { - unsigned long name; /* Offset into string table of section name */ - unsigned long type; /* Type of section... */ - unsigned long flags; /* Section flags... */ - unsigned long addr; /* Section virtual address at execution... */ - unsigned long offset; /* Section file offset... */ - unsigned long size; /* Section size... */ - unsigned long link; /* Link to another section... */ - unsigned long info; /* Additional section info... */ - unsigned long align; /* Section alignment... */ - unsigned long esize; /* Entry size if section holds table... */ -}; - -/* Symbol table entry... */ -struct sym { - unsigned long name; /* Index into strtab of symbol name. */ - unsigned long value; /* Section offset, virt addr or common align. */ - unsigned long size; /* Size of object referenced. */ - unsigned type : 4; /* Symbol type (e.g., function, data)... */ - unsigned binding : 4; /* Symbol binding (e.g., global, local)... */ - unsigned char other; /* Unused. */ - unsigned short shndx; /* Section containing symbol. */ -}; - -/* Values for program header type field */ - -#define PT_NULL 0 /* Program header table entry unused */ -#define PT_LOAD 1 /* Loadable program segment */ -#define PT_DYNAMIC 2 /* Dynamic linking information */ -#define PT_INTERP 3 /* Program interpreter */ -#define PT_NOTE 4 /* Auxiliary information */ -#define PT_SHLIB 5 /* Reserved, unspecified semantics */ -#define PT_PHDR 6 /* Entry for header table itself */ -#define PT_LOPROC 0x70000000 /* Processor-specific */ -#define PT_HIPROC 0x7FFFFFFF /* Processor-specific */ -#define PT_MIPS_REGINFO PT_LOPROC /* Mips reginfo section... */ - -/* Program segment permissions, in program header flags field */ - -#define PF_X (1 << 0) /* Segment is executable */ -#define PF_W (1 << 1) /* Segment is writable */ -#define PF_R (1 << 2) /* Segment is readable */ -#define PF_MASKPROC 0xF0000000 /* Processor-specific reserved bits */ - -/* Reserved section indices... */ -#define SHN_UNDEF 0 -#define SHN_ABS 0xfff1 -#define SHN_COMMON 0xfff2 -#define SHN_MIPS_ACOMMON 0xfff0 - -/* Symbol bindings... */ -#define STB_LOCAL 0 -#define STB_GLOBAL 1 -#define STB_WEAK 2 - -/* Symbol types... */ -#define STT_NOTYPE 0 -#define STT_OBJECT 1 -#define STT_FUNC 2 -#define STT_SECTION 3 -#define STT_FILE 4 - -#define ELF_HDR_SIZE (sizeof (struct ehdr)) -#ifdef _KERNEL -int pmax_elf_makecmds __P((struct proc *, struct exec_package *)); -#endif /* _KERNEL */ -#endif /* __MACHINE_ELF_H__ */ +#include diff --git a/sys/arch/pmax/include/endian.h b/sys/arch/pmax/include/endian.h index 3aeb69fc3ca..60f1fef7fca 100644 --- a/sys/arch/pmax/include/endian.h +++ b/sys/arch/pmax/include/endian.h @@ -1,94 +1,3 @@ -/* $NetBSD: endian.h,v 1.4 1994/10/26 21:09:38 cgd Exp $ */ +/* $NetBSD: endian.h,v 1.5 1996/03/19 03:06:50 jonathan Exp $ */ -/* - * Copyright (c) 1987, 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)endian.h 8.1 (Berkeley) 6/11/93 - */ - -#ifndef _ENDIAN_H_ -#define _ENDIAN_H_ - -/* - * Define _NOQUAD if the compiler does NOT support 64-bit integers. - */ -/* #define _NOQUAD */ - -/* - * Define the order of 32-bit words in 64-bit words. - */ -#define _QUAD_HIGHWORD 1 -#define _QUAD_LOWWORD 0 - -#ifndef _POSIX_SOURCE -/* - * Definitions for byte order, according to byte significance from low - * address to high. - */ -#define LITTLE_ENDIAN 1234 /* LSB first: i386, vax */ -#define BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net */ -#define PDP_ENDIAN 3412 /* LSB first in word, MSW first in long */ - -#define BYTE_ORDER LITTLE_ENDIAN - -#include - -__BEGIN_DECLS -unsigned long htonl __P((unsigned long)); -unsigned short htons __P((unsigned short)); -unsigned long ntohl __P((unsigned long)); -unsigned short ntohs __P((unsigned short)); -__END_DECLS - -/* - * Macros for network/external number representation conversion. - */ -#if BYTE_ORDER == BIG_ENDIAN && !defined(lint) -#define ntohl(x) (x) -#define ntohs(x) (x) -#define htonl(x) (x) -#define htons(x) (x) - -#define NTOHL(x) (x) -#define NTOHS(x) (x) -#define HTONL(x) (x) -#define HTONS(x) (x) - -#else - -#define NTOHL(x) (x) = ntohl((u_long)x) -#define NTOHS(x) (x) = ntohs((u_short)x) -#define HTONL(x) (x) = htonl((u_long)x) -#define HTONS(x) (x) = htons((u_short)x) -#endif -#endif /* ! _POSIX_SOURCE */ -#endif /* !_ENDIAN_H_ */ +#include diff --git a/sys/arch/pmax/include/exec.h b/sys/arch/pmax/include/exec.h index 8e25259e2d9..bf90c5ce358 100644 --- a/sys/arch/pmax/include/exec.h +++ b/sys/arch/pmax/include/exec.h @@ -1,48 +1,3 @@ -/* $NetBSD: exec.h,v 1.5 1994/10/26 21:09:39 cgd Exp $ */ +/* $NetBSD: exec.h,v 1.6 1996/03/19 03:07:02 jonathan Exp $ */ -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)exec.h 8.1 (Berkeley) 6/10/93 - */ - -#define __LDPGSZ 4096 - -#define ELF_TARG_CLASS ELFCLASS32 -#define ELF_TARG_DATA ELFDATA2LSB -#define ELF_TARG_MACH EM_MIPS - -#define DO_AOUT /* support a.out */ -#define DO_ELF /* support ELF */ -#define DO_ECOFF /* support ecoff */ - -#include +#include diff --git a/sys/arch/pmax/include/float.h b/sys/arch/pmax/include/float.h index 2c172c75763..5c78fe23f21 100644 --- a/sys/arch/pmax/include/float.h +++ b/sys/arch/pmax/include/float.h @@ -1,80 +1,3 @@ -/* $NetBSD: float.h,v 1.7 1995/06/20 20:45:50 jtc Exp $ */ +/* $NetBSD: float.h,v 1.9 1996/03/19 03:07:19 jonathan Exp $ */ -/* - * Copyright (c) 1989, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)float.h 8.1 (Berkeley) 6/10/93 - */ - -#ifndef _PMAX_FLOAT_H_ -#define _PMAX_FLOAT_H_ - -#include - -__BEGIN_DECLS -extern int __flt_rounds(); -__END_DECLS - -#define FLT_RADIX 2 /* b */ -#define FLT_ROUNDS __flt_rounds() - -#define FLT_MANT_DIG 24 /* p */ -#define FLT_EPSILON 1.19209290E-07F /* b**(1-p) */ -#define FLT_DIG 6 /* floor((p-1)*log10(b))+(b == 10) */ -#define FLT_MIN_EXP -125 /* emin */ -#define FLT_MIN 1.17549435E-38F /* b**(emin-1) */ -#define FLT_MIN_10_EXP -37 /* ceil(log10(b**(emin-1))) */ -#define FLT_MAX_EXP 128 /* emax */ -#define FLT_MAX 3.40282347E+38F /* (1-b**(-p))*b**emax */ -#define FLT_MAX_10_EXP 38 /* floor(log10((1-b**(-p))*b**emax)) */ - -#define DBL_MANT_DIG 53 -#define DBL_EPSILON 2.2204460492503131E-16 -#define DBL_DIG 15 -#define DBL_MIN_EXP -1021 -#define DBL_MIN 2.225073858507201E-308 -#define DBL_MIN_10_EXP -307 -#define DBL_MAX_EXP 1024 -#define DBL_MAX 1.797693134862316E+308 -#define DBL_MAX_10_EXP 308 - -#define LDBL_MANT_DIG DBL_MANT_DIG -#define LDBL_EPSILON DBL_EPSILON -#define LDBL_DIG DBL_DIG -#define LDBL_MIN_EXP DBL_MIN_EXP -#define LDBL_MIN DBL_MIN -#define LDBL_MIN_10_EXP DBL_MIN_10_EXP -#define LDBL_MAX_EXP DBL_MAX_EXP -#define LDBL_MAX DBL_MAX -#define LDBL_MAX_10_EXP DBL_MAX_10_EXP - -#endif /* _PMAX_FLOAT_H_ */ +#include diff --git a/sys/arch/pmax/include/ieeefp.h b/sys/arch/pmax/include/ieeefp.h index f69318d9d0c..51bdb4564a5 100644 --- a/sys/arch/pmax/include/ieeefp.h +++ b/sys/arch/pmax/include/ieeefp.h @@ -3,21 +3,4 @@ * Public domain. */ -#ifndef _PMAX_IEEEFP_H_ -#define _PMAX_IEEEFP_H_ - -typedef int fp_except; -#define FP_X_IMP 0x01 /* imprecise (loss of precision) */ -#define FP_X_UFL 0x02 /* underflow exception */ -#define FP_X_OFL 0x04 /* overflow exception */ -#define FP_X_DZ 0x08 /* divide-by-zero exception */ -#define FP_X_INV 0x10 /* invalid operation exception */ - -typedef enum { - FP_RN=0, /* round to nearest representable number */ - FP_RZ=1, /* round to zero (truncate) */ - FP_RP=2, /* round toward positive infinity */ - FP_RM=3 /* round toward negative infinity */ -} fp_rnd; - -#endif /* _PMAX_IEEEFP_H_ */ +#include diff --git a/sys/arch/pmax/include/kdbparam.h b/sys/arch/pmax/include/kdbparam.h index 9104c87aa3c..320bf53e779 100644 --- a/sys/arch/pmax/include/kdbparam.h +++ b/sys/arch/pmax/include/kdbparam.h @@ -1,74 +1,3 @@ -/* $NetBSD: kdbparam.h,v 1.4 1994/10/26 21:09:42 cgd Exp $ */ +/* $NetBSD: kdbparam.h,v 1.5 1996/03/19 04:39:08 jonathan Exp $ */ -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)kdbparam.h 8.1 (Berkeley) 6/10/93 - */ - -/* - * Machine dependent definitions for kdb. - */ - -#if BYTE_ORDER == LITTLE_ENDIAN -#define kdbshorten(w) ((w) & 0xFFFF) -#define kdbbyte(w) ((w) & 0xFF) -#define kdbitol(a,b) ((long)(((b) << 16) | ((a) & 0xFFFF))) -#define kdbbtol(a) ((long)(a)) -#endif - -#define LPRMODE "%R" -#define OFFMODE "+%R" - -#define SETBP(ins) MACH_BREAK_BRKPT - -/* return the program counter value modified if we are in a delay slot */ -#define kdbgetpc(pcb) (kdbvar[kdbvarchk('t')] < 0 ? \ - (pcb).pcb_regs[34] + 4 : (pcb).pcb_regs[34]) -#define kdbishiddenreg(p) ((p) >= &kdbreglist[33]) -#define kdbisbreak(type) (((type) & MACH_CR_EXC_CODE) == 0x24) - -/* check for address wrap around */ -#define kdbaddrwrap(addr,newaddr) (((addr)^(newaddr)) >> 31) - -/* declare machine dependent routines defined in kadb.c */ -void kdbprinttrap __P((unsigned, unsigned)); -void kdbsetsstep __P((void)); -void kdbclrsstep __P((void)); -void kdbreadc __P((char *)); -void kdbwrite __P((char *, int)); -void kdbprintins __P((int, long)); -void kdbstacktrace __P((int)); -char *kdbmalloc __P((int)); +#include diff --git a/sys/arch/pmax/include/limits.h b/sys/arch/pmax/include/limits.h index 6f2c0243f28..0d0f743ff27 100644 --- a/sys/arch/pmax/include/limits.h +++ b/sys/arch/pmax/include/limits.h @@ -1,100 +1,7 @@ -/* $NetBSD: limits.h,v 1.8 1995/03/28 18:19:16 jtc Exp $ */ +/* $NetBSD: limits.h,v 1.10 1996/03/19 03:09:03 jonathan Exp $ */ -/* - * Copyright (c) 1988, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)limits.h 8.3 (Berkeley) 1/4/94 - */ - -#define CHAR_BIT 8 /* number of bits in a char */ -#define MB_LEN_MAX 6 /* Allow 31 bit UTF2 */ +#include #ifdef _KERNEL -#define CLK_TCK 60 /* ticks per second */ -#endif - -/* - * According to ANSI (section 2.2.4.2), the values below must be usable by - * #if preprocessing directives. Additionally, the expression must have the - * same type as would an expression that is an object of the corresponding - * type converted according to the integral promotions. The subtraction for - * INT_MIN and LONG_MIN is so the value is not unsigned; 2147483648 is an - * unsigned int for 32-bit two's complement ANSI compilers (section 3.1.3.2). - * These numbers work for pcc as well. The UINT_MAX and ULONG_MAX values - * are written as hex so that GCC will be quiet about large integer constants. - */ -#define SCHAR_MAX 127 /* min value for a signed char */ -#define SCHAR_MIN (-128) /* max value for a signed char */ - -#define UCHAR_MAX 255 /* max value for an unsigned char */ -#define CHAR_MAX 127 /* max value for a char */ -#define CHAR_MIN (-128) /* min value for a char */ - -#define USHRT_MAX 65535 /* max value for an unsigned short */ -#define SHRT_MAX 32767 /* max value for a short */ -#define SHRT_MIN (-32768) /* min value for a short */ - -#define UINT_MAX 0xffffffff /* max value for an unsigned int */ -#define INT_MAX 2147483647 /* max value for an int */ -#define INT_MIN (-2147483647-1) /* min value for an int */ - -#define ULONG_MAX 0xffffffff /* max value for an unsigned long */ -#define LONG_MAX 2147483647 /* max value for a long */ -#define LONG_MIN (-2147483647-1) /* min value for a long */ - -#if !defined(_ANSI_SOURCE) -#define SSIZE_MAX INT_MAX /* max value for a ssize_t */ - -#if !defined(_POSIX_SOURCE) && !defined(_XOPEN_SOURCE) -#define SIZE_T_MAX UINT_MAX /* max value for a size_t */ - -/* GCC requires that quad constants be written as expressions. */ -#define UQUAD_MAX ((u_quad_t)0-1) /* max value for a uquad_t */ - /* max value for a quad_t */ -#define QUAD_MAX ((quad_t)(UQUAD_MAX >> 1)) -#define QUAD_MIN (-QUAD_MAX-1) /* min value for a quad_t */ - -#endif /* !_POSIX_SOURCE && !_XOPEN_SOURCE */ -#endif /* !_ANSI_SOURCE */ - -#if (!defined(_ANSI_SOURCE)&&!defined(_POSIX_SOURCE)) || defined(_XOPEN_SOURCE) -#define LONG_BIT 32 -#define WORD_BIT 32 - -#define DBL_DIG 15 -#define DBL_MAX 1.797693134862316E+308 -#define DBL_MIN 2.225073858507201E-308 - -#define FLT_DIG 6 -#define FLT_MAX 3.40282347E+38F -#define FLT_MIN 1.17549435E-38F +#define CLK_TCK 60 /* ticks per second */ #endif diff --git a/sys/arch/pmax/include/locore.h b/sys/arch/pmax/include/locore.h new file mode 100644 index 00000000000..c837262a72d --- /dev/null +++ b/sys/arch/pmax/include/locore.h @@ -0,0 +1,18 @@ +/* $NetBSD: locore.h,v 1.2 1996/05/20 23:49:11 jonathan Exp $ */ + +/* + * Copyright 1996 The Board of Trustees of The Leland Stanford + * Junior University. All Rights Reserved. + * + * Permission to use, copy, modify, and distribute this + * software and its documentation for any purpose and without + * fee is hereby granted, provided that the above copyright + * notice appear in all copies. Stanford University + * makes no representations about the suitability of this + * software for any purpose. It is provided "as is" without + * express or implied warranty. + * + * This file contributed by Jonathan Stone + */ + +#include diff --git a/sys/arch/pmax/include/machAsmDefs.h b/sys/arch/pmax/include/machAsmDefs.h index 6d44b22979d..8f6c09b0a18 100644 --- a/sys/arch/pmax/include/machAsmDefs.h +++ b/sys/arch/pmax/include/machAsmDefs.h @@ -1,182 +1,3 @@ -/* $NetBSD: machAsmDefs.h,v 1.7 1995/01/18 06:38:57 mellon Exp $ */ +/* $NetBSD: machAsmDefs.h,v 1.8 1996/03/25 02:55:18 jonathan Exp $ */ -/* - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 - */ - -/* - * machAsmDefs.h -- - * - * Macros used when writing assembler programs. - * - * Copyright (C) 1989 Digital Equipment Corporation. - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby granted, - * provided that the above copyright notice appears in all copies. - * Digital Equipment Corporation makes no representations about the - * suitability of this software for any purpose. It is provided "as is" - * without express or implied warranty. - * - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, - * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) - */ - -#ifndef _MACHASMDEFS -#define _MACHASMDEFS - -#include - -/* - * Define -pg profile entry code. - */ -#if defined(GPROF) || defined(PROF) -#define MCOUNT .set noreorder; \ - .set noat; \ - move $1,$31; \ - jal _mcount; \ - subu sp,sp,8; \ - .set reorder; \ - .set at; -#else -#define MCOUNT -#endif - -#ifdef __NO_LEADING_UNDERSCORES__ -# define _C_LABEL(x) x -#else -# ifdef __STDC__ -# define _C_LABEL(x) _ ## x -# else -# define _C_LABEL(x) _/**/x -# endif -#endif - -/* - * LEAF(x) - * - * Declare a leaf routine. - */ -#define LEAF(x) \ - .globl _C_LABEL(x); \ - .ent _C_LABEL(x), 0; \ -_C_LABEL(x): ; \ - .frame sp, 0, ra; \ - MCOUNT - -/* - * NLEAF(x) - * - * Declare a non-profiled leaf routine. - */ -#define NLEAF(x) \ - .globl _C_LABEL(x); \ - .ent _C_LABEL(x), 0; \ -_C_LABEL(x): ; \ - .frame sp, 0, ra - -/* - * ALEAF -- declare alternate entry to a leaf routine. - */ -#ifdef USE_AENT -#define AENT(x) \ - .aent x, 0 -#else -#define AENT(x) -#endif -#define ALEAF(x) \ - .globl _C_LABEL(x); \ - AENT (_C_LABEL(x)) \ -_C_LABEL(x): - -/* - * NON_LEAF(x) - * - * Declare a non-leaf routine (a routine that makes other C calls). - */ -#define NON_LEAF(x, fsize, retpc) \ - .globl _C_LABEL(x); \ - .ent _C_LABEL(x), 0; \ -_C_LABEL(x): ; \ - .frame sp, fsize, retpc; \ - MCOUNT - -/* - * NNON_LEAF(x) - * - * Declare a non-profiled non-leaf routine - * (a routine that makes other C calls). - */ -#define NNON_LEAF(x, fsize, retpc) \ - .globl _C_LABEL(x); \ - .ent _C_LABEL(x), 0; \ -_C_LABEL(x): ; \ - .frame sp, fsize, retpc - -/* - * END(x) - * - * Mark end of a procedure. - */ -#define END(x) \ - .end _C_LABEL(x) - -#define STAND_FRAME_SIZE 24 -#define STAND_RA_OFFSET 20 - -/* - * Macros to panic and printf from assembly language. - */ -#define PANIC(msg) \ - la a0, 9f; \ - jal _C_LABEL(panic); \ - MSG(msg) - -#define PRINTF(msg) \ - la a0, 9f; \ - jal _C_LABEL(printf); \ - MSG(msg) - -#define MSG(msg) \ - .rdata; \ -9: .asciiz msg; \ - .text - -#define ASMSTR(str) \ - .asciiz str; \ - .align 2 - -#endif /* _MACHASMDEFS */ +#include diff --git a/sys/arch/pmax/include/machConst.h b/sys/arch/pmax/include/machConst.h index e2e83c8d06b..eda5e7897af 100644 --- a/sys/arch/pmax/include/machConst.h +++ b/sys/arch/pmax/include/machConst.h @@ -1,4 +1,4 @@ -/* $NetBSD: machConst.h,v 1.4 1994/10/26 21:09:45 cgd Exp $ */ +/* $NetBSD: machConst.h,v 1.5 1996/03/28 11:34:05 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -72,27 +72,102 @@ #define MACH_UNCACHED_TO_PHYS(x) ((unsigned)(x) & 0x1fffffff) #define MACH_PHYS_TO_UNCACHED(x) ((unsigned)(x) | MACH_UNCACHED_MEMORY_ADDR) +/* Map virtual address to index in r4k virtually-indexed cache */ +#define MIPS_R4K_VA_TO_CINDEX(x) \ + ((unsigned)(x) & 0xffffff | MACH_CACHED_MEMORY_ADDR) + +/* XXX compatibility with Pica port */ +#define MACH_VA_TO_CINDEX(x) MIPS_R4K_VA_TO_CINDEX(x) + + +/* + * XXX + * Port-specific constants: + * Kernel virtual address at which kernel is loaded, and + * Kernel virtual address for user page table entries + * (i.e., the address for the context register). + */ +#ifdef pmax #define MACH_CODE_START 0x80030000 +#define VMMACH_PTE_BASE 0xFFC00000 +#endif /* pmax */ + +#ifdef pica +#define MACH_CODE_START 0x80080000 +#define VMMACH_PTE_BASE 0xFF800000 +#endif /* pica */ + + /* * The bits in the cause register. * + * Bits common to r3000 and r4000: + * * MACH_CR_BR_DELAY Exception happened in branch delay slot. * MACH_CR_COP_ERR Coprocessor error. - * Interrupt pending bits defined below. + * MACH_CR_IP Interrupt pending bits defined below. + * (same meaning as in CAUSE register). * MACH_CR_EXC_CODE The exception type (see exception codes below). + * + * Differences: + * r3k has 4 bits of execption type, r4k has 5 bits. */ #define MACH_CR_BR_DELAY 0x80000000 #define MACH_CR_COP_ERR 0x30000000 -#define MACH_CR_EXC_CODE 0x0000003C +#define MIPS_3K_CR_EXC_CODE 0x0000003C +#define MIPS_4K_CR_EXC_CODE 0x0000007C +#define MACH_CR_IP 0x0000FF00 #define MACH_CR_EXC_CODE_SHIFT 2 +#ifdef pmax /* XXX not used any more, only to satisfy regression tests */ +#define MACH_CR_EXC_CODE MIPS_3K_CR_EXC_CODE +#endif /* pmax */ +#ifdef pica +#define MACH_CR_EXC_CODE MIPS_4K_CR_EXC_CODE +#endif /* pica */ + + /* * The bits in the status register. All bits are active when set to 1. * + * R3000 status register fields: * MACH_SR_CO_USABILITY Control the usability of the four coprocessors. * MACH_SR_BOOT_EXC_VEC Use alternate exception vectors. * MACH_SR_TLB_SHUTDOWN TLB disabled. + * + * MIPS_SR_INT_IE Master (current) interrupt enable bit. + * + * Differences: + * r3k has cache control is via frobbing SR register bits, whereas the + * r4k cache control is via explicit instructions. + * r3k has a 3-entry stack of kernel/user bits, whereas the + * r4k has kernel/supervisor/user. + */ +#define MACH_SR_COP_USABILITY 0xf0000000 +#define MACH_SR_COP_0_BIT 0x10000000 +#define MACH_SR_COP_1_BIT 0x20000000 + + /* r4k and r3k differences, see below */ + +#define MACH_SR_BOOT_EXC_VEC 0x00400000 +#define MACH_SR_TLB_SHUTDOWN 0x00200000 + + /* r4k and r3k differences, see below */ + +#define MIPS_SR_INT_IE 0x00000001 +/*#define MACH_SR_MBZ 0x0f8000c0*/ /* Never used, true for r3k */ +/*#define MACH_SR_INT_MASK 0x0000ff00*/ + +#define MACH_SR_INT_ENAB MIPS_SR_INT_IE /* backwards compatibility */ +#define MACH_SR_INT_ENA_CUR MIPS_SR_INT_IE /* backwards compatibility */ + + + +/* + * The R2000/R3000-specific status register bit definitions. + * all bits are active when set to 1. + * * MACH_SR_PARITY_ERR Parity error. * MACH_SR_CACHE_MISS Most recent D-cache load resulted in a miss. * MACH_SR_PARITY_ZERO Zero replaces outgoing parity bits. @@ -104,60 +179,173 @@ * MACH_SR_KU_PREV Previous kernel/user mode bit. 1 => user mode. * MACH_SR_INT_ENA_PREV Previous interrupt enable bit. * MACH_SR_KU_CUR Current kernel/user mode bit. 1 => user mode. - * MACH_SR_INT_ENA_CUR Current interrupt enable bit. */ -#define MACH_SR_COP_USABILITY 0xf0000000 -#define MACH_SR_COP_0_BIT 0x10000000 -#define MACH_SR_COP_1_BIT 0x20000000 -#define MACH_SR_BOOT_EXC_VEC 0x00400000 -#define MACH_SR_TLB_SHUTDOWN 0x00200000 -#define MACH_SR_PARITY_ERR 0x00100000 -#define MACH_SR_CACHE_MISS 0x00080000 -#define MACH_SR_PARITY_ZERO 0x00040000 -#define MACH_SR_SWAP_CACHES 0x00020000 -#define MACH_SR_ISOL_CACHES 0x00010000 -#define MACH_SR_KU_OLD 0x00000020 -#define MACH_SR_INT_ENA_OLD 0x00000010 -#define MACH_SR_KU_PREV 0x00000008 -#define MACH_SR_INT_ENA_PREV 0x00000004 -#define MACH_SR_KU_CUR 0x00000002 -#define MACH_SR_INT_ENA_CUR 0x00000001 -#define MACH_SR_MBZ 0x0f8000c0 + +#define MIPS_3K_PARITY_ERR 0x00100000 +#define MIPS_3K_CACHE_MISS 0x00080000 +#define MIPS_3K_PARITY_ZERO 0x00040000 +#define MIPS_3K_SWAP_CACHES 0x00020000 +#define MIPS_3K_ISOL_CACHES 0x00010000 + +#define MIPS_3K_SR_KU_OLD 0x00000020 /* 2nd stacked KU/IE*/ +#define MIPS_3K_SR_INT_ENA_OLD 0x00000010 /* 2nd stacked KU/IE*/ +#define MIPS_3K_SR_KU_PREV 0x00000008 /* 1st stacked KU/IE*/ +#define MIPS_3K_SR_INT_ENA_PREV 0x00000004 /* 1st stacked KU/IE*/ +#define MIPS_3K_SR_KU_CUR 0x00000002 /* current KU */ + +/* backwards compatibility */ +#define MACH_SR_PARITY_ERR MIPS_3K_PARITY_ERR +#define MACH_SR_CACHE_MISS MIPS_3K_CACHE_MISS +#define MACH_SR_PARITY_ZERO MIPS_3K_PARITY_ZERO +#define MACH_SR_SWAP_CACHES MIPS_3K_SWAP_CACHES +#define MACH_SR_ISOL_CACHES MIPS_3K_ISOL_CACHES + +#define MACH_SR_KU_OLD MIPS_3K_SR_KU_OLD +#define MACH_SR_INT_ENA_OLD MIPS_3K_SR_INT_ENA_OLD +#define MACH_SR_KU_PREV MIPS_3K_SR_KU_PREV +#define MACH_SR_KU_CUR MIPS_3K_SR_KU_CUR +#define MACH_SR_INT_ENA_PREV MIPS_3K_SR_INT_ENA_PREV + + +/* + * R4000 status register bit definitons, + * where different from r2000/r3000. + */ +#define MIPS_4K_SR_RP 0x08000000 +#define MIPS_4K_SR_FR_32 0x04000000 +#define MIPS_4K_SR_RE 0x02000000 + +#define MIPS_4K_SR_SOFT_RESET 0x00100000 +#define MIPS_4K_SR_DIAG_CH 0x00040000 +#define MIPS_4K_SR_DIAG_CE 0x00020000 +#define MIPS_4K_SR_DIAG_PE 0x00010000 +#define MIPS_4K_SR_KX 0x00000080 +#define MIPS_4K_SR_SX 0x00000040 +#define MIPS_4K_SR_UX 0x00000020 +#define MIPS_4K_SR_KSU_MASK 0x00000018 +#define MIPS_4K_SR_KSU_USER 0x00000010 +#define MIPS_4K_SR_KSU_SUPER 0x00000008 +#define MIPS_4K_SR_KSU_KERNEL 0x00000000 +#define MIPS_4K_SR_ERL 0x00000004 +#define MIPS_4K_SR_EXL 0x00000002 + +/* backwards compatibility with names used in Pica port */ +#define MACH_SR_RP MIPS_4K_SR_RP +#define MACH_SR_FR_32 MIPS_4K_SR_FR_32 +#define MACH_SR_RE MIPS_4K_SR_RE + +#define MACH_SR_SOFT_RESET MIPS_4K_SR_SOFT_RESET +#define MACH_SR_DIAG_CH MIPS_4K_SR_DIAG_CH +#define MACH_SR_DIAG_CE MIPS_4K_SR_DIAG_CE +#define MACH_SR_DIAG_PE MIPS_4K_SR_DIAG_PE +#define MACH_SR_KX MIPS_4K_SR_KX +#define MACH_SR_SX MIPS_4K_SR_SX +#define MACH_SR_UX MIPS_4K_SR_UX + +#define MACH_SR_KSU_MASK MIPS_4K_SR_KSU_MASK +#define MACH_SR_KSU_USER MIPS_4K_SR_KSU_USER +#define MACH_SR_KSU_SUPER MIPS_4K_SR_KSU_SUPER +#define MACH_SR_KSU_KERNEL MIPS_4K_SR_KSU_KERNEL +#define MACH_SR_ERL MIPS_4K_SR_ERL +#define MACH_SR_EXL MIPS_4K_SR_EXL + /* * The interrupt masks. * If a bit in the mask is 1 then the interrupt is enabled (or pending). */ -#define MACH_INT_MASK 0xff00 +#define MIPS_INT_MASK 0xff00 #define MACH_INT_MASK_5 0x8000 #define MACH_INT_MASK_4 0x4000 #define MACH_INT_MASK_3 0x2000 #define MACH_INT_MASK_2 0x1000 #define MACH_INT_MASK_1 0x0800 #define MACH_INT_MASK_0 0x0400 -#define MACH_HARD_INT_MASK 0xfc00 +#define MIPS_HARD_INT_MASK 0xfc00 #define MACH_SOFT_INT_MASK_1 0x0200 #define MACH_SOFT_INT_MASK_0 0x0100 +#ifdef pmax +#define MACH_INT_MASK MIPS_INT_MASK +#define MACH_HARD_INT_MASK MIPS_HARD_INT_MASK +#endif + +/* r4000 has on-chip timer at INT_MASK_5 */ +#ifdef pica +#define MACH_INT_MASK (MIPS_INT_MASK & ~MACH_INT_MASK_5) +#define MACH_HARD_INT_MASK (MIPS_HARD_INT_MASK & ~MACH_INT_MASK_5) +#endif + + + /* * The bits in the context register. */ -#define MACH_CNTXT_PTE_BASE 0xFFE00000 -#define MACH_CNTXT_BAD_VPN 0x001FFFFC +#define MIPS_3K_CNTXT_PTE_BASE 0xFFE00000 +#define MIPS_3K_CNTXT_BAD_VPN 0x001FFFFC + +#define MIPS_4K_CNTXT_PTE_BASE 0xFF800000 +#define MIPS_4K_CNTXT_BAD_VPN2 0x007FFFF0 + +/* + * Backwards compatbility -- XXX more thought + */ +#ifdef pmax +#define MACH_CNTXT_PTE_BASE MIPS_3K_CNTXT_PTE_BASE +#define MACH_CNTXT_BAD_VPN MIPS_3K_CNTXT_BAD_VPN +#endif /* pmax */ + +#ifdef pica +#define MACH_CNTXT_PTE_BASE MIPS_4K_CNTXT_PTE_BASE +#define MACH_CNTXT_BAD_VPN2 MIPS_4K_CNTXT_BAD_VPN2 +#endif /* pica */ + + /* * Location of exception vectors. + * + * Common vectors: reset and UTLB miss. */ #define MACH_RESET_EXC_VEC 0xBFC00000 #define MACH_UTLB_MISS_EXC_VEC 0x80000000 -#define MACH_GEN_EXC_VEC 0x80000080 + +/* + * R3000 general exception vector (everything else) + */ +#define MIPS_3K_GEN_EXC_VEC 0x80000080 + +/* + * R4000 MIPS-III exception vectors + */ +#define MIPS_4K_XTLB_MISS_EXC_VEC 0x80000080 +#define MIPS_4K_CACHE_ERR_EXC_VEC 0x80000100 +#define MIPS_4K_GEN_EXC_VEC 0x80000180 + +/* + * Backwards compatbility -- XXX more thought + */ +#ifdef pmax +#define MACH_GEN_EXC_VEC MIPS_3K_GEN_EXC_VEC +#endif /* pmax */ + +#ifdef pica +#define MACH_GEN_EXC_VEC MIPS_4K_GEN_EXC_VEC +#define MACH_TLB_MISS_EXC_VEC MACH_UTLB_MISS_EXC_VEC /* locore compat */ +#define MACH_XTLB_MISS_EXC_VEC MIPS_4K_XTLB_MISS_EXC_VEC +#define MACH_CACHE_ERR_EXC_VEC MIPS_4K_CACHE_ERR_EXC_VEC +#endif /* pica */ + + /* * Coprocessor 0 registers: * * MACH_COP_0_TLB_INDEX TLB index. * MACH_COP_0_TLB_RANDOM TLB random. - * MACH_COP_0_TLB_LOW TLB entry low. + * MACH_COP_0_TLB_LOW r3k TLB entry low. + * MACH_COP_0_TLB_LO0 r4k TLB entry low. + * MACH_COP_0_TLB_LO1 r4k TLB entry low, extended. * MACH_COP_0_TLB_CONTEXT TLB context. * MACH_COP_0_BAD_VADDR Bad virtual address. * MACH_COP_0_TLB_HI TLB entry high. @@ -168,8 +356,10 @@ */ #define MACH_COP_0_TLB_INDEX $0 #define MACH_COP_0_TLB_RANDOM $1 -#define MACH_COP_0_TLB_LOW $2 + /* Name and meaning of TLB bits for $2 differ on r3k and r4k. */ + #define MACH_COP_0_TLB_CONTEXT $4 + /* $5 and $6 new with MIPS-III */ #define MACH_COP_0_BAD_VADDR $8 #define MACH_COP_0_TLB_HI $10 #define MACH_COP_0_STATUS_REG $12 @@ -177,6 +367,30 @@ #define MACH_COP_0_EXC_PC $14 #define MACH_COP_0_PRID $15 + +/* r3k-specific */ +#define MACH_COP_0_TLB_LOW $2 + +/* MIPS-III additions */ +#define MACH_COP_0_TLB_LO0 $2 +#define MACH_COP_0_TLB_LO1 $3 + +#define MACH_COP_0_TLB_PG_MASK $5 +#define MACH_COP_0_TLB_WIRED $6 + +#define MACH_COP_0_CONFIG $16 +#define MACH_COP_0_LLADDR $17 +#define MACH_COP_0_WATCH_LO $18 +#define MACH_COP_0_WATCH_HI $19 +#define MACH_COP_0_TLB_XCONTEXT $20 +#define MACH_COP_0_ECC $26 +#define MACH_COP_0_CACHE_ERR $27 +#define MACH_COP_0_TAG_LO $28 +#define MACH_COP_0_TAG_HI $29 +#define MACH_COP_0_ERROR_PC $30 + + + /* * Values for the code field in a break instruction. */ @@ -186,12 +400,15 @@ #define MACH_BREAK_KDB_VAL 512 #define MACH_BREAK_SSTEP_VAL 513 #define MACH_BREAK_BRKPT_VAL 514 +#define MACH_BREAK_SOVER_VAL 515 #define MACH_BREAK_KDB (MACH_BREAK_INSTR | \ (MACH_BREAK_KDB_VAL << MACH_BREAK_VAL_SHIFT)) #define MACH_BREAK_SSTEP (MACH_BREAK_INSTR | \ (MACH_BREAK_SSTEP_VAL << MACH_BREAK_VAL_SHIFT)) #define MACH_BREAK_BRKPT (MACH_BREAK_INSTR | \ (MACH_BREAK_BRKPT_VAL << MACH_BREAK_VAL_SHIFT)) +#define MACH_BREAK_SOVER (MACH_BREAK_INSTR | \ + (MACH_BREAK_SOVER_VAL << MACH_BREAK_VAL_SHIFT)) /* * Mininum and maximum cache sizes. @@ -233,7 +450,10 @@ #define MACH_FPC_EXCEPTION_INVALID 0x00010000 #define MACH_FPC_EXCEPTION_UNIMPL 0x00020000 #define MACH_FPC_COND_BIT 0x00800000 -#define MACH_FPC_MBZ_BITS 0xff7c0000 +#define MACH_FPC_FLUSH_BIT 0x01000000 /* r4k, MBZ on r3k */ +#define MIPS_3K_FPC_MBZ_BITS 0xff7c0000 +#define MIPS_4K_FPC_MBZ_BITS 0xfe7c0000 + /* * Constants to determine if have a floating point instruction. @@ -241,40 +461,117 @@ #define MACH_OPCODE_SHIFT 26 #define MACH_OPCODE_C1 0x11 + + /* * The low part of the TLB entry. */ -#define VMMACH_TLB_PF_NUM 0xfffff000 -#define VMMACH_TLB_NON_CACHEABLE_BIT 0x00000800 -#define VMMACH_TLB_MOD_BIT 0x00000400 -#define VMMACH_TLB_VALID_BIT 0x00000200 -#define VMMACH_TLB_GLOBAL_BIT 0x00000100 +#define VMMACH_MIPS_3K_TLB_PHYS_PAGE_SHIFT 12 +#define VMMACH_MIPS_3K_TLB_PF_NUM 0xfffff000 +#define VMMACH_MIPS_3K_TLB_NON_CACHEABLE_BIT 0x00000800 +#define VMMACH_MIPS_3K_TLB_MOD_BIT 0x00000400 +#define VMMACH_MIPS_3K_TLB_VALID_BIT 0x00000200 +#define VMMACH_MIPS_3K_TLB_GLOBAL_BIT 0x00000100 + +#define VMMACH_MIPS_4K_TLB_PHYS_PAGE_SHIFT 6 +#define VMMACH_MIPS_4K_TLB_PF_NUM 0x3fffffc0 +#define VMMACH_MIPS_4K_TLB_ATTR_MASK 0x00000038 +#define VMMACH_MIPS_4K_TLB_MOD_BIT 0x00000004 +#define VMMACH_MIPS_4K_TLB_VALID_BIT 0x00000002 +#define VMMACH_MIPS_4K_TLB_GLOBAL_BIT 0x00000001 + + +#ifdef pmax /* XXX */ +#define VMMACH_TLB_PHYS_PAGE_SHIFT VMMACH_MIPS_3K_TLB_PHYS_PAGE_SHIFT +#define VMMACH_TLB_PF_NUM VMMACH_MIPS_3K_TLB_PF_NUM +#define VMMACH_TLB_NON_CACHEABLE_BIT VMMACH_MIPS_3K_TLB_NON_CACHEABLE_BIT +#define VMMACH_TLB_MOD_BIT VMMACH_MIPS_3K_TLB_MOD_BIT +#define VMMACH_TLB_VALID_BIT VMMACH_MIPS_3K_TLB_VALID_BIT +#define VMMACH_TLB_GLOBAL_BIT VMMACH_MIPS_3K_TLB_GLOBAL_BIT +#endif /* pmax */ + +#ifdef pica /* XXX */ +#define VMMACH_TLB_PHYS_PAGE_SHIFT VMMACH_MIPS_4K_TLB_PHYS_PAGE_SHIFT +#define VMMACH_TLB_PF_NUM VMMACH_MIPS_4K_TLB_PF_NUM +#define VMMACH_TLB_ATTR_MASK VMMACH_MIPS_4K_TLB_ATTR_MASK +#define VMMACH_TLB_MOD_BIT VMMACH_MIPS_4K_TLB_MOD_BIT +#define VMMACH_TLB_VALID_BIT VMMACH_MIPS_4K_TLB_VALID_BIT +#define VMMACH_TLB_GLOBAL_BIT VMMACH_MIPS_4K_TLB_GLOBAL_BIT +#endif /* pica */ + -#define VMMACH_TLB_PHYS_PAGE_SHIFT 12 /* * The high part of the TLB entry. */ -#define VMMACH_TLB_VIRT_PAGE_NUM 0xfffff000 -#define VMMACH_TLB_PID 0x00000fc0 -#define VMMACH_TLB_PID_SHIFT 6 -#define VMMACH_TLB_VIRT_PAGE_SHIFT 12 +#define VMMACH_TLB_VIRT_PAGE_SHIFT 12 + +#define VMMACH_TLB_MIPS_3K_VIRT_PAGE_NUM 0xfffff000 +#define VMMACH_TLB_MIPS_3K_PID 0x00000fc0 +#define VMMACH_TLB_MIPS_3K_PID_SHIFT 6 +#define VMMACH_TLB_MIPS_4K_VIRT_PAGE_NUM 0xffffe000 +#define VMMACH_TLB_MIPS_4K_PID 0x000000ff +#define VMMACH_TLB_MIPS_4K_PID_SHIFT 0 + +/* XXX needs more thought */ /* - * The shift to put the index in the right spot. + * backwards XXX needs more thought, should support runtime decisions. + */ + +#ifdef pmax +#define VMMACH_TLB_VIRT_PAGE_NUM VMMACH_TLB_MIPS_3K_VIRT_PAGE_NUM +#define VMMACH_TLB_PID VMMACH_TLB_MIPS_3K_PID +#define VMMACH_TLB_PID_SHIFT VMMACH_TLB_MIPS_3K_PID_SHIFT +#endif + +#ifdef pica +#define VMMACH_TLB_VIRT_PAGE_NUM VMMACH_TLB_MIPS_4K_VIRT_PAGE_NUM +#define VMMACH_TLB_PID VMMACH_TLB_MIPS_4K_PID +#define VMMACH_TLB_PID_SHIFT VMMACH_TLB_MIPS_4K_PID_SHIFT +#endif + +/* + * r3000: shift count to put the index in the right spot. + * (zero on r4000?) */ #define VMMACH_TLB_INDEX_SHIFT 8 + /* * The number of TLB entries and the first one that write random hits. */ -#define VMMACH_NUM_TLB_ENTRIES 64 -#define VMMACH_FIRST_RAND_ENTRY 8 +#define VMMACH_MIPS_3K_NUM_TLB_ENTRIES 64 +#define VMMACH_MIPS_3K_FIRST_RAND_ENTRY 8 + +#define VMMACH_MIPS_4K_NUM_TLB_ENTRIES 48 +#define VMMACH_MIPS_4K_WIRED_ENTRIES 8 + +/* compatibility with existing locore -- XXX more thought */ +#ifdef pmax +#define VMMACH_NUM_TLB_ENTRIES VMMACH_MIPS_3K_NUM_TLB_ENTRIES +#define VMMACH_FIRST_RAND_ENTRY VMMACH_MIPS_3K_FIRST_RAND_ENTRY +#endif /* pmax */ + +#ifdef pica +#define VMMACH_NUM_TLB_ENTRIES VMMACH_MIPS_4K_NUM_TLB_ENTRIES +#define VMMACH_WIRED_ENTRIES VMMACH_MIPS_4K_WIRED_ENTRIES +#endif /* pica */ + /* * The number of process id entries. */ -#define VMMACH_NUM_PIDS 64 +#define VMMACH_MIPS_3K_NUM_PIDS 64 +#define VMMACH_MIPS_4K_NUM_PIDS 256 + +#ifdef pmax +#define VMMACH_NUM_PIDS VMMACH_MIPS_3K_NUM_PIDS +#endif /* pmax */ +#ifdef pica +#define VMMACH_NUM_PIDS VMMACH_MIPS_4K_NUM_PIDS +#endif /* pica */ + /* * TLB probe return codes. @@ -284,10 +581,4 @@ #define VMMACH_TLB_FOUND_WITH_PATCH 2 #define VMMACH_TLB_PROBE_ERROR 3 -/* - * Kernel virtual address for user page table entries - * (i.e., the address for the context register). - */ -#define VMMACH_PTE_BASE 0xFFC00000 - #endif /* _MACHCONST */ diff --git a/sys/arch/pmax/include/mips_opcode.h b/sys/arch/pmax/include/mips_opcode.h index ae4612a9865..44b968860db 100644 --- a/sys/arch/pmax/include/mips_opcode.h +++ b/sys/arch/pmax/include/mips_opcode.h @@ -1,196 +1,8 @@ -/* $NetBSD: mips_opcode.h,v 1.4 1994/10/26 21:09:46 cgd Exp $ */ - -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)mips_opcode.h 8.1 (Berkeley) 6/10/93 - */ +/* $NetBSD: mips_opcode.h,v 1.6 1996/03/23 19:10:06 jonathan Exp $ */ /* * Define the instruction formats and opcode values for the * MIPS instruction set. */ -/* - * Define the instruction formats. - */ -typedef union { - unsigned word; - -#if BYTE_ORDER == LITTLE_ENDIAN - struct { - unsigned imm: 16; - unsigned rt: 5; - unsigned rs: 5; - unsigned op: 6; - } IType; - - struct { - unsigned target: 26; - unsigned op: 6; - } JType; - - struct { - unsigned func: 6; - unsigned shamt: 5; - unsigned rd: 5; - unsigned rt: 5; - unsigned rs: 5; - unsigned op: 6; - } RType; - - struct { - unsigned func: 6; - unsigned fd: 5; - unsigned fs: 5; - unsigned ft: 5; - unsigned fmt: 4; - unsigned : 1; /* always '1' */ - unsigned op: 6; /* always '0x11' */ - } FRType; -#endif -} InstFmt; - -/* - * Values for the 'op' field. - */ -#define OP_SPECIAL 000 -#define OP_BCOND 001 -#define OP_J 002 -#define OP_JAL 003 -#define OP_BEQ 004 -#define OP_BNE 005 -#define OP_BLEZ 006 -#define OP_BGTZ 007 - -#define OP_ADDI 010 -#define OP_ADDIU 011 -#define OP_SLTI 012 -#define OP_SLTIU 013 -#define OP_ANDI 014 -#define OP_ORI 015 -#define OP_XORI 016 -#define OP_LUI 017 - -#define OP_COP0 020 -#define OP_COP1 021 -#define OP_COP2 022 -#define OP_COP3 023 - -#define OP_LB 040 -#define OP_LH 041 -#define OP_LWL 042 -#define OP_LW 043 -#define OP_LBU 044 -#define OP_LHU 045 -#define OP_LWR 046 - -#define OP_SB 050 -#define OP_SH 051 -#define OP_SWL 052 -#define OP_SW 053 -#define OP_SWR 056 - -#define OP_LWC0 060 -#define OP_LWC1 061 -#define OP_LWC2 062 -#define OP_LWC3 063 - -#define OP_SWC0 070 -#define OP_SWC1 071 -#define OP_SWC2 072 -#define OP_SWC3 073 - -/* - * Values for the 'func' field when 'op' == OP_SPECIAL. - */ -#define OP_SLL 000 -#define OP_SRL 002 -#define OP_SRA 003 -#define OP_SLLV 004 -#define OP_SRLV 006 -#define OP_SRAV 007 - -#define OP_JR 010 -#define OP_JALR 011 -#define OP_SYSCALL 014 -#define OP_BREAK 015 - -#define OP_MFHI 020 -#define OP_MTHI 021 -#define OP_MFLO 022 -#define OP_MTLO 023 - -#define OP_MULT 030 -#define OP_MULTU 031 -#define OP_DIV 032 -#define OP_DIVU 033 - -#define OP_ADD 040 -#define OP_ADDU 041 -#define OP_SUB 042 -#define OP_SUBU 043 -#define OP_AND 044 -#define OP_OR 045 -#define OP_XOR 046 -#define OP_NOR 047 - -#define OP_SLT 052 -#define OP_SLTU 053 - -/* - * Values for the 'func' field when 'op' == OP_BCOND. - */ -#define OP_BLTZ 000 -#define OP_BGEZ 001 -#define OP_BLTZAL 020 -#define OP_BGEZAL 021 - -/* - * Values for the 'rs' field when 'op' == OP_COPz. - */ -#define OP_MF 000 -#define OP_MT 004 -#define OP_BCx 010 -#define OP_BCy 014 -#define OP_CF 002 -#define OP_CT 006 - -/* - * Values for the 'rt' field when 'op' == OP_COPz. - */ -#define COPz_BC_TF_MASK 0x01 -#define COPz_BC_TRUE 0x01 -#define COPz_BC_FALSE 0x00 +#include diff --git a/sys/arch/pmax/include/param.h b/sys/arch/pmax/include/param.h index 5e8c41ea55a..69e3cbff851 100644 --- a/sys/arch/pmax/include/param.h +++ b/sys/arch/pmax/include/param.h @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.12 1995/07/23 20:11:55 jonathan Exp $ */ +/* $NetBSD: param.h,v 1.17 1996/05/20 10:50:52 jonathan Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -43,28 +43,20 @@ */ /* - * Machine dependent constants for DEC Station 3100. + * Machine-dependent constants (VM, etc) common across MIPS cpus */ -#define MACHINE "pmax" -#define MACHINE_ARCH "mips" -#define MID_MACHINE MID_PMAX + +#include /* - * Round p (pointer or byte index) up to a correctly-aligned value for all - * data types (int, long, ...). The result is u_int and must be cast to - * any desired pointer type. + * Machine dependent constants for DEC Station 3100. */ -#define ALIGNBYTES 7 -#define ALIGN(p) (((u_int)(p) + ALIGNBYTES) &~ ALIGNBYTES) - -#define NBPG 4096 /* bytes/page */ -#define PGOFSET (NBPG-1) /* byte offset into page */ -#define PGSHIFT 12 /* LOG2(NBPG) */ -#define NPTEPG (NBPG/4) -#define NBSEG 0x400000 /* bytes/segment */ -#define SEGOFSET (NBSEG-1) /* byte offset into segment */ -#define SEGSHIFT 22 /* LOG2(NBSEG) */ +#define _MACHINE pmax +#define MACHINE "pmax" +#define _MACHINE_ARCH mips +#define MACHINE_ARCH "mips" +#define MID_MACHINE MID_PMAX #define KERNBASE 0x80000000 /* start of kernel virtual */ #define KERNTEXTOFF 0x80030000 /* start of kernel text for kvm_mkdb */ @@ -101,59 +93,15 @@ #define MCLOFSET (MCLBYTES - 1) #ifndef NMBCLUSTERS #ifdef GATEWAY -#define NMBCLUSTERS 512 /* map size, max cluster allocation */ +#define NMBCLUSTERS 2048 /* map size, max cluster allocation */ #else -#define NMBCLUSTERS 256 /* map size, max cluster allocation */ +#define NMBCLUSTERS 1024 /* map size, max cluster allocation */ #endif #endif -/* - * Size of kernel malloc arena in CLBYTES-sized logical pages - */ -#ifndef NKMEMCLUSTERS -#define NKMEMCLUSTERS (512*1024/CLBYTES) -#endif - -/* pages ("clicks") (4096 bytes) to disk blocks */ -#define ctod(x) ((x) << (PGSHIFT - DEV_BSHIFT)) -#define dtoc(x) ((x) >> (PGSHIFT - DEV_BSHIFT)) - -/* pages to bytes */ -#define ctob(x) ((x) << PGSHIFT) -#define btoc(x) (((x) + PGOFSET) >> PGSHIFT) - -/* bytes to disk blocks */ -#define btodb(x) ((x) >> DEV_BSHIFT) -#define dbtob(x) ((x) << DEV_BSHIFT) - -/* - * Map a ``block device block'' to a file system block. - * This should be device dependent, and should use the bsize - * field from the disk label. - * For now though just use DEV_BSIZE. - */ -#define bdbtofsb(bn) ((bn) / (BLKDEV_IOSIZE/DEV_BSIZE)) - -/* - * Mach derived conversion macros - */ -#define pmax_round_page(x) ((((unsigned)(x)) + NBPG - 1) & ~(NBPG-1)) -#define pmax_trunc_page(x) ((unsigned)(x) & ~(NBPG-1)) -#define pmax_btop(x) ((unsigned)(x) >> PGSHIFT) -#define pmax_ptob(x) ((unsigned)(x) << PGSHIFT) - #ifdef _KERNEL -#ifndef LOCORE -extern int (*Mach_splnet) __P((void)), (*Mach_splbio) __P((void)), - (*Mach_splimp) __P((void)), (*Mach_spltty) __P((void)), - (*Mach_splclock) __P((void)), (*Mach_splstatclock) __P((void)); -#define splnet() ((*Mach_splnet)()) -#define splbio() ((*Mach_splbio)()) -#define splimp() ((*Mach_splimp)()) -#define spltty() ((*Mach_spltty)()) -#define splclock() ((*Mach_splclock)()) -#define splstatclock() ((*Mach_splstatclock)()) -extern int cpuspeed; +#ifndef _LOCORE +extern int cpuspeed; #define DELAY(n) { register int N = cpuspeed * (n); while (--N > 0); } #endif #endif /* !_KERNEL */ diff --git a/sys/arch/pmax/include/pcb.h b/sys/arch/pmax/include/pcb.h index 9f59b6f35ef..8de6211784c 100644 --- a/sys/arch/pmax/include/pcb.h +++ b/sys/arch/pmax/include/pcb.h @@ -1,62 +1,3 @@ -/* $NetBSD: pcb.h,v 1.5 1995/01/18 06:39:43 mellon Exp $ */ +/* $NetBSD: pcb.h,v 1.7 1996/03/19 03:07:49 jonathan Exp $ */ -/* - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: pcb.h 1.13 89/04/23 - * - * @(#)pcb.h 8.1 (Berkeley) 6/10/93 - */ - -/* - * PMAX process control block - */ -struct pcb -{ - int pcb_regs[71]; /* saved CPU and floating point registers */ - label_t pcb_context; /* kernel context for resume */ - int pcb_onfault; /* for copyin/copyout faults */ - void *pcb_segtab; /* copy of pmap pm_segtab */ -}; - -/* - * The pcb is augmented with machine-dependent additional data for - * core dumps. For the PMAX, there is nothing to add. - */ -struct md_coredump { - long md_pad[8]; -}; +#include diff --git a/sys/arch/pmax/include/pmap.h b/sys/arch/pmax/include/pmap.h index 392b00aff3a..fba34a17110 100644 --- a/sys/arch/pmax/include/pmap.h +++ b/sys/arch/pmax/include/pmap.h @@ -1,105 +1,6 @@ -/* $NetBSD: pmap.h,v 1.8 1995/04/12 01:55:35 mellon Exp $ */ +/* $NetBSD: pmap.h,v 1.10 1996/03/19 04:39:05 jonathan Exp $ */ -/* - * Copyright (c) 1987 Carnegie-Mellon University - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)pmap.h 8.1 (Berkeley) 6/10/93 - */ +#include -#ifndef _PMAP_MACHINE_ -#define _PMAP_MACHINE_ - -/* - * The user address space is 2Gb (0x0 - 0x80000000). - * User programs are laid out in memory as follows: - * address - * USRTEXT 0x00001000 - * USRDATA USRTEXT + text_size - * USRSTACK 0x7FFFFFFF - * - * The user address space is mapped using a two level structure where - * virtual address bits 30..22 are used to index into a segment table which - * points to a page worth of PTEs (4096 page can hold 1024 PTEs). - * Bits 21..12 are then used to index a PTE which describes a page within - * a segment. - * - * The wired entries in the TLB will contain the following: - * 0-1 (UPAGES) for curproc user struct and kernel stack. - * - * Note: The kernel doesn't use the same data structures as user programs. - * All the PTE entries are stored in a single array in Sysmap which is - * dynamically allocated at boot time. - */ - -#define pmax_trunc_seg(x) ((vm_offset_t)(x) & ~SEGOFSET) -#define pmax_round_seg(x) (((vm_offset_t)(x) + SEGOFSET) & ~SEGOFSET) -#define pmap_segmap(m, v) ((m)->pm_segtab->seg_tab[((v) >> SEGSHIFT)]) - -#define PMAP_SEGTABSIZE 512 - -union pt_entry; - -struct segtab { - union pt_entry *seg_tab[PMAP_SEGTABSIZE]; -}; - -/* - * Machine dependent pmap structure. - */ -typedef struct pmap { - int pm_count; /* pmap reference count */ - simple_lock_data_t pm_lock; /* lock on pmap */ - struct pmap_statistics pm_stats; /* pmap statistics */ - int pm_tlbpid; /* address space tag */ - u_int pm_tlbgen; /* TLB PID generation number */ - struct segtab *pm_segtab; /* pointers to pages of PTEs */ -} *pmap_t; - -/* - * Defines for pmap_attributes[phys_mach_page]; - */ -#define PMAP_ATTR_MOD 0x01 /* page has been modified */ -#define PMAP_ATTR_REF 0x02 /* page has been referenced */ - -#ifdef _KERNEL -char *pmap_attributes; /* reference and modify bits */ -struct pmap kernel_pmap_store; - -#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) -#define pmap_kernel() (&kernel_pmap_store) -#endif /* _KERNEL */ - -#endif /* _PMAP_MACHINE_ */ +#define pmax_trunc_seg(a) mips_trunc_seg(a) +#define pmax_round_seg(a) mips_round_seg(a) diff --git a/sys/arch/pmax/include/proc.h b/sys/arch/pmax/include/proc.h index 202d9562314..b722ad6088b 100644 --- a/sys/arch/pmax/include/proc.h +++ b/sys/arch/pmax/include/proc.h @@ -1,53 +1,3 @@ -/* $NetBSD: proc.h,v 1.4 1994/10/26 21:09:52 cgd Exp $ */ +/* $NetBSD: proc.h,v 1.5 1996/03/19 03:08:08 jonathan Exp $ */ -/* - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)proc.h 8.1 (Berkeley) 6/10/93 - */ - -/* - * Machine-dependent part of the proc structure for DEC Station. - */ -struct mdproc { - int *md_regs; /* registers on current frame */ - int md_flags; /* machine-dependent flags */ - int md_upte[UPAGES]; /* ptes for mapping u page */ - int md_ss_addr; /* single step address for ptrace */ - int md_ss_instr; /* single step instruction for ptrace */ -}; - -/* md_flags */ -#define MDP_FPUSED 0x0001 /* floating point coprocessor used */ +#include diff --git a/sys/arch/pmax/include/profile.h b/sys/arch/pmax/include/profile.h index 661183549e8..2a57a4d45c2 100644 --- a/sys/arch/pmax/include/profile.h +++ b/sys/arch/pmax/include/profile.h @@ -1,79 +1,3 @@ -/* $NetBSD: profile.h,v 1.6 1995/05/31 00:25:06 jonathan Exp $ */ +/* $NetBSD: profile.h,v 1.7 1996/03/19 03:08:27 jonathan Exp $ */ -/* - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)profile.h 8.1 (Berkeley) 6/10/93 - */ - -#define _MCOUNT_DECL static void __mcount - -#define MCOUNT \ - __asm(".globl _mcount;" \ - "_mcount:;" \ - ".set noreorder;" \ - ".set noat;" \ - "sw $4,8($29);" \ - "sw $5,12($29);" \ - "sw $6,16($29);" \ - "sw $7,20($29);" \ - "sw $1,0($29);" \ - "sw $31,4($29);" \ - "move $5,$31;" \ - "jal ___mcount;" \ - "move $4,$1;" \ - "lw $4,8($29);" \ - "lw $5,12($29);" \ - "lw $6,16($29);" \ - "lw $7,20($29);" \ - "lw $31,4($29);" \ - "lw $1,0($29);" \ - "addu $29,$29,8;" \ - "j $31;" \ - "move $31,$1;" \ - ".set reorder;" \ - ".set at"); - -#ifdef _KERNEL -/* - * The following two macros do splhigh and splx respectively. - * They have to be defined this way because these are real - * functions on the PMAX, and we do not want to invoke mcount - * recursively. - */ -#define MCOUNT_ENTER s = _splhigh() - -#define MCOUNT_EXIT _splx(s) -#endif /* _KERNEL */ +#include diff --git a/sys/arch/pmax/include/pte.h b/sys/arch/pmax/include/pte.h index 9a0e4e9fa9e..599f0265a8c 100644 --- a/sys/arch/pmax/include/pte.h +++ b/sys/arch/pmax/include/pte.h @@ -1,4 +1,4 @@ -/* $NetBSD: pte.h,v 1.5 1995/03/28 18:19:26 jtc Exp $ */ +/* $NetBSD: pte.h,v 1.6 1996/02/01 22:32:15 mycroft Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -46,7 +46,7 @@ * R2000 hardware page table entry */ -#ifndef LOCORE +#ifndef _LOCORE struct pte { #if BYTE_ORDER == BIG_ENDIAN unsigned int pg_pfnum:20, /* HW: core page frame number or 0 */ @@ -76,7 +76,7 @@ typedef union pt_entry { unsigned int pt_entry; /* for copying, etc. */ struct pte pt_pte; /* for getting to bits by name */ } pt_entry_t; /* Mach page table entry */ -#endif /* LOCORE */ +#endif /* _LOCORE */ #define PT_ENTRY_NULL ((pt_entry_t *) 0) @@ -93,7 +93,7 @@ typedef union pt_entry { #define PG_SHIFT 12 #define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT) -#if defined(_KERNEL) && !defined(LOCORE) +#if defined(_KERNEL) && !defined(_LOCORE) /* * Kernel virtual address to page table entry and visa versa. */ diff --git a/sys/arch/pmax/include/ptrace.h b/sys/arch/pmax/include/ptrace.h index f3ce907933e..fbf8a1aac7d 100644 --- a/sys/arch/pmax/include/ptrace.h +++ b/sys/arch/pmax/include/ptrace.h @@ -1,50 +1,3 @@ -/* $NetBSD: ptrace.h,v 1.6 1995/12/21 09:28:36 jonathan Exp $ */ +/* $NetBSD: ptrace.h,v 1.7 1996/03/19 04:39:01 jonathan Exp $ */ -/* - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)ptrace.h 8.1 (Berkeley) 6/10/93 - */ - -/* - * Mips-dependent ptrace definitions. - * - */ - -/*#define PT_STEP (PT_FIRSTMACH + 0)*/ -#define PT_GETREGS (PT_FIRSTMACH + 1) -#define PT_SETREGS (PT_FIRSTMACH + 2) - -#ifdef notyet -#define PT_GETFPREGS (PT_FIRSTMACH + 3) -#define PT_SETFPREGS (PT_FIRSTMACH + 4) -#endif +#include diff --git a/sys/arch/pmax/include/reg.h b/sys/arch/pmax/include/reg.h index f91820dc359..dd0ab28e08e 100644 --- a/sys/arch/pmax/include/reg.h +++ b/sys/arch/pmax/include/reg.h @@ -1,62 +1,3 @@ -/* $NetBSD: reg.h,v 1.6 1995/12/20 02:00:27 jonathan Exp $ */ +/* $NetBSD: reg.h,v 1.7 1996/03/19 03:08:36 jonathan Exp $ */ -/* - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: reg.h 1.1 90/07/09 - * - * @(#)reg.h 8.2 (Berkeley) 1/11/94 - */ - -#ifndef _MACHINE_REG_H_ -#define _MACHINE_REG_H_ -/* - * Location of the users' stored - * registers relative to ZERO. - * Usage is p->p_regs[XX]. - * - * must be visible to assembly code. - */ -#include - -/* - * Register set accessible via /proc/$pid/reg - */ -struct reg { - int r_regs[71]; /* numbered as above */ -}; -#endif /*_MACHINE_REG_H_*/ +#include diff --git a/sys/arch/pmax/include/regdef.h b/sys/arch/pmax/include/regdef.h index 46216b57d00..848ddfab9d6 100644 --- a/sys/arch/pmax/include/regdef.h +++ b/sys/arch/pmax/include/regdef.h @@ -1,73 +1,3 @@ -/* $NetBSD: regdef.h,v 1.4 1994/10/26 21:09:58 cgd Exp $ */ +/* $NetBSD: regdef.h,v 1.5 1996/03/19 03:08:41 jonathan Exp $ */ -/* - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. This file is derived from the MIPS RISC - * Architecture book by Gerry Kane. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)regdef.h 8.1 (Berkeley) 6/10/93 - */ - -#define zero $0 /* always zero */ -#define AT $at /* assembler temp */ -#define v0 $2 /* return value */ -#define v1 $3 -#define a0 $4 /* argument registers */ -#define a1 $5 -#define a2 $6 -#define a3 $7 -#define t0 $8 /* temp registers (not saved across subroutine calls) */ -#define t1 $9 -#define t2 $10 -#define t3 $11 -#define t4 $12 -#define t5 $13 -#define t6 $14 -#define t7 $15 -#define s0 $16 /* saved across subroutine calls (callee saved) */ -#define s1 $17 -#define s2 $18 -#define s3 $19 -#define s4 $20 -#define s5 $21 -#define s6 $22 -#define s7 $23 -#define t8 $24 /* two more temp registers */ -#define t9 $25 -#define k0 $26 /* kernel temporary */ -#define k1 $27 -#define gp $28 /* global pointer */ -#define sp $29 /* stack pointer */ -#define s8 $30 /* one more callee saved */ -#define ra $31 /* return address */ +#include diff --git a/sys/arch/pmax/include/regnum.h b/sys/arch/pmax/include/regnum.h index fe92e582eeb..f62b9ce04e5 100644 --- a/sys/arch/pmax/include/regnum.h +++ b/sys/arch/pmax/include/regnum.h @@ -1,145 +1,3 @@ -/* $NetBSD: regnum.h,v 1.1 1995/12/20 02:00:28 jonathan Exp $ */ +/* $NetBSD: regnum.h,v 1.3 1996/03/20 09:49:30 jonathan Exp $ */ -/* - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: reg.h 1.1 90/07/09 - * - * @(#)reg.h 8.2 (Berkeley) 1/11/94 - */ - -/* - * Location of the users' stored - * registers relative to ZERO. - * Usage is p->p_regs[XX]. - */ -#define ZERO 0 -#define AST 1 -#define V0 2 -#define V1 3 -#define A0 4 -#define A1 5 -#define A2 6 -#define A3 7 -#define T0 8 -#define T1 9 -#define T2 10 -#define T3 11 -#define T4 12 -#define T5 13 -#define T6 14 -#define T7 15 -#define S0 16 -#define S1 17 -#define S2 18 -#define S3 19 -#define S4 20 -#define S5 21 -#define S6 22 -#define S7 23 -#define T8 24 -#define T9 25 -#define K0 26 -#define K1 27 -#define GP 28 -#define SP 29 -#define S8 30 -#define RA 31 -#define SR 32 -#define PS SR /* alias for SR */ -#define MULLO 33 -#define MULHI 34 -#define BADVADDR 35 -#define CAUSE 36 -#define PC 37 - -#define FPBASE 38 -#define F0 (FPBASE+0) -#define F1 (FPBASE+1) -#define F2 (FPBASE+2) -#define F3 (FPBASE+3) -#define F4 (FPBASE+4) -#define F5 (FPBASE+5) -#define F6 (FPBASE+6) -#define F7 (FPBASE+7) -#define F8 (FPBASE+8) -#define F9 (FPBASE+9) -#define F10 (FPBASE+10) -#define F11 (FPBASE+11) -#define F12 (FPBASE+12) -#define F13 (FPBASE+13) -#define F14 (FPBASE+14) -#define F15 (FPBASE+15) -#define F16 (FPBASE+16) -#define F17 (FPBASE+17) -#define F18 (FPBASE+18) -#define F19 (FPBASE+19) -#define F20 (FPBASE+20) -#define F21 (FPBASE+21) -#define F22 (FPBASE+22) -#define F23 (FPBASE+23) -#define F24 (FPBASE+24) -#define F25 (FPBASE+25) -#define F26 (FPBASE+26) -#define F27 (FPBASE+27) -#define F28 (FPBASE+28) -#define F29 (FPBASE+29) -#define F30 (FPBASE+30) -#define F31 (FPBASE+31) -#define FSR (FPBASE+32) - -#ifdef IPCREG -#define NIPCREG (FSR + 1) -int ipcreg[NIPCREG] = { - ZERO, AST, V0, V1, A0, A1, A2, A3, T0, T1, T2, T3, T4, T5, T6, T7, - S0, S1, S2, S3, S4, S5, S6, S7, T8, T9, K0, K1, GP, SP, S8, RA, - SR, MULLO, MULHI, BADVADDR, CAUSE, PC, - F0, F1, F2, F3, F4, F5, F6, F7, - F8, F9, F10, F11, F12, F13, F14, F15, - F16, F17, F18, F19, F20, F21, F22, F23, - F24, F25, F26, F27, F28, F29, F30, F31, FSR, -}; -#endif - -#ifdef LANGUAGE_C -/* - * Register set accessible via /proc/$pid/reg - */ -struct reg { - int r_regs[71]; /* numbered as above */ -}; -#endif /* LANGUAGE_C */ +#include diff --git a/sys/arch/pmax/include/reloc.h b/sys/arch/pmax/include/reloc.h index f81a086fdc1..a352fe1ec87 100644 --- a/sys/arch/pmax/include/reloc.h +++ b/sys/arch/pmax/include/reloc.h @@ -1,74 +1,5 @@ -/* $NetBSD: reloc.h,v 1.4 1994/10/26 21:09:59 cgd Exp $ */ +/* $NetBSD: reloc.h,v 1.6 1996/03/20 09:49:29 jonathan Exp $ */ -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)reloc.h 8.1 (Berkeley) 6/10/93 - * - * from: Header: reloc.h,v 1.6 92/06/20 09:59:37 torek Exp - */ +#include -/* - * MIPS relocation types. - */ -enum reloc_type { - MIPS_RELOC_32, /* 32-bit absolute */ - MIPS_RELOC_JMP, /* 26-bit absolute << 2 | high 4 bits of pc */ - MIPS_RELOC_WDISP16, /* 16-bit signed pc-relative << 2 */ - MIPS_RELOC_HI16, /* 16-bit absolute << 16 */ - MIPS_RELOC_HI16_S, /* 16-bit absolute << 16 (+1 if needed) */ - MIPS_RELOC_LO16, /* 16-bit absolute */ -}; - -/* - * MIPS relocation info. - * - * Symbol-relative relocation is done by: - * 1. start with the value r_addend, - * 2. locate the appropriate symbol and if defined, add symbol value, - * 3. if pc relative, subtract pc, - * 4. if the reloc_type is MIPS_RELOC_HI16_S and the result bit 15 is set, - * add 0x00010000, - * 5. shift down 2 or 16 if necessary. - * The resulting value is then to be stuffed into the appropriate bits - * in the object (the low 16, or the low 26 bits). - */ -struct reloc_info_pmax { - u_long r_address; /* relocation addr (offset in segment) */ - u_int r_index:24, /* segment (r_extern==0) or symbol index */ - r_extern:1, /* if set, r_index is symbol index */ - :2; /* unused */ - enum reloc_type r_type:5; /* relocation type, from above */ - long r_addend; /* value to add to symbol value */ -}; - -#define relocation_info reloc_info_pmax +#define relocation_info_pmax reloc_info_mips diff --git a/sys/arch/pmax/include/setjmp.h b/sys/arch/pmax/include/setjmp.h index c50d15c79b5..bcfa694662a 100644 --- a/sys/arch/pmax/include/setjmp.h +++ b/sys/arch/pmax/include/setjmp.h @@ -1,7 +1,3 @@ -/* $NetBSD: setjmp.h,v 1.1 1994/12/20 10:37:05 cgd Exp $ */ +/* $NetBSD: setjmp.h,v 1.2 1996/03/19 03:08:46 jonathan Exp $ */ -/* - * machine/setjmp.h: machine dependent setjmp-related information. - */ - -#define _JBLEN 83 /* size, in longs, of a jmp_buf */ +#include diff --git a/sys/arch/pmax/include/signal.h b/sys/arch/pmax/include/signal.h index ea997dc33a8..350de4fbf11 100644 --- a/sys/arch/pmax/include/signal.h +++ b/sys/arch/pmax/include/signal.h @@ -1,66 +1,3 @@ -/* $NetBSD: signal.h,v 1.6 1995/01/18 06:42:01 mellon Exp $ */ +/* $NetBSD: signal.h,v 1.8 1996/03/19 04:39:07 jonathan Exp $ */ -/* - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)signal.h 8.1 (Berkeley) 6/10/93 - */ - -/* - * Machine-dependent signal definitions - */ - -typedef int sig_atomic_t; - -#ifndef _ANSI_SOURCE -/* - * Information pushed on stack when a signal is delivered. - * This is used by the kernel to restore state following - * execution of the signal handler. It is also made available - * to the handler to allow it to restore state properly if - * a non-standard exit is performed. - */ -struct sigcontext { - int sc_onstack; /* sigstack state to restore */ - int sc_mask; /* signal mask to restore */ - int sc_pc; /* pc at time of signal */ - int sc_regs[32]; /* processor regs 0 to 31 */ - int mullo, mulhi; /* mullo and mulhi registers... */ - int sc_fpused; /* fp has been used */ - int sc_fpregs[33]; /* fp regs 0 to 31 and csr */ - int sc_fpc_eir; /* floating point exception instruction reg */ -}; - -#endif /* !_ANSI_SOURCE */ +#include diff --git a/sys/arch/pmax/include/stdarg.h b/sys/arch/pmax/include/stdarg.h index c9a644c1ef8..2bb98006638 100644 --- a/sys/arch/pmax/include/stdarg.h +++ b/sys/arch/pmax/include/stdarg.h @@ -1,56 +1,3 @@ -/* $NetBSD: stdarg.h,v 1.10 1995/12/25 23:15:35 mycroft Exp $ */ +/* $NetBSD: stdarg.h,v 1.12 1996/03/19 03:08:51 jonathan Exp $ */ -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)stdarg.h 8.1 (Berkeley) 6/10/93 - */ - -#ifndef _PMAX_STDARG_H_ -#define _PMAX_STDARG_H_ - -#include - -typedef _BSD_VA_LIST_ va_list; - -#define __va_size(type) \ - (((sizeof(type) + sizeof(long) - 1) / sizeof(long)) * sizeof(long)) - -#define va_start(ap, last) \ - ((ap) = (va_list)&(last) + __va_size(last)) - -#define va_arg(ap, type) \ - (*(type *)((ap) += __va_size(type), (ap) - __va_size(type))) - -#define va_end(ap) ((void)0) - -#endif /* !_PMAX_STDARG_H_ */ +#include diff --git a/sys/arch/pmax/include/tc_machdep.h b/sys/arch/pmax/include/tc_machdep.h index 7768aebd269..44e620ea4a2 100644 --- a/sys/arch/pmax/include/tc_machdep.h +++ b/sys/arch/pmax/include/tc_machdep.h @@ -1,4 +1,4 @@ -/* $NetBSD: tc_machdep.h,v 1.1 1995/12/28 08:42:17 jonathan Exp $ */ +/* $NetBSD: tc_machdep.h,v 1.3.4.1 1996/05/30 04:07:39 mhitch Exp $ */ /* * Copyright (c) 1994, 1995 Carnegie-Mellon University. @@ -60,6 +60,8 @@ #ifndef __MACHINE_TC_MACHDEP_H__ #define __MACHINE_TC_MACHDEP_H__ +#include /* defines MACH_PHYS_TO_UNCACHED */ + typedef int32_t tc_addr_t; typedef int32_t tc_offset_t; @@ -74,11 +76,36 @@ typedef int32_t tc_offset_t; #define tc_badaddr(tcaddr) \ badaddr((void *)(tcaddr), sizeof (u_int32_t)) - -#define TC_DENSE_TO_SPARSE(addr) \ - (addr) +#define TC_DENSE_TO_SPARSE(addr) (addr) -#define TC_PHYS_TO_UNCACHED(addr) \ - (addr) +#define TC_PHYS_TO_UNCACHED(addr) MACH_PHYS_TO_UNCACHED(addr) + + +/* + * Use the following macros to compare device names on a pmax, as + * the autoconfig structs are in a state of flux. + */ +struct confargs; + +#define TC_BUS_MATCHNAME(ta, name) \ + (strncmp( (ta)->ta_modname, (name), TC_ROM_LLEN+1) == 0) + +/* + * Port-specific declarations: + * Declarations "private" sys/dev/tc/tc.c MI functions used to search + * for potential TC-option console devices (framebuffers), + */ +int tc_checkslot __P((tc_addr_t slotbase, char *namep)); + +/* + * And declarations for the MD function used to search for and configure + * a TC framebuffer as system console, and to configure the TC bus + * (the last is a hack). + */ + +extern int tc_findconsole __P((int preferred_slot)); +extern void config_tcbus __P((struct device *parent, int cputype, + int printfn __P((void*, char*)) )); + #endif /* __MACHINE_TC_MACHDEP_H__*/ diff --git a/sys/arch/pmax/include/trap.h b/sys/arch/pmax/include/trap.h index 72dc62edfdd..0ae8075953b 100644 --- a/sys/arch/pmax/include/trap.h +++ b/sys/arch/pmax/include/trap.h @@ -1,64 +1,3 @@ -/* $NetBSD: trap.h,v 1.4 1994/10/26 21:10:04 cgd Exp $ */ +/* $NetBSD: trap.h,v 1.7 1996/03/24 08:17:06 jonathan Exp $ */ -/* - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: trap.h 1.1 90/07/09 - * - * @(#)trap.h 8.1 (Berkeley) 6/10/93 - */ - -/* - * Trap codes - * also known in trap.c for name strings - */ - -#define T_INT 0 /* Interrupt pending */ -#define T_TLB_MOD 1 /* TLB modified fault */ -#define T_TLB_LD_MISS 2 /* TLB miss on load or ifetch */ -#define T_TLB_ST_MISS 3 /* TLB miss on a store */ -#define T_ADDR_ERR_LD 4 /* Address error on a load or ifetch */ -#define T_ADDR_ERR_ST 5 /* Address error on a store */ -#define T_BUS_ERR_IFETCH 6 /* Bus error on an ifetch */ -#define T_BUS_ERR_LD_ST 7 /* Bus error on a load or store */ -#define T_SYSCALL 8 /* System call */ -#define T_BREAK 9 /* Breakpoint */ -#define T_RES_INST 10 /* Reserved instruction exception */ -#define T_COP_UNUSABLE 11 /* Coprocessor unusable */ -#define T_OVFLOW 12 /* Arithmetic overflow */ - -#define T_USER 0x10 /* user-mode flag or'ed with type */ +#include diff --git a/sys/arch/pmax/include/types.h b/sys/arch/pmax/include/types.h index 828a01acacb..f35e61528d2 100644 --- a/sys/arch/pmax/include/types.h +++ b/sys/arch/pmax/include/types.h @@ -1,81 +1,3 @@ -/* $NetBSD: types.h,v 1.11 1995/12/09 04:41:47 mycroft Exp $ */ +/* $NetBSD: types.h,v 1.12 1996/03/19 05:18:26 jonathan Exp $ */ -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)types.h 8.3 (Berkeley) 1/5/94 - */ - -#ifndef _MACHTYPES_H_ -#define _MACHTYPES_H_ - -#include - -#if !defined(_ANSI_SOURCE) && !defined(_POSIX_SOURCE) -typedef struct _physadr { - int r[1]; -} *physadr; - -typedef struct label_t { - int val[12]; -} label_t; -#endif - -typedef unsigned long vm_offset_t; -typedef unsigned long vm_size_t; - -/* - * Basic integral types. Omit the typedef if - * not possible for a machine/compiler combination. - */ -#define __BIT_TYPES_DEFINED__ -typedef __signed char int8_t; -typedef unsigned char u_int8_t; -typedef short int16_t; -typedef unsigned short u_int16_t; -typedef int int32_t; -typedef unsigned int u_int32_t; -/* LONGLONG */ -typedef long long int64_t; -/* LONGLONG */ -typedef unsigned long long u_int64_t; - -typedef int32_t register_t; - -#define __BDEVSW_DUMP_OLD_TYPE -#define __SWAP_BROKEN -#define __FORK_BRAINDAMAGE - -#endif /* _MACHTYPES_H_ */ +#include diff --git a/sys/arch/pmax/include/varargs.h b/sys/arch/pmax/include/varargs.h index db59d3d5892..f5427bc90c1 100644 --- a/sys/arch/pmax/include/varargs.h +++ b/sys/arch/pmax/include/varargs.h @@ -1,61 +1,3 @@ -/* $NetBSD: varargs.h,v 1.12 1995/12/26 01:16:31 mycroft Exp $ */ +/* $NetBSD: varargs.h,v 1.14 1996/03/20 09:49:31 jonathan Exp $ */ -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * (c) UNIX System Laboratories, Inc. - * All or some portions of this file are derived from material licensed - * to the University of California by American Telephone and Telegraph - * Co. or Unix System Laboratories, Inc. and are reproduced herein with - * the permission of UNIX System Laboratories, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)varargs.h 8.2 (Berkeley) 3/22/94 - */ - -#ifndef _PMAX_VARARGS_H_ -#define _PMAX_VARARGS_H_ - -#include - -#if __GNUC__ == 1 -#define __va_ellipsis -#else -#define __va_ellipsis ... -#endif - -#define va_alist __builtin_va_alist -#define va_dcl long __builtin_va_alist; __va_ellipsis - -#undef va_start -#define va_start(ap) \ - ((ap) = (va_list)&__builtin_va_alist) - -#endif /* !_PMAX_VARARGS_H_ */ +#include diff --git a/sys/arch/pmax/include/vmparam.h b/sys/arch/pmax/include/vmparam.h index 6215614fcf1..aa4e5cbc9f1 100644 --- a/sys/arch/pmax/include/vmparam.h +++ b/sys/arch/pmax/include/vmparam.h @@ -1,241 +1,6 @@ -/* $NetBSD: vmparam.h,v 1.5 1994/10/26 21:10:10 cgd Exp $ */ +/* $NetBSD: vmparam.h,v 1.6 1996/03/19 03:08:56 jonathan Exp $ */ -/* - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: vmparam.h 1.16 91/01/18 - * - * @(#)vmparam.h 8.2 (Berkeley) 4/22/94 - */ - -/* - * Machine dependent constants for DEC Station 3100. - */ -/* - * USRTEXT is the start of the user text/data space, while USRSTACK - * is the top (end) of the user stack. LOWPAGES and HIGHPAGES are - * the number of pages from the beginning of the P0 region to the - * beginning of the text and from the beginning of the P1 region to the - * beginning of the stack respectively. - */ -#define USRTEXT 0x00001000 -#define USRSTACK 0x80000000 /* Start of user stack */ -#define BTOPUSRSTACK 0x80000 /* btop(USRSTACK) */ -#define LOWPAGES 0x00001 -#define HIGHPAGES 0 - -/* - * Virtual memory related constants, all in bytes - */ -#ifndef MAXTSIZ -#define MAXTSIZ (24*1024*1024) /* max text size */ -#endif -#ifndef DFLDSIZ -#define DFLDSIZ (32*1024*1024) /* initial data size limit */ -#endif -#ifndef MAXDSIZ -#define MAXDSIZ (32*1024*1024) /* max data size */ -#endif -#ifndef DFLSSIZ -#define DFLSSIZ (1024*1024) /* initial stack size limit */ -#endif -#ifndef MAXSSIZ -#define MAXSSIZ MAXDSIZ /* max stack size */ -#endif - -/* - * Default sizes of swap allocation chunks (see dmap.h). - * The actual values may be changed in vminit() based on MAXDSIZ. - * With MAXDSIZ of 16Mb and NDMAP of 38, dmmax will be 1024. - * DMMIN should be at least ctod(1) so that vtod() works. - * vminit() insures this. - */ -#define DMMIN 32 /* smallest swap allocation */ -#define DMMAX 4096 /* largest potential swap allocation */ - -/* - * Sizes of the system and user portions of the system page table. - */ -/* SYSPTSIZE IS SILLY; (really number of buffers for I/O) */ -#define SYSPTSIZE 1228 -#define USRPTSIZE 1024 - -/* - * PTEs for mapping user space into the kernel for phyio operations. - * 16 pte's are enough to cover 8 disks * MAXBSIZE. - */ -#ifndef USRIOSIZE -#define USRIOSIZE 32 -#endif - -/* - * PTEs for system V style shared memory. - * This is basically slop for kmempt which we actually allocate (malloc) from. - */ -#ifndef SHMMAXPGS -#define SHMMAXPGS 1024 /* 4mb */ -#endif - -/* - * Boundary at which to place first MAPMEM segment if not explicitly - * specified. Should be a power of two. This allows some slop for - * the data segment to grow underneath the first mapped segment. - */ -#define MMSEG 0x200000 - -/* - * The size of the clock loop. - */ -#define LOOPPAGES (maxfree - firstfree) - -/* - * The time for a process to be blocked before being very swappable. - * This is a number of seconds which the system takes as being a non-trivial - * amount of real time. You probably shouldn't change this; - * it is used in subtle ways (fractions and multiples of it are, that is, like - * half of a ``long time'', almost a long time, etc.) - * It is related to human patience and other factors which don't really - * change over time. - */ -#define MAXSLP 20 - -/* - * A swapped in process is given a small amount of core without being bothered - * by the page replacement algorithm. Basically this says that if you are - * swapped in you deserve some resources. We protect the last SAFERSS - * pages against paging and will just swap you out rather than paging you. - * Note that each process has at least UPAGES+CLSIZE pages which are not - * paged anyways (this is currently 8+2=10 pages or 5k bytes), so this - * number just means a swapped in process is given around 25k bytes. - * Just for fun: current memory prices are 4600$ a megabyte on VAX (4/22/81), - * so we loan each swapped in process memory worth 100$, or just admit - * that we don't consider it worthwhile and swap it out to disk which costs - * $30/mb or about $0.75. - */ -#define SAFERSS 4 /* nominal ``small'' resident set size - protected against replacement */ - -/* - * DISKRPM is used to estimate the number of paging i/o operations - * which one can expect from a single disk controller. - */ -#define DISKRPM 60 - -/* - * Klustering constants. Klustering is the gathering - * of pages together for pagein/pageout, while clustering - * is the treatment of hardware page size as though it were - * larger than it really is. - * - * KLMAX gives maximum cluster size in CLSIZE page (cluster-page) - * units. Note that ctod(KLMAX*CLSIZE) must be <= DMMIN in dmap.h. - * ctob(KLMAX) should also be less than MAXPHYS (in vm_swp.c) - * unless you like "big push" panics. - */ - -#ifdef notdef /* XXX */ -#define KLMAX (4/CLSIZE) -#define KLSEQL (2/CLSIZE) /* in klust if vadvise(VA_SEQL) */ -#define KLIN (4/CLSIZE) /* default data/stack in klust */ -#define KLTXT (4/CLSIZE) /* default text in klust */ -#define KLOUT (4/CLSIZE) -#else -#define KLMAX (1/CLSIZE) -#define KLSEQL (1/CLSIZE) -#define KLIN (1/CLSIZE) -#define KLTXT (1/CLSIZE) -#define KLOUT (1/CLSIZE) -#endif - -/* - * KLSDIST is the advance or retard of the fifo reclaim for sequential - * processes data space. - */ -#define KLSDIST 3 /* klusters advance/retard for seq. fifo */ - -/* - * Paging thresholds (see vm_sched.c). - * Strategy of 1/19/85: - * lotsfree is 512k bytes, but at most 1/4 of memory - * desfree is 200k bytes, but at most 1/8 of memory - */ -#define LOTSFREE (512 * 1024) -#define LOTSFREEFRACT 4 -#define DESFREE (200 * 1024) -#define DESFREEFRACT 8 - -/* - * There are two clock hands, initially separated by HANDSPREAD bytes - * (but at most all of user memory). The amount of time to reclaim - * a page once the pageout process examines it increases with this - * distance and decreases as the scan rate rises. - */ -#define HANDSPREAD (2 * 1024 * 1024) - -/* - * The number of times per second to recompute the desired paging rate - * and poke the pagedaemon. - */ -#define RATETOSCHEDPAGING 4 - -/* - * Believed threshold (in megabytes) for which interleaved - * swapping area is desirable. - */ -#define LOTSOFMEM 2 - -#define mapin(pte, v, pfnum, prot) \ - (*(int *)(pte) = ((pfnum) << PG_SHIFT) | (prot), MachTLBFlushAddr(v)) - -/* - * Mach derived constants - */ - -/* user/kernel map constants */ -#define VM_MIN_ADDRESS ((vm_offset_t)0x00000000) -#define VM_MAXUSER_ADDRESS ((vm_offset_t)0x80000000) -#define VM_MAX_ADDRESS ((vm_offset_t)0x80000000) -#define VM_MIN_KERNEL_ADDRESS ((vm_offset_t)0xC0000000) -#define VM_MAX_KERNEL_ADDRESS ((vm_offset_t)0xFFFFC000) - -/* virtual sizes (bytes) for various kernel submaps */ -#define VM_MBUF_SIZE (NMBCLUSTERS*MCLBYTES) -#define VM_KMEM_SIZE (NKMEMCLUSTERS*CLBYTES) -#define VM_PHYS_SIZE (USRIOSIZE*CLBYTES) +#include /* pcb base */ -#define pcbb(p) ((u_int)(p)->p_addr) +/*#define pcbb(p) ((u_int)(p)->p_addr) */ diff --git a/sys/arch/pmax/pmax/asic.h b/sys/arch/pmax/pmax/asic.h index f00d540b151..e3af181bfe8 100644 --- a/sys/arch/pmax/pmax/asic.h +++ b/sys/arch/pmax/pmax/asic.h @@ -1,4 +1,4 @@ -/* $NetBSD: asic.h,v 1.6 1995/08/29 11:52:00 jonathan Exp $ */ +/* $NetBSD: asic.h,v 1.8 1996/05/19 01:42:54 jonathan Exp $ */ /* * Copyright (c) 1991,1990,1989,1994,1995 Carnegie Mellon University @@ -66,11 +66,11 @@ * @(#)asic.h 8.1 (Berkeley) 6/10/93 */ -#ifndef MIPS_ASIC_H -#define MIPS_ASIC_H 1 +#ifndef MIPS_IOASIC_H +#define MIPS_IOASIC_H 1 /* - * Slot definitions. + * Slot definitions * * The IOASIC is memory-mapped into a turbochannel slot as the "system" * pseudo-slot pseudo-slot, containing on-the-baseboard devices for @@ -95,95 +95,96 @@ * clock with 1-microsecond resolution. */ -#define ASIC_SLOT_0_START 0x000000 -#define ASIC_SLOT_1_START 0x040000 -#define ASIC_SLOT_2_START 0x080000 -#define ASIC_SLOT_3_START 0x0c0000 -#define ASIC_SLOT_4_START 0x100000 -#define ASIC_SLOT_5_START 0x140000 -#define ASIC_SLOT_6_START 0x180000 -#define ASIC_SLOT_7_START 0x1c0000 -#define ASIC_SLOT_8_START 0x200000 -#define ASIC_SLOT_9_START 0x240000 -#define ASIC_SLOT_10_START 0x280000 -#define ASIC_SLOT_11_START 0x2c0000 -#define ASIC_SLOT_12_START 0x300000 -#define ASIC_SLOT_13_START 0x340000 -#define ASIC_SLOT_14_START 0x380000 -#define ASIC_SLOT_15_START 0x3c0000 -#define ASIC_SLOTS_END 0x3fffff - +#define IOASIC_SLOT_0_START 0x000000 +#define IOASIC_SLOT_1_START 0x040000 +#define IOASIC_SLOT_2_START 0x080000 +#define IOASIC_SLOT_3_START 0x0c0000 +#define IOASIC_SLOT_4_START 0x100000 +#define IOASIC_SLOT_5_START 0x140000 +#define IOASIC_SLOT_6_START 0x180000 +#define IOASIC_SLOT_7_START 0x1c0000 +#define IOASIC_SLOT_8_START 0x200000 +#define IOASIC_SLOT_9_START 0x240000 +#define IOASIC_SLOT_10_START 0x280000 +#define IOASIC_SLOT_11_START 0x2c0000 +#define IOASIC_SLOT_12_START 0x300000 +#define IOASIC_SLOT_13_START 0x340000 +#define IOASIC_SLOT_14_START 0x380000 +#define IOASIC_SLOT_15_START 0x3c0000 +#define IOASIC_SLOTS_END 0x3fffff + /* - * ASIC register offsets (slot 1) + * IOASIC register offsets (slot 1) */ -#define ASIC_SCSI_DMAPTR ASIC_SLOT_1_START+0x000 -#define ASIC_SCSI_NEXTPTR ASIC_SLOT_1_START+0x010 -#define ASIC_LANCE_DMAPTR ASIC_SLOT_1_START+0x020 -#define ASIC_SCC_T1_DMAPTR ASIC_SLOT_1_START+0x030 -#define ASIC_SCC_R1_DMAPTR ASIC_SLOT_1_START+0x040 -#define ASIC_SCC_T2_DMAPTR ASIC_SLOT_1_START+0x050 - -#define ASIC_SCC_R2_DMAPTR ASIC_SLOT_1_START+0x060 -#define ASIC_FLOPPY_DMAPTR ASIC_SLOT_1_START+0x070 -#define ASIC_ISDN_X_DMAPTR ASIC_SLOT_1_START+0x080 -#define ASIC_ISDN_X_NEXTPTR ASIC_SLOT_1_START+0x090 -#define ASIC_ISDN_R_DMAPTR ASIC_SLOT_1_START+0x0a0 -#define ASIC_ISDN_R_NEXTPTR ASIC_SLOT_1_START+0x0b0 -#define ASIC_BUFF0 ASIC_SLOT_1_START+0x0c0 -#define ASIC_BUFF1 ASIC_SLOT_1_START+0x0d0 -#define ASIC_BUFF2 ASIC_SLOT_1_START+0x0e0 -#define ASIC_BUFF3 ASIC_SLOT_1_START+0x0f0 -#define ASIC_CSR ASIC_SLOT_1_START+0x100 -#define ASIC_INTR ASIC_SLOT_1_START+0x110 -#define ASIC_IMSK ASIC_SLOT_1_START+0x120 -#define ASIC_CURADDR ASIC_SLOT_1_START+0x130 -#define ASIC_ISDN_X_DATA ASIC_SLOT_1_START+0x140 -#define ASIC_ISDN_R_DATA ASIC_SLOT_1_START+0x150 -#define ASIC_LANCE_DECODE ASIC_SLOT_1_START+0x160 -#define ASIC_SCSI_DECODE ASIC_SLOT_1_START+0x170 -#define ASIC_SCC0_DECODE ASIC_SLOT_1_START+0x180 -#define ASIC_SCC1_DECODE ASIC_SLOT_1_START+0x190 -#define ASIC_FLOPPY_DECODE ASIC_SLOT_1_START+0x1a0 -#define ASIC_SCSI_SCR ASIC_SLOT_1_START+0x1b0 -#define ASIC_SCSI_SDR0 ASIC_SLOT_1_START+0x1c0 -#define ASIC_SCSI_SDR1 ASIC_SLOT_1_START+0x1d0 -#define ASIC_CTR ASIC_SLOT_1_START+0x1e0 /*5k/240,alpha only*/ +#define IOASIC_SCSI_DMAPTR IOASIC_SLOT_1_START+0x000 +#define IOASIC_SCSI_NEXTPTR IOASIC_SLOT_1_START+0x010 +#define IOASIC_LANCE_DMAPTR IOASIC_SLOT_1_START+0x020 +#define IOASIC_SCC_T1_DMAPTR IOASIC_SLOT_1_START+0x030 +#define IOASIC_SCC_R1_DMAPTR IOASIC_SLOT_1_START+0x040 +#define IOASIC_SCC_T2_DMAPTR IOASIC_SLOT_1_START+0x050 +#define IOASIC_SCC_R2_DMAPTR IOASIC_SLOT_1_START+0x060 +#define IOASIC_FLOPPY_DMAPTR IOASIC_SLOT_1_START+0x070 +#define IOASIC_ISDN_X_DMAPTR IOASIC_SLOT_1_START+0x080 +#define IOASIC_ISDN_X_NEXTPTR IOASIC_SLOT_1_START+0x090 +#define IOASIC_ISDN_R_DMAPTR IOASIC_SLOT_1_START+0x0a0 +#define IOASIC_ISDN_R_NEXTPTR IOASIC_SLOT_1_START+0x0b0 +#define IOASIC_BUFF0 IOASIC_SLOT_1_START+0x0c0 +#define IOASIC_BUFF1 IOASIC_SLOT_1_START+0x0d0 +#define IOASIC_BUFF2 IOASIC_SLOT_1_START+0x0e0 +#define IOASIC_BUFF3 IOASIC_SLOT_1_START+0x0f0 +#define IOASIC_CSR IOASIC_SLOT_1_START+0x100 +#define IOASIC_INTR IOASIC_SLOT_1_START+0x110 +#define IOASIC_IMSK IOASIC_SLOT_1_START+0x120 +#define IOASIC_CURADDR IOASIC_SLOT_1_START+0x130 +#define IOASIC_ISDN_X_DATA IOASIC_SLOT_1_START+0x140 +#define IOASIC_ISDN_R_DATA IOASIC_SLOT_1_START+0x150 +#define IOASIC_LANCE_DECODE IOASIC_SLOT_1_START+0x160 +#define IOASIC_SCSI_DECODE IOASIC_SLOT_1_START+0x170 +#define IOASIC_SCC0_DECODE IOASIC_SLOT_1_START+0x180 +#define IOASIC_SCC1_DECODE IOASIC_SLOT_1_START+0x190 +#define IOASIC_FLOPPY_DECODE IOASIC_SLOT_1_START+0x1a0 +#define IOASIC_SCSI_SCR IOASIC_SLOT_1_START+0x1b0 +#define IOASIC_SCSI_SDR0 IOASIC_SLOT_1_START+0x1c0 +#define IOASIC_SCSI_SDR1 IOASIC_SLOT_1_START+0x1d0 +#define IOASIC_CTR IOASIC_SLOT_1_START+0x1e0 /*5k/240,alpha only*/ /* * System Status and Control register (SSR) bit definitions. * (The SSR is the IO ASIC register named ASIC_CSR above). */ -#define ASIC_CSR_DMAEN_T1 0x80000000 /* rw */ -#define ASIC_CSR_DMAEN_R1 0x40000000 /* rw */ -#define ASIC_CSR_DMAEN_T2 0x20000000 /* rw */ -#define ASIC_CSR_DMAEN_R2 0x10000000 /* rw */ -#define ASIC_CSR_FASTMODE 0x08000000 /* rw */ /*Alpha asic only*/ -#define ASIC_CSR_xxx 0x07800000 /* reserved */ -#define ASIC_CSR_DS_xxx 0x0f800000 /* reserved */ -#define ASIC_CSR_FLOPPY_DIR 0x00400000 /* rw */ -#define ASIC_CSR_DMAEN_FLOPPY 0x00200000 /* rw */ -#define ASIC_CSR_DMAEN_ISDN_T 0x00100000 /* rw */ -#define ASIC_CSR_DMAEN_ISDN_R 0x00080000 /* rw */ -#define ASIC_CSR_SCSI_DIR 0x00040000 /* rw */ -#define ASIC_CSR_DMAEN_SCSI 0x00020000 /* rw */ -#define ASIC_CSR_DMAEN_LANCE 0x00010000 /* rw */ +#define IOASIC_CSR_DMAEN_T1 0x80000000 /* rw */ +#define IOASIC_CSR_DMAEN_R1 0x40000000 /* rw */ +#define IOASIC_CSR_DMAEN_T2 0x20000000 /* rw */ +#define IOASIC_CSR_DMAEN_R2 0x10000000 /* rw */ +#define IOASIC_CSR_FASTMODE 0x08000000 /* rw */ /*not on pmaxes*/ +#define IOASIC_CSR_xxx 0x07800000 /* reserved */ +#define IOASIC_CSR_DS_xxx 0x0f800000 /* reserved */ +#define IOASIC_CSR_FLOPPY_DIR 0x00400000 /* rw */ +#define IOASIC_CSR_DMAEN_FLOPPY 0x00200000 /* rw */ +#define IOASIC_CSR_DMAEN_ISDN_T 0x00100000 /* rw */ +#define IOASIC_CSR_DMAEN_ISDN_R 0x00080000 /* rw */ +#define IOASIC_CSR_SCSI_DIR 0x00040000 /* rw */ +#define IOASIC_CSR_DMAEN_SCSI 0x00020000 /* rw */ +#define IOASIC_CSR_DMAEN_LANCE 0x00010000 /* rw */ /* * The low-order 16 bits of SSR are general-purpose bits * with model-dependent meaning. * The following are common on all three IOASIC Decstations, - * (except perhaps TXDIS_1 and TXDIS_2 on xine?), and apparently on Alphas, - * also. + * (except perhaps TXDIS_1 and TXDIS_2 on xine?). + * The enable bits appear to be valid on Alphas, also. + * XXX CDG -- reorganize to separate out bitfields with + * common meaninds on Alpha, pmax? */ -#define ASIC_CSR_DIAGDN 0x00008000 /* rw */ /* (all) */ -#define ASIC_CSR_TXDIS_2 0x00004000 /* rw */ /* kmin,kn03 */ -#define ASIC_CSR_TXDIS_1 0x00002000 /* rw */ /* kmin,kn03 */ -#define ASIC_CSR_SCC_ENABLE 0x00000800 /* rw */ /* (all) */ -#define ASIC_CSR_RTC_ENABLE 0x00000400 /* rw */ /* (all) */ -#define ASIC_CSR_SCSI_ENABLE 0x00000200 /* rw */ /* (all) */ -#define ASIC_CSR_LANCE_ENABLE 0x00000100 /* rw */ /* (all) */ +#define IOASIC_CSR_DIAGDN 0x00008000 /* rw */ /* (all) */ +#define IOASIC_CSR_TXDIS_2 0x00004000 /* rw */ /* kmin,kn03 */ +#define IOASIC_CSR_TXDIS_1 0x00002000 /* rw */ /* kmin,kn03 */ +#define IOASIC_CSR_SCC_ENABLE 0x00000800 /* rw */ /* (all) */ +#define IOASIC_CSR_RTC_ENABLE 0x00000400 /* rw */ /* (all) */ +#define IOASIC_CSR_SCSI_ENABLE 0x00000200 /* rw */ /* (all) */ +#define IOASIC_CSR_LANCE_ENABLE 0x00000100 /* rw */ /* (all) */ /* kn03-specific SRR bit definitions: common bitfields above, plus: */ @@ -205,26 +206,25 @@ /* * System Interrupt Register (and interrupt mask register). - * The defines above call the SIR ASIC_INTR, and the SIRM is called - * ASIC_IMSK. + * The defines above call the SIR IOASIC_INTR, and the SIRM is called + * IOASIC_IMSK. */ - -#define ASIC_INTR_T1_PAGE_END 0x80000000 /* rz */ -#define ASIC_INTR_T1_READ_E 0x40000000 /* rz */ -#define ASIC_INTR_R1_HALF_PAGE 0x20000000 /* rz */ -#define ASIC_INTR_R1_DMA_OVRUN 0x10000000 /* rz */ -#define ASIC_INTR_T2_PAGE_END 0x08000000 /* rz */ -#define ASIC_INTR_T2_READ_E 0x04000000 /* rz */ -#define ASIC_INTR_R2_HALF_PAGE 0x02000000 /* rz */ -#define ASIC_INTR_R2_DMA_OVRUN 0x01000000 /* rz */ -#define ASIC_INTR_FLOPPY_DMA_E 0x00800000 /* rz */ -#define ASIC_INTR_ISDN_PTR_LOAD 0x00400000 /* rz */ -#define ASIC_INTR_ISDN_OVRUN 0x00200000 /* rz */ -#define ASIC_INTR_ISDN_READ_E 0x00100000 /* rz */ -#define ASIC_INTR_SCSI_PTR_LOAD 0x00080000 /* rz */ -#define ASIC_INTR_SCSI_OVRUN 0x00040000 /* rz */ -#define ASIC_INTR_SCSI_READ_E 0x00020000 /* rz */ -#define ASIC_INTR_LANCE_READ_E 0x00010000 /* rz */ +#define IOASIC_INTR_T1_PAGE_END 0x80000000 /* rz */ +#define IOASIC_INTR_T1_READ_E 0x40000000 /* rz */ +#define IOASIC_INTR_R1_HALF_PAGE 0x20000000 /* rz */ +#define IOASIC_INTR_R1_DMA_OVRUN 0x10000000 /* rz */ +#define IOASIC_INTR_T2_PAGE_END 0x08000000 /* rz */ +#define IOASIC_INTR_T2_READ_E 0x04000000 /* rz */ +#define IOASIC_INTR_R2_HALF_PAGE 0x02000000 /* rz */ +#define IOASIC_INTR_R2_DMA_OVRUN 0x01000000 /* rz */ +#define IOASIC_INTR_FLOPPY_DMA_E 0x00800000 /* rz */ +#define IOASIC_INTR_ISDN_PTR_LOAD 0x00400000 /* rz */ +#define IOASIC_INTR_ISDN_OVRUN 0x00200000 /* rz */ +#define IOASIC_INTR_ISDN_READ_E 0x00100000 /* rz */ +#define IOASIC_INTR_SCSI_PTR_LOAD 0x00080000 /* rz */ +#define IOASIC_INTR_SCSI_OVRUN 0x00040000 /* rz */ +#define IOASIC_INTR_SCSI_READ_E 0x00020000 /* rz */ +#define IOASIC_INTR_LANCE_READ_E 0x00010000 /* rz */ /* * SIR and SIRM low-order bits. @@ -237,33 +237,33 @@ * the MAXINE (decstation 5000/xx) is weird; see below. */ -#define ASIC_INTR_NVR_JUMPER 0x00004000 /* ro */ -#define ASIC_INTR_NRMOD_JUMPER 0x00000400 /* ro */ -#define ASIC_INTR_SCSI 0x00000200 /* ro */ -#define ASIC_INTR_LANCE 0x00000100 /* ro */ +#define IOASIC_INTR_NVR_JUMPER 0x00004000 /* ro */ +#define IOASIC_INTR_NRMOD_JUMPER 0x00000400 /* ro */ +#define IOASIC_INTR_SCSI 0x00000200 /* ro */ +#define IOASIC_INTR_LANCE 0x00000100 /* ro */ /* The following are valid for both kmin and kn03. */ -#define KMIN_INTR_SCC_1 0x00000080 /* ro */ /* kmin,kn03*/ -#define KMIN_INTR_SCC_0 0x00000040 /* ro */ +#define KMIN_INTR_SCC_1 0x00000080 /* ro */ /*kmin,kn03*/ +#define KMIN_INTR_SCC_0 0x00000040 /* ro */ -#define KMIN_INTR_CLOCK 0x00000020 /* ro */ -#define KMIN_INTR_PSWARN 0x00000010 /* ro */ -#define KMIN_INTR_SCSI_FIFO 0x00000004 /* ro */ -#define KMIN_INTR_PBNC 0x00000002 /* ro */ -#define KMIN_INTR_PBNO 0x00000001 /* ro */ -#define KMIN_INTR_ASIC 0xff0f0004 +#define KMIN_INTR_CLOCK 0x00000020 /* ro */ +#define KMIN_INTR_PSWARN 0x00000010 /* ro */ +#define KMIN_INTR_SCSI_FIFO 0x00000004 /* ro */ +#define KMIN_INTR_PBNC 0x00000002 /* ro */ +#define KMIN_INTR_PBNO 0x00000001 /* ro */ +#define KMIN_INTR_ASIC 0xff0f0004 /* kmin-specific SIR/SIRM definitions */ -#define KMIN_INTR_TIMEOUT 0x00001000 /* ro */ -#define KMIN_IM0 0xff0f13f0 /* all good ones enabled */ +#define KMIN_INTR_TIMEOUT 0x00001000 /* ro */ +#define KMIN_IM0 0xff0f13f0 /* all good ones enabled */ /* kn03-specific SIR/SIRM definitions */ -#define KN03_INTR_TC_2 0x00002000 /* ro */ -#define KN03_INTR_TC_1 0x00001000 /* ro */ -#define KN03_INTR_TC_0 0x00000800 /* ro */ -#define KN03_IM0 0xff0f3bf0 /* all good ones enabled */ +#define KN03_INTR_TC_2 0x00002000 /* ro */ +#define KN03_INTR_TC_1 0x00001000 /* ro */ +#define KN03_INTR_TC_0 0x00000800 /* ro */ +#define KN03_IM0 0xff0f3bf0 /* all good ones enabled */ /* * SIR/SIRM low-order bit definitions for the MAXINE. @@ -273,109 +273,92 @@ * (is the clock-interrupt-enable bit _really_ different)? */ -#define XINE_INTR_xxxx 0x00002808 /* ro */ -#define XINE_INTR_FLOPPY 0x00008000 /* ro */ -/*#define XINE_INTR_NVR_JUMPER 0x00004000 /* ro */ -#define XINE_INTR_POWERUP 0x00002000 /* ro */ -#define XINE_INTR_TC_0 0x00001000 /* ro */ -#define XINE_INTR_ISDN 0x00000800 /* ro */ -/*#define XINE_INTR_NRMOD_JUMPER 0x00000400 /* ro */ -/*#define XINE_INTR_SCSI 0x00000200 /* ro */ -/*#define XINE_INTR_LANCE 0x00000100 /* ro */ -#define XINE_INTR_FLOPPY_HDS 0x00000080 /* ro */ -#define XINE_INTR_SCC_0 0x00000040 /* ro */ -#define XINE_INTR_TC_1 0x00000020 /* ro */ -#define XINE_INTR_FLOPPY_XDS 0x00000010 /* ro */ -#define XINE_INTR_VINT 0x00000008 /* ro */ -#define XINE_INTR_N_VINT 0x00000004 /* ro */ -#define XINE_INTR_DTOP_TX 0x00000002 /* ro */ -#define XINE_INTR_DTOP_RX 0x00000001 /* ro */ -#define XINE_INTR_DTOP 0x00000003 -#define XINE_INTR_ASIC 0xffff0000 -#define XINE_IM0 0xffff9b6b /* all good ones enabled */ +#define XINE_INTR_xxxx 0x00002808 /* ro */ +#define XINE_INTR_FLOPPY 0x00008000 /* ro */ +/*#define XINE_INTR_NVR_JUMPER 0x00004000 */ /* ro */ +#define XINE_INTR_POWERUP 0x00002000 /* ro */ +#define XINE_INTR_TC_0 0x00001000 /* ro */ +#define XINE_INTR_ISDN 0x00000800 /* ro */ +/*#define XINE_INTR_NRMOD_JUMPER 0x00000400 */ /* ro */ +/*#define XINE_INTR_SCSI 0x00000200 */ /* ro */ +/*#define XINE_INTR_LANCE 0x00000100 */ /* ro */ +#define XINE_INTR_FLOPPY_HDS 0x00000080 /* ro */ +#define XINE_INTR_SCC_0 0x00000040 /* ro */ +#define XINE_INTR_TC_1 0x00000020 /* ro */ +#define XINE_INTR_FLOPPY_XDS 0x00000010 /* ro */ +#define XINE_INTR_VINT 0x00000008 /* ro */ +#define XINE_INTR_N_VINT 0x00000004 /* ro */ +#define XINE_INTR_DTOP_TX 0x00000002 /* ro */ +#define XINE_INTR_DTOP_RX 0x00000001 /* ro */ +#define XINE_INTR_DTOP 0x00000003 +#define XINE_INTR_ASIC 0xffff0000 +#define XINE_IM0 0xffff9b6b /* all good ones enabled */ /* DMA pointer registers (SCSI, Comm, ...) */ -#define ASIC_DMAPTR_MASK 0xffffffe0 -#define ASIC_DMAPTR_SHIFT 5 -# define ASIC_DMAPTR_SET(reg,val) \ - (reg) = (((val)<>ASIC_DMAPTR_SHIFT) -#define ASIC_DMA_ADDR(p) (((unsigned)p) << (5-2)) +#define IOASIC_DMAPTR_MASK 0xffffffe0 +#define IOASIC_DMAPTR_SHIFT 5 +#define IOASIC_DMAPTR_SET(reg,val) \ + (reg) = (((val)<>IOASIC_DMAPTR_SHIFT) +#define IOASIC_DMA_ADDR(p) (((unsigned)p) << (5-2)) /* For the LANCE DMA pointer register initialization the above suffices */ /* More SCSI DMA registers */ -#define ASIC_SCR_STATUS 0x00000004 -#define ASIC_SCR_WORD 0x00000003 +#define IOASIC_SCR_STATUS 0x00000004 +#define IOASIC_SCR_WORD 0x00000003 /* Various Decode registers */ -#define ASIC_DECODE_HW_ADDRESS 0x000003f0 -#define ASIC_DECODE_CHIP_SELECT 0x0000000f +#define IOASIC_DECODE_HW_ADDRESS 0x000003f0 +#define IOASIC_DECODE_CHIP_SELECT 0x0000000f /* - * The Asic is mapped at different addresses on each model. - * The following macros define ASIC register addresses as a function - * of the base address of the ASIC. + * The IOASIC is mapped at different addresses on each model, so we + * define register addresses as base plus offset. */ -#define ASIC_REG_SCSI_DMAPTR(base) ((base) + ASIC_SCSI_DMAPTR) -#define ASIC_REG_SCSI_DMANPTR(base) ((base) + ASIC_SCSI_NEXTPTR) -#define ASIC_REG_LANCE_DMAPTR(base) ((base) + ASIC_LANCE_DMAPTR) -#define ASIC_REG_SCC_T1_DMAPTR(base) ((base) + ASIC_SCC_T1_DMAPTR) -#define ASIC_REG_SCC_R1_DMAPTR(base) ((base) + ASIC_SCC_R1_DMAPTR) -#define ASIC_REG_SCC_T2_DMAPTR(base) ((base) + ASIC_SCC_T2_DMAPTR) -#define ASIC_REG_SCC_R2_DMAPTR(base) ((base) + ASIC_SCC_R2_DMAPTR) -#define ASIC_REG_FLOPPY_DMAPTR(base) ((base) + ASIC_FLOPPY_DMAPTR) -#define ASIC_REG_ISDN_X_DMAPTR(base) ((base) + ASIC_ISDN_X_DMAPTR) -#define ASIC_REG_ISDN_X_NEXTPTR(base) ((base) + ASIC_ISDN_X_NEXTPTR) -#define ASIC_REG_ISDN_R_DMAPTR(base) ((base) + ASIC_ISDN_R_DMAPTR) -#define ASIC_REG_ISDN_R_NEXTPTR(base) ((base) + ASIC_ISDN_R_NEXTPTR) -#define ASIC_REG_BUFF0(base) ((base) + ASIC_BUFF0) -#define ASIC_REG_BUFF1(base) ((base) + ASIC_BUFF1) -#define ASIC_REG_BUFF2(base) ((base) + ASIC_BUFF2) -#define ASIC_REG_BUFF3(base) ((base) + ASIC_BUFF3) -#define ASIC_REG_CSR(base) ((base) + ASIC_CSR) -#define ASIC_REG_INTR(base) ((base) + ASIC_INTR) -#define ASIC_REG_IMSK(base) ((base) + ASIC_IMSK) -#define ASIC_REG_CURADDR(base) ((base) + ASIC_CURADDR) -#define ASIC_REG_ISDN_X_DATA(base) ((base) + ASIC_ISDN_X_DATA) -#define ASIC_REG_ISDN_R_DATA(base) ((base) + ASIC_ISDN_R_DATA) -#define ASIC_REG_LANCE_DECODE(base) ((base) + ASIC_LANCE_DECODE) -#define ASIC_REG_SCSI_DECODE(base) ((base) + ASIC_SCSI_DECODE) -#define ASIC_REG_SCC0_DECODE(base) ((base) + ASIC_SCC0_DECODE) -#define ASIC_REG_SCC1_DECODE(base) ((base) + ASIC_SCC1_DECODE) -#define ASIC_REG_FLOPPY_DECODE(base) ((base) + ASIC_FLOPPY_DECODE) -#define ASIC_REG_SCSI_SCR(base) ((base) + ASIC_SCSI_SCR) -#define ASIC_REG_SCSI_SDR0(base) ((base) + ASIC_SCSI_SDR0) -#define ASIC_REG_SCSI_SDR1(base) ((base) + ASIC_SCSI_SDR1) -#define ASIC_REG_CTR(base) ((base) + ASIC_CTR) +#define IOASIC_REG_SCSI_DMAPTR(base) ((base) + IOASIC_SCSI_DMAPTR) +#define IOASIC_REG_SCSI_DMANPTR(base) ((base) + IOASIC_SCSI_NEXTPTR) +#define IOASIC_REG_LANCE_DMAPTR(base) ((base) + IOASIC_LANCE_DMAPTR) +#define IOASIC_REG_SCC_T1_DMAPTR(base) ((base) + IOASIC_SCC_T1_DMAPTR) +#define IOASIC_REG_SCC_R1_DMAPTR(base) ((base) + IOASIC_SCC_R1_DMAPTR) +#define IOASIC_REG_SCC_T2_DMAPTR(base) ((base) + IOASIC_SCC_T2_DMAPTR) +#define IOASIC_REG_SCC_R2_DMAPTR(base) ((base) + IOASIC_SCC_R2_DMAPTR) +#define IOASIC_REG_FLOPPY_DMAPTR(base) ((base) + IOASIC_FLOPPY_DMAPTR) +#define IOASIC_REG_ISDN_X_DMAPTR(base) ((base) + IOASIC_ISDN_X_DMAPTR) +#define IOASIC_REG_ISDN_X_NEXTPTR(base) ((base) + IOASIC_ISDN_X_NEXTPTR) +#define IOASIC_REG_ISDN_R_DMAPTR(base) ((base) + IOASIC_ISDN_R_DMAPTR) +#define IOASIC_REG_ISDN_R_NEXTPTR(base) ((base) + IOASIC_ISDN_R_NEXTPTR) +#define IOASIC_REG_BUFF0(base) ((base) + IOASIC_BUFF0) +#define IOASIC_REG_BUFF1(base) ((base) + IOASIC_BUFF1) +#define IOASIC_REG_BUFF2(base) ((base) + IOASIC_BUFF2) +#define IOASIC_REG_BUFF3(base) ((base) + IOASIC_BUFF3) +#define IOASIC_REG_CSR(base) ((base) + IOASIC_CSR) +#define IOASIC_REG_INTR(base) ((base) + IOASIC_INTR) +#define IOASIC_REG_IMSK(base) ((base) + IOASIC_IMSK) +#define IOASIC_REG_CURADDR(base) ((base) + IOASIC_CURADDR) +#define IOASIC_REG_ISDN_X_DATA(base) ((base) + IOASIC_ISDN_X_DATA) +#define IOASIC_REG_ISDN_R_DATA(base) ((base) + IOASIC_ISDN_R_DATA) +#define IOASIC_REG_LANCE_DECODE(base) ((base) + IOASIC_LANCE_DECODE) +#define IOASIC_REG_SCSI_DECODE(base) ((base) + IOASIC_SCSI_DECODE) +#define IOASIC_REG_SCC0_DECODE(base) ((base) + IOASIC_SCC0_DECODE) +#define IOASIC_REG_SCC1_DECODE(base) ((base) + IOASIC_SCC1_DECODE) +#define IOASIC_REG_FLOPPY_DECODE(base) ((base) + IOASIC_FLOPPY_DECODE) +#define IOASIC_REG_SCSI_SCR(base) ((base) + IOASIC_SCSI_SCR) +#define IOASIC_REG_SCSI_SDR0(base) ((base) + IOASIC_SCSI_SDR0) +#define IOASIC_REG_SCSI_SDR1(base) ((base) + IOASIC_SCSI_SDR1) +#define IOASIC_REG_CTR(base) ((base) + IOASIC_CTR) /* * And slot assignments. */ -#define ASIC_SYS_ETHER_ADDRESS(base) ((base) + ASIC_SLOT_2_START) -#define ASIC_SYS_LANCE(base) ((base) + ASIC_SLOT_3_START) - - -#ifdef _KERNEL -#define ASIC_SLOT_LANCE 0 /* ASIC slots for interrupt lookup. */ -#define ASIC_SLOT_SCC0 1 -#define ASIC_SLOT_SCC1 2 -#define ASIC_SLOT_RTC 3 -#define ASIC_SLOT_ISDN 4 /* Only on Alphas and MAXINE */ - - -#ifdef alpha -#define ASIC_MAX_NSLOTS 5 /* clock + 2 scc + lance + isdn */ -caddr_t asic_base; -#endif - -#endif /* _KERNEL*/ +#define IOASIC_SYS_ETHER_ADDRESS(base) ((base) + IOASIC_SLOT_2_START) +#define IOASIC_SYS_LANCE(base) ((base) + IOASIC_SLOT_3_START) -#endif /* MIPS_ASIC_H */ +#endif /* MIPS_IOASIC_H */ diff --git a/sys/arch/pmax/pmax/autoconf.c b/sys/arch/pmax/pmax/autoconf.c index 58c35afa6db..6842e5b2b60 100644 --- a/sys/arch/pmax/pmax/autoconf.c +++ b/sys/arch/pmax/pmax/autoconf.c @@ -1,4 +1,4 @@ -/* $NetBSD: autoconf.c,v 1.14 1995/12/28 19:16:58 thorpej Exp $ */ +/* $NetBSD: autoconf.c,v 1.16 1996/04/10 17:38:18 jonathan Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -58,12 +58,33 @@ #include #include #include +#include #include #include #include #include +void setroot __P((void)); +void swapconf __P((void)); +void dumpconf __P((void)); /* XXX */ + +void xconsinit __P((void)); /* XXX console-init continuation */ + +#if 0 +/* + * XXX system-dependent, should call through a pointer. + * (spl0 should _NOT_ enable TC interrupts on a 3MIN.) + * + */ +int spl0 __P((void)); +#endif + +void configure __P((void)); +void makebootdev __P((char *cp)); + + + /* * The following several variables are related to * the configuration process, and are used in initializing @@ -79,71 +100,8 @@ extern int cputype; /* glue for new-style config */ int cputype; extern int initcpu __P((void)); /*XXX*/ -void cpu_configure __P((void)); void configure_scsi __P((void)); -/* - * Print cpu type. (This should be moved into cpu.c) - */ - -void -cpu_configure() -{ - /* - * for some reason the Pmax has an R2000 cpu with an implementation - * level of 2 and DEC's R3000s are level 2 as well? - */ - if (pmax_boardtype == DS_PMAX) { - cpu.cpu.cp_imp = MIPS_R2000; - fpu.cpu.cp_imp = MIPS_R2010; - } - - switch (cpu.cpu.cp_imp) { - case MIPS_R2000: - printf("cpu0 (MIPS R2000 revision %d.%d)\n", - cpu.cpu.cp_majrev, cpu.cpu.cp_minrev); - break; - - case MIPS_R3000: - printf("cpu0 (MIPS R3000 revision %d.%d)\n", - cpu.cpu.cp_majrev, cpu.cpu.cp_minrev); - break; - - case MIPS_R4000: - printf("cpu0 (MIPS R4000 revision %d.%d)\n", - cpu.cpu.cp_majrev, cpu.cpu.cp_minrev); - break; - - default: - printf("cpu0 (implementation %d revision %d.%d)\n", - cpu.cpu.cp_imp, cpu.cpu.cp_majrev, cpu.cpu.cp_minrev); - } - switch (fpu.cpu.cp_imp) { - case MIPS_R2010: - printf("fpu0 (MIPS R2010 revision %d.%d)\n", - fpu.cpu.cp_majrev, fpu.cpu.cp_minrev); - break; - - case MIPS_R3010: - printf("fpu0 (MIPS R3010 revision %d.%d)\n", - fpu.cpu.cp_majrev, fpu.cpu.cp_minrev); - break; - - case MIPS_R4010: - printf("fpu0 (MIPS R4010 revision %d.%d)\n", - fpu.cpu.cp_majrev, fpu.cpu.cp_minrev); - break; - - default: - printf("fpu0 (implementation %d revision %d.%d)\n", - fpu.cpu.cp_imp, fpu.cpu.cp_majrev, fpu.cpu.cp_minrev); - } - printf("data cache size %dK inst cache size %dK\n", - machDataCacheSize >> 10, machInstCacheSize >> 10); - -} - - /* * Determine mass storage and memory configuration for a machine. * Print cpu type, and then iterate over an array of devices @@ -154,7 +112,6 @@ cpu_configure() void configure() { - register struct pmax_ctlr *cp; int s; /* @@ -171,7 +128,7 @@ configure() * Kick off autoconfiguration */ s = splhigh(); - if (config_rootfound("mainbus", "mainbus") == 0) + if (config_rootfound("mainbus", "mainbus") == NULL) panic("no mainbus found"); #if 0 @@ -221,6 +178,7 @@ configure() /* * Configure swap space and related parameters. */ +void swapconf() { register struct swdevt *swp; @@ -246,30 +204,30 @@ swapconf() u_long bootdev = 0; /* should be dev_t, but not until 32 bits */ static char devname[][2] = { - 0, 0, /* 0 = 4.4bsd rz */ - 0, 0, /* 1 = vax ht */ - 0, 0, /* 2 = ?? */ - 'r','k', /* 3 = rk */ - 0, 0, /* 4 = sw */ - 't','m', /* 5 = tm */ - 't','s', /* 6 = ts */ - 'm','t', /* 7 = mt */ - 'r','t', /* 8 = rt*/ - 0, 0, /* 9 = ?? */ - 'u','t', /* 10 = ut */ - 'i','d', /* 11 = 11/725 idc */ - 'r','x', /* 12 = rx */ - 'u','u', /* 13 = uu */ - 'r','l', /* 14 = rl */ - 't','u', /* 15 = tmscp */ - 'c','s', /* 16 = cs */ - 'm','d', /* 17 = md */ - 's','t', /* 18 = st */ - 's','d', /* 19 = sd */ - 't','z', /* 20 = tz */ - 'r','z', /* 21 = rz */ - 0, 0, /* 22 = ?? */ - 'r','a', /* 23 = ra */ + { 0, 0 }, /* 0 = 4.4bsd rz */ + { 0, 0 }, /* 1 = vax ht */ + { 0, 0 }, /* 2 = ?? */ + { 'r','k' }, /* 3 = rk */ + { 0, 0 }, /* 4 = sw */ + { 't','m' }, /* 5 = tm */ + { 't','s' }, /* 6 = ts */ + { 'm','t' }, /* 7 = mt */ + { 'r','t' }, /* 8 = rt*/ + { 0, 0 }, /* 9 = ?? */ + { 'u','t' }, /* 10 = ut */ + { 'i','d' }, /* 11 = 11/725 idc */ + { 'r','x' }, /* 12 = rx */ + { 'u','u' }, /* 13 = uu */ + { 'r','l' }, /* 14 = rl */ + { 't','u' }, /* 15 = tmscp */ + { 'c','s' }, /* 16 = cs */ + { 'm','d' }, /* 17 = md */ + { 's','t' }, /* 18 = st */ + { 's','d' }, /* 19 = sd */ + { 't','z' }, /* 20 = tz */ + { 'r','z' }, /* 21 = rz */ + { 0, 0 }, /* 22 = ?? */ + { 'r','a' }, /* 23 = ra */ }; #define PARTITIONMASK 0x7 @@ -280,13 +238,18 @@ static char devname[][2] = { * If we can do so, and not instructed not to do so, * change rootdev to correspond to the load device. */ +void setroot() { int majdev, mindev, unit, part, controller; - dev_t temp, orootdev; + dev_t orootdev; struct swdevt *swp; register struct pmax_scsi_device *dp; +#ifdef DOSWAP + dev_t temp; +#endif + if (boothowto & RB_DFLTROOT || (bootdev & B_MAGICMASK) != B_DEVMAGIC) return; @@ -327,6 +290,7 @@ setroot() #ifdef DOSWAP mindev &= ~PARTITIONMASK; + temp = 0; for (swp = swdevt; swp->sw_dev != NODEV; swp++) { if (majdev == major(swp->sw_dev) && mindev == (minor(swp->sw_dev) & ~PARTITIONMASK)) { diff --git a/sys/arch/pmax/pmax/clock.c b/sys/arch/pmax/pmax/clock.c index c4e8d9ba55b..029543a611b 100644 --- a/sys/arch/pmax/pmax/clock.c +++ b/sys/arch/pmax/pmax/clock.c @@ -1,4 +1,4 @@ -/* $NetBSD: clock.c,v 1.9 1996/01/07 15:38:44 jonathan Exp $ */ +/* $NetBSD: clock.c,v 1.12.4.1 1996/05/30 04:10:34 mhitch Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -51,6 +51,14 @@ #include #include +#include "tc.h" /* Is a Turbochannel configured? */ + +#if NTC>0 +#include +#include +#endif + + /* * Machine-dependent clock routines. * @@ -77,6 +85,32 @@ volatile struct chiptime *Mach_clock_addr; #define RATE_2048_HZ 0x5 /* 488.281 usecs/interrupt */ #undef SELECTED_RATE +#if (HZ == 64) +# define SELECTED_RATE RATE_64_HZ /* 4.4bsd default on pmax */ +# define SHIFT_HZ 6 +# else /* !64 Hz */ +#if (HZ == 128) +# define SELECTED_RATE RATE_128_HZ +# define SHIFT_HZ 7 +#else /* !128 Hz */ +#if (HZ == 256) +# define SELECTED_RATE RATE_256_HZ +# define SHIFT_HZ 8 +#else /*!256Hz*/ +#if (HZ == 512) +# define SELECTED_RATE RATE_512_HZ +# define SHIFT_HZ 9 +#else /*!512hz*/ +#if (HZ == 1024) +# define SELECTED_RATE RATE_1024_HZ +# define SHIFT_HZ 10 +#else /* !1024hz*/ +# error RTC interrupt rate HZ not recognised; must be a power of 2 +#endif /*!64Hz*/ +#endif /*!1024Hz*/ +#endif /*!512 Hz*/ +#endif /*!256 Hz*/ +#endif /*!128Hz*/ /* * RTC interrupt rate: pick one of 64, 128, 256, 512, 1024, 2048. @@ -93,48 +127,43 @@ volatile struct chiptime *Mach_clock_addr; * give resolution in ns or tens of ns. */ -#ifndef RTC_HZ +#ifndef HZ #ifdef __mips__ -#define RTC_HZ 64 +/*#define HZ 64*/ /* conveniently divides 1 sec */ +#define HZ 256 /* default on Ultrix */ #else -# error Kernel config parameter RTC_HZ not defined +# error Kernel config parameter HZ not defined #endif #endif /* Compute value to program clock with, given config parameter RTC_HZ */ -#if (RTC_HZ == 128) -# define SELECTED_RATE RATE_128_HZ -#else /* !128 Hz */ -#if (RTC_HZ == 256) -# define SELECTED_RATE RATE_256_HZ -#else /*!256Hz*/ -#if (RTC_HZ == 512) -# define SELECTED_RATE RATE_512_HZ -#else /*!512hz*/ -#if (RTC_HZ == 1024) -# define SELECTED_RATE RATE_1024_HZ -#else /* !1024hz*/ -# if (RTC_HZ == 64) -# define SELECTED_RATE RATE_64_HZ /* 4.4bsd default on pmax */ -# else -# error RTC interrupt rate RTC_HZ not recognised; must be a power of 2 -#endif /*!64Hz*/ -#endif /*!1024Hz*/ -#endif /*!512 Hz*/ -#endif /*!256 Hz*/ -#endif /*!128Hz*/ +/* global autoconfiguration variables -- bus type*/ +extern struct cfdriver mainbus_cd; +#if NTC>0 +extern struct cfdriver ioasic_cd; +extern struct cfdriver tc_cd; +#endif + + /* Definition of the driver for autoconfig. */ static int clockmatch __P((struct device *, void *, void *)); static void clockattach __P((struct device *, struct device *, void *)); -struct cfdriver clockcd = { - NULL, "clock", clockmatch, clockattach, DV_DULL, sizeof(struct device), + +struct cfattach clock_ca = { + sizeof(struct device), clockmatch, clockattach +}; + +struct cfdriver clock_cd = { + NULL, "clock", DV_DULL }; +#ifdef notyet static void clock_startintr __P((void *)); static void clock_stopintr __P((void *)); +#endif volatile struct chiptime *Mach_clock_addr; @@ -146,31 +175,35 @@ clockmatch(parent, cfdata, aux) { struct cfdata *cf = cfdata; struct confargs *ca = aux; +#if NTC>0 + struct ioasicdev_attach_args *d = aux; +#endif #ifdef notdef /* XXX */ struct tc_cfloc *asic_locp = (struct asic_cfloc *)cf->cf_loc; #endif - register volatile struct chiptime *c; - int vec, ipl; int nclocks; +#if NTC>0 + if (parent->dv_cfdata->cf_driver != &ioasic_cd && + parent->dv_cfdata->cf_driver != &tc_cd && + parent->dv_cfdata->cf_driver != &mainbus_cd) +#else + if (parent->dv_cfdata->cf_driver != &mainbus_cd) +#endif + return(0); + /* make sure that we're looking for this type of device. */ - if (!BUS_MATCHNAME(ca, "dallas_rtc")) +#if NTC>0 + if (parent->dv_cfdata->cf_driver != &mainbus_cd) { + if (strcmp(d->iada_modname, "mc146818") != 0) + return (0); + } else +#endif + if (strcmp(ca->ca_name, "mc146818") != 0) return (0); /* All known decstations have a Dallas RTC */ -#ifdef pmax nclocks = 1; -#else - /*See how many clocks this system has */ - switch (hwrpb->rpb_type) { - case ST_DEC_3000_500: - case ST_DEC_3000_300: - nclocks = 1; - break; - default: - nclocks = 0; - } -#endif /* if it can't have the one mentioned, reject it */ if (cf->cf_unit >= nclocks) @@ -185,11 +218,22 @@ clockattach(parent, self, aux) struct device *self; void *aux; { - register volatile struct chiptime *c; struct confargs *ca = aux; +#if NTC>0 + struct ioasicdev_attach_args *d = aux; +#endif +#ifndef pmax + register volatile struct chiptime *c; +#endif - Mach_clock_addr = (struct chiptime *) - MACH_PHYS_TO_UNCACHED(BUS_CVTADDR(ca)); +#if NTC>0 + if (parent->dv_cfdata->cf_driver != &mainbus_cd) + Mach_clock_addr = (struct chiptime *) + MACH_PHYS_TO_UNCACHED(d->iada_addr); + else +#endif + Mach_clock_addr = (struct chiptime *) + MACH_PHYS_TO_UNCACHED(ca->ca_addr); #ifdef pmax printf("\n"); @@ -200,7 +244,7 @@ clockattach(parent, self, aux) c = Mach_clock_addr; c->regb = REGB_DATA_MODE | REGB_HOURS_FORMAT; - MachEmptyWriteBuffer(); + wbflush(); #endif #ifdef notyet /*XXX*/ /*FIXME*/ @@ -217,12 +261,19 @@ cpu_initclocks() { register volatile struct chiptime *c; extern int tickadj; +#ifdef NTP + extern int fixtick; +#endif + register long tmp; if (Mach_clock_addr == NULL) panic("cpu_initclocks: no clock to initialize"); - hz = RTC_HZ; /* Clock Hz is a configuration parameter */ + hz = HZ; /* Clock Hz is a configuration parameter */ tick = 1000000 / hz; /* number of microseconds between interrupts */ +#ifdef NTP + fixtick = +#endif tickfix = 1000000 - (hz * tick); if (tickfix) { int ftp; @@ -235,7 +286,16 @@ cpu_initclocks() c = Mach_clock_addr; c->rega = REGA_TIME_BASE | SELECTED_RATE; c->regb = REGB_PER_INT_ENA | REGB_DATA_MODE | REGB_HOURS_FORMAT; - MachEmptyWriteBuffer(); /* Alpha needs this */ + wbflush(); /* Alpha needs this */ + + /* + * Reset tickadj to ntp's idea of what it should be + * XXX this should be in conf/param.c + */ + tmp = (long) tick * 500L; + tickadj = (int)(tmp / 1000000L); + if (tmp % 1000000L > 0) + tickadj++; } /* @@ -312,7 +372,7 @@ inittodr(base) while ((c->rega & REGA_UIP) == 1) { splx(s); DELAY(10); - s = splx(); + s = splclock(); } sec = c->sec; @@ -364,7 +424,7 @@ inittodr(base) deltat = -deltat; if (deltat < 2 * SECDAY) return; - printf("WARNING: clock %s %d days", + printf("WARNING: clock %s %ld days", time.tv_sec < base ? "lost" : "gained", deltat / SECDAY); } bad: @@ -391,6 +451,7 @@ resettodr() dow = (t2 + 4) % 7; /* 1/1/1970 was thursday */ /* compute the year */ + t = t2; year = 69; while (t2 >= 0) { /* whittle off years */ t = t2; @@ -424,9 +485,9 @@ resettodr() s = splclock(); t = c->regd; /* reset VRT */ c->regb = REGB_SET_TIME | REGB_DATA_MODE | REGB_HOURS_FORMAT; - MachEmptyWriteBuffer(); + wbflush(); c->rega = 0x70; /* reset time base */ - MachEmptyWriteBuffer(); + wbflush(); c->sec = sec; c->min = min; @@ -435,18 +496,18 @@ resettodr() c->day = day; c->mon = mon; c->year = year; - MachEmptyWriteBuffer(); + wbflush(); c->rega = REGA_TIME_BASE | SELECTED_RATE; c->regb = REGB_PER_INT_ENA | REGB_DATA_MODE | REGB_HOURS_FORMAT; - MachEmptyWriteBuffer(); + wbflush(); splx(s); #ifdef DEBUG_CLOCK printf("resettodr(): todr hw yy/mm/dd= %d/%d/%d\n", year, mon, day); #endif c->nvram[48*4] |= 1; /* Set PROM time-valid bit */ - MachEmptyWriteBuffer(); + wbflush(); } /*XXX*/ diff --git a/sys/arch/pmax/pmax/conf-glue.c b/sys/arch/pmax/pmax/conf-glue.c index 12df9a1d8f1..684c45b0846 100644 --- a/sys/arch/pmax/pmax/conf-glue.c +++ b/sys/arch/pmax/pmax/conf-glue.c @@ -22,12 +22,12 @@ */ #include +#include #include #include #include #include - #include #include @@ -68,6 +68,8 @@ extern struct pmax_driver tzdriver; struct pmax_scsi_device scsi_dinit[] = { /*driver, cdriver, unit, ctlr, drive, slave, dk, flags*/ + +#if NSII > 0 { &rzdriver, &siidriver, 0, 0, 0, 0, 1, 0x0 }, { &rzdriver, &siidriver, 1, 0, 1, 0, 1, 0x0 }, { &rzdriver, &siidriver, 2, 0, 2, 0, 1, 0x0 }, @@ -75,6 +77,9 @@ struct pmax_scsi_device scsi_dinit[] = { { &rzdriver, &siidriver, 4, 0, 4, 0, 1, 0x0 }, { &tzdriver, &siidriver, 0, 0, 5, 0, 0, 0x0 }, { &tzdriver, &siidriver, 1, 0, 6, 0, 0, 0x0 }, +#endif /* NSII */ + +#if NASC > 0 { &rzdriver, &ascdriver, 0, 0, 0, 0, 1, 0x0 }, { &rzdriver, &ascdriver, 1, 0, 1, 0, 1, 0x0 }, { &rzdriver, &ascdriver, 2, 0, 2, 0, 1, 0x0 }, @@ -82,7 +87,9 @@ struct pmax_scsi_device scsi_dinit[] = { { &rzdriver, &ascdriver, 4, 0, 4, 0, 1, 0x0 }, { &tzdriver, &ascdriver, 0, 0, 5, 0, 0, 0x0 }, { &tzdriver, &ascdriver, 1, 0, 6, 0, 0, 0x0 }, -0 +#endif /* NASC */ + + { 0 } }; @@ -92,10 +99,14 @@ void noattach __P((struct device *parent, struct device *self, void *aux)); /* placeholder definitions for new-style scsi bus/disk/tape drivers */ -struct cfdriver oldscsibuscd = {NULL, "", nomatch, noattach, DV_DULL, 0, 0}; +struct cfattach oldscsibus_ca = { 0, nomatch, noattach }; +struct cfdriver oldscsibus_cd = {NULL, "", DV_DULL }; + +struct cfattach rz_ca = { 0, nomatch, noattach }; +struct cfdriver rz_cd = { NULL, "rz", DV_DULL }; -struct cfdriver rzcd = {NULL, "rz", nomatch, noattach, DV_DULL, 0, 0}; -struct cfdriver tzcd = {NULL, "tz", nomatch, noattach, DV_DULL, 0, 0}; +struct cfattach tz_ca = { 0, nomatch, noattach }; +struct cfdriver tz_cd = { NULL, "tz", DV_DULL} ; #define MAX_SCSI 4 @@ -145,10 +156,10 @@ configure_scsi() register struct pmax_driver *drp; /* probe and initialize SCSI buses */ - for (cp = &pmax_scsi_table[0]; drp = cp->pmax_driver; cp++) { + for (cp = &pmax_scsi_table[0]; (drp = cp->pmax_driver) != NULL; cp++) { /* probe and initialize devices connected to controller */ - for (dp = scsi_dinit; drp = dp->sd_driver; dp++) { + for (dp = scsi_dinit; (drp = dp->sd_driver) != NULL; dp++) { /* might want to get fancier later */ if (dp->sd_cdriver != cp->pmax_driver || dp->sd_ctlr != cp->pmax_unit) @@ -175,9 +186,10 @@ nomatch(parent, cfdata, aux) void *cfdata; void *aux; { +#if /*def DEBUG*/ 0 struct cfdata *cf = cfdata; struct confargs *ca = aux; -#if /*def DEBUG*/ 0 + printf("nomatch %s: %s: %s offset 0x%lx not yet done: %x\n", parent->dv_cfdata->cf_driver->cd_name, parent->dv_xname, @@ -204,7 +216,7 @@ noattach(parent, self, aux) ca->ca_name, self->dv_unit, parent->dv_xname); #else - panic("Can't do ew-attach of old device %s\n", + panic("Can't do new-config attach of old device %s\n", ca->ca_name, self->dv_unit); #endif return; diff --git a/sys/arch/pmax/pmax/conf.c b/sys/arch/pmax/pmax/conf.c index cbdff3e3a82..8a0e38e3472 100644 --- a/sys/arch/pmax/pmax/conf.c +++ b/sys/arch/pmax/pmax/conf.c @@ -1,4 +1,4 @@ -/* $OpenBSD: conf.c,v 1.5 1996/08/29 09:26:25 deraadt Exp $ */ +/* $NetBSD: conf.c,v 1.21.4.1 1996/08/13 07:58:43 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -46,6 +46,12 @@ #include #include +#ifndef LKM +#define lkmenodev enodev +#else +int lkmenodev __P((void)); +#endif + int ttselect __P((dev_t, int, struct proc *)); #include "vnd.h" @@ -89,6 +95,14 @@ struct bdevsw bdevsw[] = bdev_disk_init(NRZ,rz), /* 22: ?? old SCSI disk */ /*XXX*/ bdev_notdef(), /* 23: mscp */ bdev_disk_init(NCCD,ccd), /* 24: concatenated disk driver */ + + bdev_lkm_dummy(), /* 25 */ + bdev_lkm_dummy(), /* 26 */ + bdev_lkm_dummy(), /* 27 */ + bdev_lkm_dummy(), /* 28 */ + bdev_lkm_dummy(), /* 29 */ + bdev_lkm_dummy(), /* 30 */ + }; int nblkdev = sizeof(bdevsw) / sizeof(bdevsw[0]); @@ -145,8 +159,14 @@ cdev_decl(cfb); cdev_decl(xcfb); #include "mfb.h" cdev_decl(mfb); -#include "random.h" -cdev_decl(random); +dev_decl(filedesc,open); + +#ifdef LKM +#define NLKM 1 +#else +#define NLKM 0 +#endif +cdev_decl(lkm); /* a framebuffer with an attached mouse: */ @@ -159,24 +179,16 @@ cdev_decl(random); dev_init(c,n,mmap) } -/* open, close, read, ioctl */ -cdev_decl(ipl); -#ifdef IPFILTER -#define NIPF 1 -#else -#define NIPF 0 -#endif - struct cdevsw cdevsw[] = { - cdev_cn_init(1,cn), /* 0: virtual console */ + cdev_cn_init(1,cn), /* 0: virtual console */ /* (dz?) */ cdev_swap_init(1,sw), /* 1: /dev/drum (swap pseudo-device) */ cdev_ctty_init(1,ctty), /* 2: controlling terminal */ cdev_mm_init(1,mm), /* 3: /dev/{null,mem,kmem,...} */ cdev_tty_init(NPTY,pts), /* 4: pseudo-tty slave */ cdev_ptc_init(NPTY,ptc), /* 5: pseudo-tty master */ cdev_log_init(1,log), /* 6: /dev/klog */ - cdev_fd_init(1,fd), /* 7: file descriptor pseudo-dev */ + cdev_fd_init(1,filedesc), /* 7: file descriptor pseudo-dev */ cdev_notdef(), /* 8: old 2100/3100 frame buffer */ cdev_notdef(), /* 9: old slot for SCSI disk */ cdev_tape_init(NTZ,tz), /* 10: SCSI tape */ @@ -259,8 +271,17 @@ struct cdevsw cdevsw[] = cdev_tty_init(NRASTERCONSOLE,rcons), /* 85: rcons pseudo-dev */ cdev_fbm_init(NFB,fb), /* 86: frame buffer pseudo-device */ cdev_disk_init(NCCD,ccd), /* 87: concatenated disk driver */ - cdev_gen_ipf(NIPF,ipl), /* 88: IP filter log */ - cdev_random_init(NRANDOM,random); /* 89: random data source */ + + cdev_lkm_dummy(), /* 88 */ + cdev_lkm_dummy(), /* 89 */ + cdev_lkm_init(NLKM,lkm), /* 90: loadable module driver */ + cdev_lkm_dummy(), /* 91 */ + cdev_lkm_dummy(), /* 92 */ + cdev_lkm_dummy(), /* 93 */ + cdev_lkm_dummy(), /* 94 */ + cdev_lkm_dummy(), /* 95 */ + cdev_lkm_dummy(), /* 96 */ + }; int nchrdev = sizeof(cdevsw) / sizeof(cdevsw[0]); diff --git a/sys/arch/pmax/pmax/cpu.c b/sys/arch/pmax/pmax/cpu.c index 36758e918a3..fb01b0a071d 100644 --- a/sys/arch/pmax/pmax/cpu.c +++ b/sys/arch/pmax/pmax/cpu.c @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.c,v 1.1 1995/08/10 05:17:11 jonathan Exp $ */ +/* $NetBSD: cpu.c,v 1.5.4.1 1996/06/16 17:28:21 mhitch Exp $ */ /* * Copyright (c) 1994, 1995 Carnegie-Mellon University. @@ -29,32 +29,39 @@ #include #include +#include +#include #include -/*#include */ /* Definition of the driver for autoconfig. */ static int cpumatch(struct device *, void *, void *); static void cpuattach(struct device *, struct device *, void *); -struct cfdriver cpucd = - { NULL, "cpu", cpumatch, cpuattach, DV_DULL, sizeof (struct device) }; -static int cpuprint __P((void *, char *pnp)); +struct cfattach cpu_ca = { + sizeof (struct device), cpumatch, cpuattach +}; + +struct cfdriver cpu_cd = { + NULL, "cpu", DV_DULL +}; + +extern void cpu_identify __P((void)); + -extern void cpu_configure __P((void)); static int cpumatch(parent, cfdata, aux) struct device *parent; void *cfdata; void *aux; { - struct cfdata *cf = cfdata; struct confargs *ca = aux; + /* make sure that we're looking for a CPU. */ - if (strcmp(ca->ca_name, cpucd.cd_name) != 0) + if (strcmp(ca->ca_name, cpu_cd.cd_name) != 0) { return (0); - + } return (1); } @@ -65,32 +72,14 @@ cpuattach(parent, dev, aux) void *aux; { - /* Identify cpu. */ + printf(": "); - cpu_configure(); - printf("\n"); + cpu_identify(); +} - /* Work out what kind of FPU is present. */ -#if 0 - if (major == PCS_PROC_LCA4) { - struct confargs nca; - - /* - * If the processor is an KN01, it's got no bus, - * but a fixed set of onboard devices. - * Attach it here. (!!!) - */ - nca.ca_name = "kn01"; - nca.ca_slot = 0; - nca.ca_offset = 0; - nca.ca_bus = NULL; - if (!config_found(dev, &nca, cpuprint)) - panic("cpuattach: couldn't attach LCA bus interface"); - } -#endif -} +#if 0 static int cpuprint(aux, pnp) void *aux; @@ -98,7 +87,12 @@ cpuprint(aux, pnp) { register struct confargs *ca = aux; +/*XXX*/ printf("debug: cpuprint\n"); + +#if 0 if (pnp) printf("%s at %s", ca->ca_name, pnp); +#endif return (UNCONF); } +#endif diff --git a/sys/arch/pmax/pmax/cpu_cons.c b/sys/arch/pmax/pmax/cpu_cons.c index 200a8f56265..dfbfbe4c379 100644 --- a/sys/arch/pmax/pmax/cpu_cons.c +++ b/sys/arch/pmax/pmax/cpu_cons.c @@ -1,4 +1,4 @@ -/* $NetBSD: cpu_cons.c,v 1.6 1996/01/03 20:39:19 jonathan Exp $ */ +/* $NetBSD: cpu_cons.c,v 1.10.4.1 1996/05/30 04:10:36 mhitch Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -55,11 +55,9 @@ #include -#include #include #include #include -#include #include #include #include @@ -74,38 +72,48 @@ #include #include -#include +#include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include +#include "pm.h" +#include "cfb.h" +#include "mfb.h" +#include "xcfb.h" +#include "sfb.h" +#include "dc.h" +#include "dtop.h" +#include "scc.h" +#include "asc.h" +#include "tc.h" #if NDC > 0 #include -extern int dcGetc(), dcparam(); -extern void dcPutc(); +#include #endif + #if NDTOP > 0 -extern int dtopKBDGetc(); +#include #endif + #if NSCC > 0 -extern int sccGetc(), sccparam(); -extern void sccPutc(); +#include +#endif + +#if NPM > 0 +#include #endif + +#if NXCFB > 0 +#include +#endif + + static int romgetc __P ((dev_t)); static void romputc __P ((dev_t, int)); static void rompollc __P((dev_t, int)); -int pmax_boardtype; /* Mother board type */ +extern int pmax_boardtype; /* Mother board type */ /* * Major device numbers for possible console devices. XXX @@ -133,15 +141,15 @@ struct consdev cd = { CN_DEAD, }; -/* should be locals of consinit, but that's split in two til - * new-style config of decstations is finished +/* + * Should be locals of consinit, but that's split in two until + * new-style config is finished */ /* * Forward declarations */ - void consinit __P((void)); void xconsinit __P((void)); @@ -278,6 +286,7 @@ consinit() /* * Check for a suitable turbochannel frame buffer. */ +#if NTC>0 if (tc_findconsole(crt)) { cd.cn_pri = CN_NORMAL; #ifdef RCONS_HACK @@ -287,6 +296,7 @@ consinit() cd.cn_putc = rcons_vputc; /*XXX*/ return; } else +#endif printf("No crt console device in slot %d\n", crt); } @@ -370,7 +380,8 @@ xconsinit() /* * Get character from ROM console. */ -static int romgetc(dev) +static int +romgetc(dev) dev_t dev; { int s = splhigh (); @@ -383,7 +394,8 @@ static int romgetc(dev) /* * Print a character on ROM console. */ -static void romputc (dev, c) +static void +romputc (dev, c) dev_t dev; register int c; { @@ -393,7 +405,8 @@ static void romputc (dev, c) splx(s); } -static void rompollc (dev, c) +static void +rompollc (dev, c) dev_t dev; register int c; { @@ -401,6 +414,11 @@ static void rompollc (dev, c) } +#ifdef notanymore +/* + * select() on a possibly-redirected console. + */ + extern struct tty *constty; /* virtual console output device */ extern struct consdev *cn_tab; /* physical console device info */ extern struct vnode *cn_devvp; /* vnode for underlying device. */ @@ -430,3 +448,4 @@ pmax_cnselect(dev, rw, p) #endif return (ttselect(cn_tab->cn_dev, rw, p)); } +#endif /* notanymore */ diff --git a/sys/arch/pmax/pmax/cpu_exec.c b/sys/arch/pmax/pmax/cpu_exec.c deleted file mode 100644 index bf0c85316fc..00000000000 --- a/sys/arch/pmax/pmax/cpu_exec.c +++ /dev/null @@ -1,157 +0,0 @@ -/* $NetBSD: cpu_exec.c,v 1.4 1995/04/25 19:16:46 mellon Exp $ */ - -/* - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by Ralph - * Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)machdep.c 8.3 (Berkeley) 1/12/94 - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#ifdef COMPAT_09 -#include -#endif -#include - -/* - * cpu_exec_aout_makecmds(): - * cpu-dependent a.out format hook for execve(). - * - * Determine of the given exec package refers to something which we - * understand and, if so, set up the vmcmds for it. - * - */ -int -cpu_exec_aout_makecmds(p, epp) - struct proc *p; - struct exec_package *epp; -{ - /* If COMPAT_09 is defined, allow loading of old-style 4.4bsd a.out - executables. */ -#ifdef COMPAT_09 - struct bsd_aouthdr *hdr = (struct bsd_aouthdr *)epp -> ep_hdr; - - /* Only handle paged files (laziness). */ - if (hdr -> a_magic != BSD_ZMAGIC) -#endif - /* If it's not a.out, maybe it's ELF. (This wants to - be moved up to the machine independent code as soon - as possible.) XXX */ - return pmax_elf_makecmds (p, epp); - -#ifdef COMPAT_09 - epp -> ep_taddr = 0x1000; - epp -> ep_entry = hdr -> a_entry; - epp -> ep_tsize = hdr -> a_text; - epp -> ep_daddr = epp -> ep_taddr + hdr -> a_text; - epp -> ep_dsize = hdr -> a_data + hdr -> a_bss; - - /* - * check if vnode is in open for writing, because we want to - * demand-page out of it. if it is, don't do it, for various - * reasons - */ - if ((hdr -> a_text != 0 || hdr -> a_data != 0) - && epp->ep_vp->v_writecount != 0) { -#ifdef DIAGNOSTIC - if (epp->ep_vp->v_flag & VTEXT) - panic("exec: a VTEXT vnode has writecount != 0\n"); -#endif - return ETXTBSY; - } - epp->ep_vp->v_flag |= VTEXT; - - /* set up command for text segment */ - NEW_VMCMD(&epp->ep_vmcmds, vmcmd_map_pagedvn, hdr -> a_text, - epp->ep_taddr, epp->ep_vp, 0, VM_PROT_READ|VM_PROT_EXECUTE); - - /* set up command for data segment */ - NEW_VMCMD(&epp->ep_vmcmds, vmcmd_map_pagedvn, hdr -> a_data, - epp->ep_daddr, epp->ep_vp, hdr -> a_text, - VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE); - - /* set up command for bss segment */ - NEW_VMCMD(&epp->ep_vmcmds, vmcmd_map_zero, hdr -> a_bss, - epp->ep_daddr + hdr -> a_data, NULLVP, 0, - VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE); - - return exec_aout_setup_stack(p, epp); -#endif -} - -#ifdef COMPAT_ULTRIX -extern struct emul emul_ultrix; - -void -cpu_exec_ecoff_setregs(p, pack, stack, retval) - struct proc *p; - struct exec_package *pack; - u_long stack; - register_t *retval; -{ - struct ecoff_aouthdr *eap; - - setregs(p, pack, stack, retval); - eap = (struct ecoff_aouthdr *) - ((caddr_t)pack->ep_hdr + sizeof(struct ecoff_filehdr)); - p->p_md.md_regs[GP] = eap->ea_gp_value; -} - -/* - * cpu_exec_ecoff_hook(): - * cpu-dependent ECOFF format hook for execve(). - * - * Do any machine-dependent diddling of the exec package when doing ECOFF. - * - */ -int -cpu_exec_ecoff_hook(p, epp, eap) - struct proc *p; - struct exec_package *epp; - struct ecoff_aouthdr *eap; -{ - - epp->ep_emul = &emul_ultrix; - return 0; -} -#endif diff --git a/sys/arch/pmax/pmax/disksubr.c b/sys/arch/pmax/pmax/disksubr.c index 9336a85cd7a..9ef17242e61 100644 --- a/sys/arch/pmax/pmax/disksubr.c +++ b/sys/arch/pmax/pmax/disksubr.c @@ -1,4 +1,4 @@ -/* $NetBSD: disksubr.c,v 1.7 1996/01/07 22:02:55 thorpej Exp $ */ +/* $NetBSD: disksubr.c,v 1.10 1996/05/19 18:49:33 jonathan Exp $ */ /* * Copyright (c) 1982, 1986, 1988 Regents of the University of California. @@ -35,11 +35,13 @@ * @(#)ufs_disksubr.c 7.16 (Berkeley) 5/4/91 */ -#include "param.h" -#include "systm.h" -#include "buf.h" -#include "disklabel.h" -#include "syslog.h" +#include +#include +#include +#include +#include +#include +#include #define b_cylin b_resid @@ -47,11 +49,14 @@ #include "../../stand/dec_boot.h" extern char * -compat_label __P((dev_t dev, void (*strat)(), +compat_label __P((dev_t dev, void (*strat) __P((struct buf *bp)), struct disklabel *lp, struct cpu_disklabel *osdep)); #endif +char* readdisklabel __P((dev_t dev, void (*strat) __P((struct buf *bp)), + register struct disklabel *lp, + struct cpu_disklabel *osdep)); /* * Attempt to read a disk label from a device @@ -188,6 +193,7 @@ done: * Check new disk label for sensibility * before setting it. */ +int setdisklabel(olp, nlp, openmask, osdep) register struct disklabel *olp, *nlp; u_long openmask; @@ -233,6 +239,7 @@ setdisklabel(olp, nlp, openmask, osdep) /* * Write disk label back to device after modification. */ +int writedisklabel(dev, strat, lp, osdep) dev_t dev; void (*strat)(); @@ -256,7 +263,7 @@ writedisklabel(dev, strat, lp, osdep) bp->b_bcount = lp->d_secsize; bp->b_flags = B_READ; (*strat)(bp); - if (error = biowait(bp)) + if ((error = biowait(bp)) != 0) goto done; for (dlp = (struct disklabel *)bp->b_un.b_addr; dlp <= (struct disklabel *) @@ -281,14 +288,14 @@ done: /* * was this the boot device ? */ -int +void dk_establish(dk, dev) struct disk *dk; struct device *dev; { /* see also arch/alpha/alpha/disksubr.c */ printf("Warning: boot path unknown\n"); - return 1; + return; } /* diff --git a/sys/arch/pmax/pmax/elf.c b/sys/arch/pmax/pmax/elf.c deleted file mode 100644 index f4a12e0d06b..00000000000 --- a/sys/arch/pmax/pmax/elf.c +++ /dev/null @@ -1,194 +0,0 @@ -/* $NetBSD: elf.c,v 1.1 1995/01/18 06:16:33 mellon Exp $ */ - -/* - * Copyright (c) 1994 Ted Lemon - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* pmax_elf_makecmds (p, epp) - - Test if an executable is a MIPS ELF executable. If it is, - try to load it. */ - -pmax_elf_makecmds (p, epp) - struct proc *p; - struct exec_package *epp; -{ - struct ehdr *ex = (struct ehdr *)epp -> ep_hdr; - struct phdr ph; - int i, error, resid; - - /* Make sure we got enough data to check magic numbers... */ - if (epp -> ep_hdrvalid < sizeof (struct ehdr)) { -#ifdef DIAGNOSTIC - if (epp -> ep_hdrlen < sizeof (struct ehdr)) - printf ("pmax_elf_makecmds: execsw hdrsize too short!\n"); -#endif - return ENOEXEC; - } - - /* See if it's got the basic elf magic number leadin... */ - if (ex -> elf_magic [0] != 127 - || bcmp ("ELF", &ex -> elf_magic [1], 3)) { - return ENOEXEC; - } - /* XXX: Check other magic numbers here. */ - - /* See if we got any program header information... */ - if (!ex -> phoff || !ex -> phcount) { - return ENOEXEC; - } - - /* Set the entry point... */ - epp -> ep_entry = ex -> entry; - - /* - * Check if vnode is open for writing, because we want to - * demand-page out of it. If it is, don't do it. - */ - if (epp->ep_vp->v_writecount != 0) { -#ifdef DIAGNOSTIC - if (epp->ep_vp->v_flag & VTEXT) - panic("exec: a VTEXT vnode has writecount != 0\n"); -#endif - return ETXTBSY; - } - epp->ep_vp->v_flag |= VTEXT; - - epp->ep_taddr = 0; - epp->ep_tsize = 0; - epp->ep_daddr = 0; - epp->ep_dsize = 0; - - for (i = 0; i < ex -> phcount; i++) { - if (error = vn_rdwr(UIO_READ, epp -> ep_vp, (caddr_t)&ph, - sizeof ph, ex -> phoff + i * sizeof ph, - UIO_SYSSPACE, IO_NODELOCKED, - p->p_ucred, &resid, p)) - return error; - - if (resid != 0) { - return ENOEXEC; - } - - /* We only care about loadable sections... */ - if (ph.type == PT_LOAD) { - int prot = VM_PROT_READ | VM_PROT_EXECUTE; - int residue; - unsigned vaddr, offset, length; - - vaddr = ph.vaddr; - offset = ph.offset; - length = ph.filesz; - residue = ph.memsz - ph.filesz; - - if (ph.flags & PF_W) { - prot |= VM_PROT_WRITE; - if (!epp->ep_daddr || vaddr < epp -> ep_daddr) - epp->ep_daddr = vaddr; - epp->ep_dsize += ph.memsz; - /* Read the data from the file... */ - NEW_VMCMD(&epp->ep_vmcmds, vmcmd_map_readvn, - length, vaddr, - epp->ep_vp, offset, prot); - if (residue) { - vaddr &= ~(NBPG - 1); - offset &= ~(NBPG - 1); - length = roundup (length + ph.vaddr - - vaddr, NBPG); - residue = (ph.vaddr + ph.memsz) - - (vaddr + length); - } - } else { - vaddr &= ~(NBPG - 1); - offset &= ~(NBPG - 1); - length = roundup (length + ph.vaddr - vaddr, - NBPG); - residue = (ph.vaddr + ph.memsz) - - (vaddr + length); - if (!epp->ep_taddr || vaddr < epp -> ep_taddr) - epp->ep_taddr = vaddr; - epp->ep_tsize += ph.memsz; - /* Map the data from the file... */ - NEW_VMCMD(&epp->ep_vmcmds, vmcmd_map_pagedvn, - length, vaddr, - epp->ep_vp, offset, prot); - } - /* If part of the segment is just zeros (e.g., bss), - map that. */ - if (residue > 0) { - NEW_VMCMD (&epp->ep_vmcmds, vmcmd_map_zero, - residue, vaddr + length, - NULLVP, 0, prot); - } - } - } - - epp->ep_maxsaddr = USRSTACK - MAXSSIZ; - epp->ep_minsaddr = USRSTACK; - epp->ep_ssize = p->p_rlimit[RLIMIT_STACK].rlim_cur; - - /* - * set up commands for stack. note that this takes *two*, one to - * map the part of the stack which we can access, and one to map - * the part which we can't. - * - * arguably, it could be made into one, but that would require the - * addition of another mapping proc, which is unnecessary - * - * note that in memory, things assumed to be: 0 ....... ep_maxsaddr - * ep_minsaddr - */ - NEW_VMCMD(&epp->ep_vmcmds, vmcmd_map_zero, - ((epp->ep_minsaddr - epp->ep_ssize) - epp->ep_maxsaddr), - epp->ep_maxsaddr, NULLVP, 0, VM_PROT_NONE); - NEW_VMCMD(&epp->ep_vmcmds, vmcmd_map_zero, epp->ep_ssize, - (epp->ep_minsaddr - epp->ep_ssize), NULLVP, 0, - VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE); - - return 0; -} diff --git a/sys/arch/pmax/pmax/genassym.c b/sys/arch/pmax/pmax/genassym.c deleted file mode 100644 index a7fa47c3f49..00000000000 --- a/sys/arch/pmax/pmax/genassym.c +++ /dev/null @@ -1,75 +0,0 @@ -/* $NetBSD: genassym.c,v 1.7 1995/05/16 22:25:08 jtc Exp $ */ - -/* - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)genassym.c 8.2 (Berkeley) 9/23/93 - */ - -#define _KERNEL - -#include -#include -#include -#include -#include -#include - -#include - -main() -{ - register struct proc *p = (struct proc *)0; - register struct user *up = (struct user *)0; - register struct vmmeter *vm = (struct vmmeter *)0; - register int size, s, n; - - printf("#define\tP_FORW %d\n", &p->p_forw); - printf("#define\tP_BACK %d\n", &p->p_back); - printf("#define\tP_PRIORITY %d\n", &p->p_priority); - printf("#define\tP_ADDR %d\n", &p->p_addr); - printf("#define\tP_UPTE %d\n", p->p_md.md_upte); - printf("#define\tU_PCB_REGS %d\n", up->u_pcb.pcb_regs); - printf("#define\tU_PCB_FPREGS %d\n", &up->u_pcb.pcb_regs[F0]); - printf("#define\tU_PCB_CONTEXT %d\n", &up->u_pcb.pcb_context); - printf("#define\tU_PCB_ONFAULT %d\n", &up->u_pcb.pcb_onfault); - printf("#define\tU_PCB_SEGTAB %d\n", &up->u_pcb.pcb_segtab); - printf("#define\tVM_MIN_ADDRESS 0x%x\n", VM_MIN_ADDRESS); - printf("#define\tVM_MIN_KERNEL_ADDRESS 0x%x\n", VM_MIN_KERNEL_ADDRESS); - printf("#define\tV_SWTCH %d\n", &vm->v_swtch); - printf("#define\tSIGILL %d\n", SIGILL); - printf("#define\tSIGFPE %d\n", SIGFPE); - exit(0); -} diff --git a/sys/arch/pmax/pmax/kmin.h b/sys/arch/pmax/pmax/kmin.h index 9444d522661..bf7b7d3c430 100644 --- a/sys/arch/pmax/pmax/kmin.h +++ b/sys/arch/pmax/pmax/kmin.h @@ -1,4 +1,4 @@ -/* $NetBSD: kmin.h,v 1.4 1994/10/26 21:10:25 cgd Exp $ */ +/* $NetBSD: kmin.h,v 1.5 1996/01/31 08:46:47 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -154,23 +154,23 @@ #define KMIN_SYS_ASIC ( KMIN_PHYS_TC_3_START + 0x0000000 ) -#define KMIN_SYS_ROM_START ( KMIN_SYS_ASIC + ASIC_SLOT_0_START ) +#define KMIN_SYS_ROM_START ( KMIN_SYS_ASIC + IOASIC_SLOT_0_START ) -#define KMIN_SYS_ASIC_REGS ( KMIN_SYS_ASIC + ASIC_SLOT_1_START ) +#define KMIN_SYS_ASIC_REGS ( KMIN_SYS_ASIC + IOASIC_SLOT_1_START ) -#define KMIN_SYS_ETHER_ADDRESS ( KMIN_SYS_ASIC + ASIC_SLOT_2_START ) +#define KMIN_SYS_ETHER_ADDRESS ( KMIN_SYS_ASIC + IOASIC_SLOT_2_START ) -#define KMIN_SYS_LANCE ( KMIN_SYS_ASIC + ASIC_SLOT_3_START ) +#define KMIN_SYS_LANCE ( KMIN_SYS_ASIC + IOASIC_SLOT_3_START ) -#define KMIN_SYS_SCC_0 ( KMIN_SYS_ASIC + ASIC_SLOT_4_START ) +#define KMIN_SYS_SCC_0 ( KMIN_SYS_ASIC + IOASIC_SLOT_4_START ) -#define KMIN_SYS_SCC_1 ( KMIN_SYS_ASIC + ASIC_SLOT_6_START ) +#define KMIN_SYS_SCC_1 ( KMIN_SYS_ASIC + IOASIC_SLOT_6_START ) -#define KMIN_SYS_CLOCK ( KMIN_SYS_ASIC + ASIC_SLOT_8_START ) +#define KMIN_SYS_CLOCK ( KMIN_SYS_ASIC + IOASIC_SLOT_8_START ) -#define KMIN_SYS_SCSI ( KMIN_SYS_ASIC + ASIC_SLOT_12_START ) +#define KMIN_SYS_SCSI ( KMIN_SYS_ASIC + IOASIC_SLOT_12_START ) -#define KMIN_SYS_SCSI_DMA ( KMIN_SYS_ASIC + ASIC_SLOT_14_START ) +#define KMIN_SYS_SCSI_DMA ( KMIN_SYS_ASIC + IOASIC_SLOT_14_START ) #define KMIN_SYS_BOOT_ROM_START ( KMIN_PHYS_TC_3_START + 0x3c00000 ) #define KMIN_SYS_BOOT_ROM_END ( KMIN_PHYS_TC_3_START + 0x3c40000 ) @@ -198,30 +198,30 @@ #define KMIN_REG_BOOT 0x0e000008 /* Boot 0 register */ #define KMIN_REG_TIMEOUT 0x0e00000c /* Mem access timeout reg */ -#define KMIN_REG_SCSI_DMAPTR ( KMIN_SYS_ASIC + ASIC_SCSI_DMAPTR ) -#define KMIN_REG_SCSI_DMANPTR ( KMIN_SYS_ASIC + ASIC_SCSI_NEXTPTR ) -#define KMIN_REG_LANCE_DMAPTR ( KMIN_SYS_ASIC + ASIC_LANCE_DMAPTR ) -#define KMIN_REG_SCC_T1_DMAPTR ( KMIN_SYS_ASIC + ASIC_SCC_T1_DMAPTR ) -#define KMIN_REG_SCC_R1_DMAPTR ( KMIN_SYS_ASIC + ASIC_SCC_R1_DMAPTR ) -#define KMIN_REG_SCC_T2_DMAPTR ( KMIN_SYS_ASIC + ASIC_SCC_T2_DMAPTR ) -#define KMIN_REG_SCC_R2_DMAPTR ( KMIN_SYS_ASIC + ASIC_SCC_R2_DMAPTR ) -#define KMIN_REG_CSR ( KMIN_SYS_ASIC + ASIC_CSR ) -#define KMIN_REG_INTR ( KMIN_SYS_ASIC + ASIC_INTR ) -#define KMIN_REG_IMSK ( KMIN_SYS_ASIC + ASIC_IMSK ) -#define KMIN_REG_CURADDR ( KMIN_SYS_ASIC + ASIC_CURADDR ) - -#define KMIN_REG_LANCE_DECODE ( KMIN_SYS_ASIC + ASIC_LANCE_DECODE ) -#define KMIN_REG_SCSI_DECODE ( KMIN_SYS_ASIC + ASIC_SCSI_DECODE ) -#define KMIN_REG_SCC0_DECODE ( KMIN_SYS_ASIC + ASIC_SCC0_DECODE ) -#define KMIN_REG_SCC1_DECODE ( KMIN_SYS_ASIC + ASIC_SCC1_DECODE ) +#define KMIN_REG_SCSI_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCSI_DMAPTR ) +#define KMIN_REG_SCSI_DMANPTR ( KMIN_SYS_ASIC + IOASIC_SCSI_NEXTPTR ) +#define KMIN_REG_LANCE_DMAPTR ( KMIN_SYS_ASIC + IOASIC_LANCE_DMAPTR ) +#define KMIN_REG_SCC_T1_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCC_T1_DMAPTR ) +#define KMIN_REG_SCC_R1_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCC_R1_DMAPTR ) +#define KMIN_REG_SCC_T2_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCC_T2_DMAPTR ) +#define KMIN_REG_SCC_R2_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCC_R2_DMAPTR ) +#define KMIN_REG_CSR ( KMIN_SYS_ASIC + IOASIC_CSR ) +#define KMIN_REG_INTR ( KMIN_SYS_ASIC + IOASIC_INTR ) +#define KMIN_REG_IMSK ( KMIN_SYS_ASIC + IOASIC_IMSK ) +#define KMIN_REG_CURADDR ( KMIN_SYS_ASIC + IOASIC_CURADDR ) + +#define KMIN_REG_LANCE_DECODE ( KMIN_SYS_ASIC + IOASIC_LANCE_DECODE ) +#define KMIN_REG_SCSI_DECODE ( KMIN_SYS_ASIC + IOASIC_SCSI_DECODE ) +#define KMIN_REG_SCC0_DECODE ( KMIN_SYS_ASIC + IOASIC_SCC0_DECODE ) +#define KMIN_REG_SCC1_DECODE ( KMIN_SYS_ASIC + IOASIC_SCC1_DECODE ) # define KMIN_LANCE_CONFIG 3 # define KMIN_SCSI_CONFIG 14 # define KMIN_SCC0_CONFIG (0x10|4) # define KMIN_SCC1_CONFIG (0x10|6) -#define KMIN_REG_SCSI_SCR ( KMIN_SYS_ASIC + ASIC_SCSI_SCR ) -#define KMIN_REG_SCSI_SDR0 ( KMIN_SYS_ASIC + ASIC_SCSI_SDR0 ) -#define KMIN_REG_SCSI_SDR1 ( KMIN_SYS_ASIC + ASIC_SCSI_SDR1 ) +#define KMIN_REG_SCSI_SCR ( KMIN_SYS_ASIC + IOASIC_SCSI_SCR ) +#define KMIN_REG_SCSI_SDR0 ( KMIN_SYS_ASIC + IOASIC_SCSI_SDR0 ) +#define KMIN_REG_SCSI_SDR1 ( KMIN_SYS_ASIC + IOASIC_SCSI_SDR1 ) /* @@ -287,13 +287,13 @@ /* (re)defines for the system Status and Control register (SSR) */ -#define KMIN_CSR_DMAEN_T1 ASIC_CSR_DMAEN_T1 -#define KMIN_CSR_DMAEN_R1 ASIC_CSR_DMAEN_R1 -#define KMIN_CSR_DMAEN_T2 ASIC_CSR_DMAEN_T2 -#define KMIN_CSR_DMAEN_R2 ASIC_CSR_DMAEN_R2 -#define KMIN_CSR_SCSI_DIR ASIC_CSR_SCSI_DIR -#define KMIN_CSR_DMAEN_SCSI ASIC_CSR_DMAEN_SCSI -#define KMIN_CSR_DMAEN_LANCE ASIC_CSR_DMAEN_LANCE +#define KMIN_CSR_DMAEN_T1 IOASIC_CSR_DMAEN_T1 +#define KMIN_CSR_DMAEN_R1 IOASIC_CSR_DMAEN_R1 +#define KMIN_CSR_DMAEN_T2 IOASIC_CSR_DMAEN_T2 +#define KMIN_CSR_DMAEN_R2 IOASIC_CSR_DMAEN_R2 +#define KMIN_CSR_SCSI_DIR IOASIC_CSR_SCSI_DIR +#define KMIN_CSR_DMAEN_SCSI IOASIC_CSR_DMAEN_SCSI +#define KMIN_CSR_DMAEN_LANCE IOASIC_CSR_DMAEN_LANCE #define KMIN_CSR_DIAGDN 0x00008000 /* rw */ #define KMIN_CSR_TXDIS_2 0x00004000 /* rw */ #define KMIN_CSR_TXDIS_1 0x00002000 /* rw */ @@ -305,18 +305,18 @@ /* (re)defines for the System Interrupt and Mask Registers */ -#define KMIN_INTR_T1_PAGE_END ASIC_INTR_T1_PAGE_END -#define KMIN_INTR_T1_READ_E ASIC_INTR_T1_READ_E -#define KMIN_INTR_R1_HALF_PAGE ASIC_INTR_R1_HALF_PAGE -#define KMIN_INTR_R1_DMA_OVRUN ASIC_INTR_R1_DMA_OVRUN -#define KMIN_INTR_T2_PAGE_END ASIC_INTR_T2_PAGE_END -#define KMIN_INTR_T2_READ_E ASIC_INTR_T2_READ_E -#define KMIN_INTR_R2_HALF_PAGE ASIC_INTR_R2_HALF_PAGE -#define KMIN_INTR_R2_DMA_OVRUN ASIC_INTR_R2_DMA_OVRUN -#define KMIN_INTR_SCSI_PTR_LOAD ASIC_INTR_SCSI_PTR_LOAD -#define KMIN_INTR_SCSI_OVRUN ASIC_INTR_SCSI_OVRUN -#define KMIN_INTR_SCSI_READ_E ASIC_INTR_SCSI_READ_E -#define KMIN_INTR_LANCE_READ_E ASIC_INTR_LANCE_READ_E +#define KMIN_INTR_T1_PAGE_END IOASIC_INTR_T1_PAGE_END +#define KMIN_INTR_T1_READ_E IOASIC_INTR_T1_READ_E +#define KMIN_INTR_R1_HALF_PAGE IOASIC_INTR_R1_HALF_PAGE +#define KMIN_INTR_R1_DMA_OVRUN IOASIC_INTR_R1_DMA_OVRUN +#define KMIN_INTR_T2_PAGE_END IOASIC_INTR_T2_PAGE_END +#define KMIN_INTR_T2_READ_E IOASIC_INTR_T2_READ_E +#define KMIN_INTR_R2_HALF_PAGE IOASIC_INTR_R2_HALF_PAGE +#define KMIN_INTR_R2_DMA_OVRUN IOASIC_INTR_R2_DMA_OVRUN +#define KMIN_INTR_SCSI_PTR_LOAD IOASIC_INTR_SCSI_PTR_LOAD +#define KMIN_INTR_SCSI_OVRUN IOASIC_INTR_SCSI_OVRUN +#define KMIN_INTR_SCSI_READ_E IOASIC_INTR_SCSI_READ_E +#define KMIN_INTR_LANCE_READ_E IOASIC_INTR_LANCE_READ_E #define KMIN_INTR_NVR_JUMPER 0x00004000 /* ro */ #define KMIN_INTR_TIMEOUT 0x00001000 /* ro */ #define KMIN_INTR_NRMOD_JUMPER 0x00000400 /* ro */ diff --git a/sys/arch/pmax/pmax/kn01var.h b/sys/arch/pmax/pmax/kn01var.h new file mode 100644 index 00000000000..64b9a87f583 --- /dev/null +++ b/sys/arch/pmax/pmax/kn01var.h @@ -0,0 +1,25 @@ +/* + * Declarations for the Decstation 3100 and 2100 + */ + +#ifndef _KN01VAR_H +#define _KN01VAR_H + +extern int kn01_intr __P((unsigned mask, unsigned pc, + unsigned statusReg, unsigned causeReg)); + +/* + * old-style, 4.4bsd kn01 interrupt establish function + */ +void kn01_enable_intr __P((u_int slotno, + int (*handler) __P((void* softc)), + void *sc, int onoff)); + + +/* + * new-style kn01 interrupt establish function (not yet finished) + */ +void +kn01_intr_establish __P((struct device *parent, void * cookie, int level, + int (*handler) __P((intr_arg_t)), intr_arg_t arg)); +#endif /* _KN01VAR_H */ diff --git a/sys/arch/pmax/pmax/kn03.h b/sys/arch/pmax/pmax/kn03.h index eecd29834bd..d54a8608cad 100644 --- a/sys/arch/pmax/pmax/kn03.h +++ b/sys/arch/pmax/pmax/kn03.h @@ -1,4 +1,4 @@ -/* $NetBSD: kn03.h,v 1.4 1994/10/26 21:10:29 cgd Exp $ */ +/* $NetBSD: kn03.h,v 1.5 1996/01/31 08:46:49 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -122,18 +122,18 @@ #define KN03_SYS_ASIC ( KN03_PHYS_TC_3_START + 0x0000000 ) -#define KN03_SYS_ROM_START ( KN03_SYS_ASIC + ASIC_SLOT_0_START ) -#define KN03_SYS_ASIC_REGS ( KN03_SYS_ASIC + ASIC_SLOT_1_START ) -#define KN03_SYS_ETHER_ADDRESS ( KN03_SYS_ASIC + ASIC_SLOT_2_START ) -#define KN03_SYS_LANCE ( KN03_SYS_ASIC + ASIC_SLOT_3_START ) -#define KN03_SYS_SCC_0 ( KN03_SYS_ASIC + ASIC_SLOT_4_START ) -#define KN03_SYS_SCC_1 ( KN03_SYS_ASIC + ASIC_SLOT_6_START ) -#define KN03_SYS_CLOCK ( KN03_SYS_ASIC + ASIC_SLOT_8_START ) -#define KN03_SYS_ERRADR ( KN03_SYS_ASIC + ASIC_SLOT_9_START ) -#define KN03_SYS_ERRSYN ( KN03_SYS_ASIC + ASIC_SLOT_10_START ) -#define KN03_SYS_CSR ( KN03_SYS_ASIC + ASIC_SLOT_11_START ) -#define KN03_SYS_SCSI ( KN03_SYS_ASIC + ASIC_SLOT_12_START ) -#define KN03_SYS_SCSI_DMA ( KN03_SYS_ASIC + ASIC_SLOT_14_START ) +#define KN03_SYS_ROM_START ( KN03_SYS_ASIC + IOASIC_SLOT_0_START ) +#define KN03_SYS_ASIC_REGS ( KN03_SYS_ASIC + IOASIC_SLOT_1_START ) +#define KN03_SYS_ETHER_ADDRESS ( KN03_SYS_ASIC + IOASIC_SLOT_2_START ) +#define KN03_SYS_LANCE ( KN03_SYS_ASIC + IOASIC_SLOT_3_START ) +#define KN03_SYS_SCC_0 ( KN03_SYS_ASIC + IOASIC_SLOT_4_START ) +#define KN03_SYS_SCC_1 ( KN03_SYS_ASIC + IOASIC_SLOT_6_START ) +#define KN03_SYS_CLOCK ( KN03_SYS_ASIC + IOASIC_SLOT_8_START ) +#define KN03_SYS_ERRADR ( KN03_SYS_ASIC + IOASIC_SLOT_9_START ) +#define KN03_SYS_ERRSYN ( KN03_SYS_ASIC + IOASIC_SLOT_10_START ) +#define KN03_SYS_CSR ( KN03_SYS_ASIC + IOASIC_SLOT_11_START ) +#define KN03_SYS_SCSI ( KN03_SYS_ASIC + IOASIC_SLOT_12_START ) +#define KN03_SYS_SCSI_DMA ( KN03_SYS_ASIC + IOASIC_SLOT_14_START ) #define KN03_SYS_BOOT_ROM_START ( KN03_PHYS_TC_3_START + 0x400000 ) #define KN03_SYS_BOOT_ROM_END ( KN03_PHYS_TC_3_START + 0x43ffff ) @@ -147,30 +147,30 @@ #define KN03_INT_RTC IP_LEV3 /* RTC clock */ #define KN03_INT_ASIC IP_LEV2 /* All turbochannel */ -#define KN03_REG_SCSI_DMAPTR ( KN03_SYS_ASIC + ASIC_SCSI_DMAPTR ) -#define KN03_REG_SCSI_DMANPTR ( KN03_SYS_ASIC + ASIC_SCSI_NEXTPTR ) -#define KN03_REG_LANCE_DMAPTR ( KN03_SYS_ASIC + ASIC_LANCE_DMAPTR ) -#define KN03_REG_SCC_T1_DMAPTR ( KN03_SYS_ASIC + ASIC_SCC_T1_DMAPTR ) -#define KN03_REG_SCC_R1_DMAPTR ( KN03_SYS_ASIC + ASIC_SCC_R1_DMAPTR ) -#define KN03_REG_SCC_T2_DMAPTR ( KN03_SYS_ASIC + ASIC_SCC_T2_DMAPTR ) -#define KN03_REG_SCC_R2_DMAPTR ( KN03_SYS_ASIC + ASIC_SCC_R2_DMAPTR ) -#define KN03_REG_CSR ( KN03_SYS_ASIC + ASIC_CSR ) -#define KN03_REG_INTR ( KN03_SYS_ASIC + ASIC_INTR ) -#define KN03_REG_IMSK ( KN03_SYS_ASIC + ASIC_IMSK ) -#define KN03_REG_CURADDR ( KN03_SYS_ASIC + ASIC_CURADDR ) - -#define KN03_REG_LANCE_DECODE ( KN03_SYS_ASIC + ASIC_LANCE_DECODE ) -#define KN03_REG_SCSI_DECODE ( KN03_SYS_ASIC + ASIC_SCSI_DECODE ) -#define KN03_REG_SCC0_DECODE ( KN03_SYS_ASIC + ASIC_SCC0_DECODE ) -#define KN03_REG_SCC1_DECODE ( KN03_SYS_ASIC + ASIC_SCC1_DECODE ) +#define KN03_REG_SCSI_DMAPTR ( KN03_SYS_ASIC + IOASIC_SCSI_DMAPTR ) +#define KN03_REG_SCSI_DMANPTR ( KN03_SYS_ASIC + IOASIC_SCSI_NEXTPTR ) +#define KN03_REG_LANCE_DMAPTR ( KN03_SYS_ASIC + IOASIC_LANCE_DMAPTR ) +#define KN03_REG_SCC_T1_DMAPTR ( KN03_SYS_ASIC + IOASIC_SCC_T1_DMAPTR ) +#define KN03_REG_SCC_R1_DMAPTR ( KN03_SYS_ASIC + IOASIC_SCC_R1_DMAPTR ) +#define KN03_REG_SCC_T2_DMAPTR ( KN03_SYS_ASIC + IOASIC_SCC_T2_DMAPTR ) +#define KN03_REG_SCC_R2_DMAPTR ( KN03_SYS_ASIC + IOASIC_SCC_R2_DMAPTR ) +#define KN03_REG_CSR ( KN03_SYS_ASIC + IOASIC_CSR ) +#define KN03_REG_INTR ( KN03_SYS_ASIC + IOASIC_INTR ) +#define KN03_REG_IMSK ( KN03_SYS_ASIC + IOASIC_IMSK ) +#define KN03_REG_CURADDR ( KN03_SYS_ASIC + IOASIC_CURADDR ) + +#define KN03_REG_LANCE_DECODE ( KN03_SYS_ASIC + IOASIC_LANCE_DECODE ) +#define KN03_REG_SCSI_DECODE ( KN03_SYS_ASIC + IOASIC_SCSI_DECODE ) +#define KN03_REG_SCC0_DECODE ( KN03_SYS_ASIC + IOASIC_SCC0_DECODE ) +#define KN03_REG_SCC1_DECODE ( KN03_SYS_ASIC + IOASIC_SCC1_DECODE ) # define KN03_LANCE_CONFIG 3 # define KN03_SCSI_CONFIG 14 # define KN03_SCC0_CONFIG (0x10|4) # define KN03_SCC1_CONFIG (0x10|6) -#define KN03_REG_SCSI_SCR ( KN03_SYS_ASIC + ASIC_SCSI_SCR ) -#define KN03_REG_SCSI_SDR0 ( KN03_SYS_ASIC + ASIC_SCSI_SDR0 ) -#define KN03_REG_SCSI_SDR1 ( KN03_SYS_ASIC + ASIC_SCSI_SDR1 ) +#define KN03_REG_SCSI_SCR ( KN03_SYS_ASIC + IOASIC_SCSI_SCR ) +#define KN03_REG_SCSI_SDR0 ( KN03_SYS_ASIC + IOASIC_SCSI_SDR0 ) +#define KN03_REG_SCSI_SDR1 ( KN03_SYS_ASIC + IOASIC_SCSI_SDR1 ) /* NOTES @@ -208,18 +208,18 @@ /* (re)defines for the System Interrupt and Mask Registers */ -#define KN03_INTR_T1_PAGE_END ASIC_INTR_T1_PAGE_END -#define KN03_INTR_T1_READ_E ASIC_INTR_T1_READ_E -#define KN03_INTR_R1_HALF_PAGE ASIC_INTR_R1_HALF_PAGE -#define KN03_INTR_R1_DMA_OVRUN ASIC_INTR_R1_DMA_OVRUN -#define KN03_INTR_T2_PAGE_END ASIC_INTR_T2_PAGE_END -#define KN03_INTR_T2_READ_E ASIC_INTR_T2_READ_E -#define KN03_INTR_R2_HALF_PAGE ASIC_INTR_R2_HALF_PAGE -#define KN03_INTR_R2_DMA_OVRUN ASIC_INTR_R2_DMA_OVRUN -#define KN03_INTR_SCSI_PTR_LOAD ASIC_INTR_SCSI_PTR_LOAD -#define KN03_INTR_SCSI_OVRUN ASIC_INTR_SCSI_OVRUN -#define KN03_INTR_SCSI_READ_E ASIC_INTR_SCSI_READ_E -#define KN03_INTR_LANCE_READ_E ASIC_INTR_LANCE_READ_E +#define KN03_INTR_T1_PAGE_END IOASIC_INTR_T1_PAGE_END +#define KN03_INTR_T1_READ_E IOASIC_INTR_T1_READ_E +#define KN03_INTR_R1_HALF_PAGE IOASIC_INTR_R1_HALF_PAGE +#define KN03_INTR_R1_DMA_OVRUN IOASIC_INTR_R1_DMA_OVRUN +#define KN03_INTR_T2_PAGE_END IOASIC_INTR_T2_PAGE_END +#define KN03_INTR_T2_READ_E IOASIC_INTR_T2_READ_E +#define KN03_INTR_R2_HALF_PAGE IOASIC_INTR_R2_HALF_PAGE +#define KN03_INTR_R2_DMA_OVRUN IOASIC_INTR_R2_DMA_OVRUN +#define KN03_INTR_SCSI_PTR_LOAD IOASIC_INTR_SCSI_PTR_LOAD +#define KN03_INTR_SCSI_OVRUN IOASIC_INTR_SCSI_OVRUN +#define KN03_INTR_SCSI_READ_E IOASIC_INTR_SCSI_READ_E +#define KN03_INTR_LANCE_READ_E IOASIC_INTR_LANCE_READ_E #define KN03_INTR_NVR_JUMPER 0x00004000 /* ro */ #define KN03_INTR_TC_2 0x00002000 /* ro */ #define KN03_INTR_TC_1 0x00001000 /* ro */ diff --git a/sys/arch/pmax/pmax/locore.S b/sys/arch/pmax/pmax/locore.S index fad99ae3b21..4d628d1d626 100644 --- a/sys/arch/pmax/pmax/locore.S +++ b/sys/arch/pmax/pmax/locore.S @@ -1,4 +1,9 @@ -/* $NetBSD: locore.S,v 1.17 1995/12/20 02:00:32 jonathan Exp $ */ +/* $NetBSD: locore.S,v 1.21 1996/05/19 00:25:14 jonathan Exp $ */ + +/* + * locore file for either "new" merged MIPS-I/MIPS-II kernels or + * old-style pmax kernels + */ /* * Copyright (c) 1992, 1993 @@ -95,6 +100,9 @@ start: bne t1, t3, 1b # NB: always executes next tlbwi # Write the TLB entry. +/* + * Initialize stack and call machine startup. + */ la sp, start - START_FRAME #ifdef __GP_SUPPORT__ la gp, _C_LABEL(_gp) @@ -104,12 +112,17 @@ start: sw zero, START_FRAME - 8(sp) # Zero out old fp for debugger li t0, MACH_SR_COP_1_BIT # Disable interrupts and - mtc0 t0, MACH_COP_0_STATUS_REG # enable the coprocessor + mtc0 t0, MACH_COP_0_STATUS_REG # enable the fp coprocessor li sp, KERNELSTACK - START_FRAME # switch to standard stack mfc0 t0, MACH_COP_0_PRID # read processor ID register + + nop # XXX r4000 pipeline: + nop # wait for new status to + nop # to be effective + nop cfc1 t1, MACH_FPC_ID # read FPU ID register - sw t0, _C_LABEL(cpu) # save PRID register - sw t1, _C_LABEL(fpu) # save FPU ID register + sw t0, _C_LABEL(cpu_id) # save PRID register + sw t1, _C_LABEL(fpu_id) # save FPU ID register jal _C_LABEL(main) # main(regs) move a0, zero /* @@ -516,6 +529,20 @@ smallcpy: nop END(memcpy) +/* + * fillw(pat, addr, count) + */ +LEAF(fillw) +1: + addiu a2, a2, -1 + sh a0, 0(a1) + bne a2,zero, 1b + addiu a1, a1, 2 + + jr ra + nop +END(fillw) + /* * Copy a null terminated string within the kernel address space. * Maxlength may be null if count not wanted. @@ -877,7 +904,7 @@ END(switch_exit) * profiling. */ LEAF(idle) - li t0, (MACH_INT_MASK | MACH_SR_INT_ENA_CUR) + li t0, (MACH_INT_MASK | MIPS_SR_INT_IE) mtc0 t0, MACH_COP_0_STATUS_REG # enable all interrupts sw zero, _C_LABEL(curproc) # set curproc NULL for stats 1: @@ -1145,10 +1172,28 @@ LEAF(_remque) END(_remque) /* + * GCC2 seems to want to call __main in main() for some reason. + */ +LEAF(__main) + j ra + nop +END(__main) + +/* + *---------------------------------------------------------------------------- + * + * mips_r2000_UTLBmiss -- + * MachUTLBmiss -- + * + * Vector code for a MIPS-I user-space TLB miss from user-space. + * + * * This code is copied to the UTLB exception vector address to * handle user level TLB translation misses. * NOTE: This code must be relocatable!!! */ + .globl _C_LABEL(mips_R2000_UTLBMiss) +_C_LABEL(mips_R2000_UTLBMiss): .globl _C_LABEL(MachUTLBMiss) _C_LABEL(MachUTLBMiss): .set noat @@ -1184,33 +1229,148 @@ _C_LABEL(MachUTLBMiss): .globl _C_LABEL(MachUTLBMissEnd) _C_LABEL(MachUTLBMissEnd): + .globl _C_LABEL(mips_R2000_UTLBMissEnd) +_C_LABEL(mips_R2000_UTLBMissEnd): + + /* - * GCC2 seems to want to call __main in main() for some reason. + *---------------------------------------------------------------------------- + * + * mips_R2000_execption -- + * + * Vector code for the general exception vector 0x80000080 + * on an r2000 or r3000. + * + * This code is copied to the general exception vector address to + * handle all execptions except RESET and UTLBMiss. + * NOTE: This code must be relocatable!!! + * + *---------------------------------------------------------------------------- */ -LEAF(__main) - j ra + .globl _C_LABEL(mips_R2000_exception) +_C_LABEL(mips_R2000_exception): +/* + * Find out what mode we came from and jump to the proper handler. + */ + .set noat + mfc0 k0, MACH_COP_0_STATUS_REG # Get the status register + mfc0 k1, MACH_COP_0_CAUSE_REG # Get the cause register value. + and k0, k0, MIPS_3K_SR_KU_PREV # test for user mode + sll k0, k0, 4 # shift user bit for cause index + and k1, k1, MIPS_3K_CR_EXC_CODE # Mask out the cause bits. + or k1, k1, k0 # change index to user table +1: + la k0, _C_LABEL(machExceptionTable) # get base of the jump table + addu k0, k0, k1 # Get the address of the + # function entry. Note that + # the cause is already + # shifted left by 2 bits so + # we dont have to shift. + lw k0, 0(k0) # Get the function address nop -END(__main) + j k0 # Jump to the function. + nop + .set at + .globl _C_LABEL(mips_R2000_exceptionEnd) +_C_LABEL(mips_R2000_exceptionEnd): + + + +#ifdef R4000 /* XXX doesn't assemble in default pmax kernel */ + +/* + *---------------------------------------------------------------------------- + * + * mips_R4000_TLBMiss -- + * MachTLBMiss -- + * + * Vector code for the TLB-miss exception vector 0x80000180 + * on an r4000. + * + * This code is copied to the TLB exception vector address to + * handle TLB translation misses. + * NOTE: This code must be relocatable and max 32 instructions!!! + * Don't check for invalid pte's here. We load them as well and + * let the processor trap to load the correct value after service. + * + *---------------------------------------------------------------------------- + */ + .globl _C_LABEL(mips_R4000_TLBMiss) +_C_LABEL(mips_R4000_TLBMiss): + .globl _C_LABEL(MachTLBMiss) +_C_LABEL(MachTLBMiss): + .set noat + dmfc0 k0, MACH_COP_0_BAD_VADDR # get the virtual address + lw k1, UADDR+U_PCB_SEGTAB # get the current segment table + bltz k0, 1f # kernel address space -> + srl k0, k0, SEGSHIFT - 2 # compute segment table index + andi k0, k0, 0x7fc # PMAP_SEGTABSIZ-1 + addu k1, k1, k0 + dmfc0 k0, MACH_COP_0_BAD_VADDR # get the virtual address + lw k1, 0(k1) # get pointer to segment map + srl k0, k0, PGSHIFT - 2 # compute segment map index + andi k0, k0, ((NPTEPG/2) - 1) << 3 + beq k1, zero, 2f # invalid segment map + addu k1, k1, k0 # index into segment map + lw k0, 0(k1) # get page PTE + lw k1, 4(k1) + dsll k0, k0, 34 + dsrl k0, k0, 34 + dmtc0 k0, MACH_COP_0_TLB_LO0 + dsll k1, k1, 34 + dsrl k1, k1, 34 + dmtc0 k1, MACH_COP_0_TLB_LO1 + nop + tlbwr # update TLB + nop + nop + nop + nop + nop + eret +1: + j MachTLBMissException + nop +2: + j SlowFault + nop + + .globl _C_LABEL(MachTLBMissEnd) +C_LABEL(MachTLBMissEnd): + .globl _C_LABEL(mips_R4000_TLBMissEnd) +_C_LABEL(mips_R4000_TLBMissEnd): + .set at +#endif /* XXX doesn't assemble in default pmax kernel *//* - /* + + *---------------------------------------------------------------------------- + * + * Mips_R4000_execption -- + * + * Vector code for the general exception vector 0x80000080 + * on an r4000 or r4400. + * * This code is copied to the general exception vector address to - * handle all execptions except RESET and UTLBMiss. + * handle all execptions except RESET and TLBMiss. * NOTE: This code must be relocatable!!! + *---------------------------------------------------------------------------- */ - .globl _C_LABEL(MachException) -_C_LABEL(MachException): + .globl mips_r4000_exception +_C_LABEL(mips_R4000_exception): /* * Find out what mode we came from and jump to the proper handler. */ .set noat mfc0 k0, MACH_COP_0_STATUS_REG # Get the status register mfc0 k1, MACH_COP_0_CAUSE_REG # Get the cause register value. - and k0, k0, MACH_SR_KU_PREV # test for user mode + and k0, k0, MIPS_4K_SR_KSU_USER # test for user mode + # sneaky but the bits are + # with us........ sll k0, k0, 3 # shift user bit for cause index - and k1, k1, MACH_CR_EXC_CODE # Mask out the cause bits. + and k1, k1, MIPS_4K_CR_EXC_CODE # Mask out the cause bits. or k1, k1, k0 # change index to user table 1: - la k0, _C_LABEL(machExceptionTable) # get base of the jump table + la k0, machExceptionTable # get base of the jump table addu k0, k0, k1 # Get the address of the # function entry. Note that # the cause is already @@ -1221,8 +1381,9 @@ _C_LABEL(MachException): j k0 # Jump to the function. nop .set at - .globl _C_LABEL(MachExceptionEnd) -_C_LABEL(MachExceptionEnd): + .globl mips_R4000_exceptionEnd +_C_LABEL(mips_R4000_exceptionEnd): + /* * We couldn't find a TLB entry. @@ -1268,6 +1429,7 @@ SlowFault: #define KERN_EXC_FRAME_SIZE (STAND_FRAME_SIZE + KERN_REG_SIZE + 12) NNON_LEAF(MachKernGenException, KERN_EXC_FRAME_SIZE, ra) +ALEAF(mips_r2000_KernGenException) .set noat #ifdef KADB la k0, kdbpcb # save registers for kadb @@ -1372,6 +1534,7 @@ END(MachKernGenException) *---------------------------------------------------------------------------- */ NNON_LEAF(MachUserGenException, STAND_FRAME_SIZE, ra) +ALEAF(mips_r2000_UserGenException) .set noat .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) /* @@ -1497,6 +1660,7 @@ END(MachUserGenException) #define KINTR_FRAME_SIZE (STAND_FRAME_SIZE + KERN_REG_SIZE + 16) NNON_LEAF(MachKernIntr, KINTR_FRAME_SIZE, ra) +ALEAF(mips_r2000_KernIntr) .set noat subu sp, sp, KINTR_FRAME_SIZE # allocate stack frame .mask 0x80000000, (STAND_RA_OFFSET - KINTR_FRAME_SIZE) @@ -1594,6 +1758,7 @@ END(MachKernIntr) *---------------------------------------------------------------------------- */ NNON_LEAF(MachUserIntr, STAND_FRAME_SIZE, ra) +ALEAF(mips_r2000_UserIntr) .set noat .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) /* @@ -1691,7 +1856,7 @@ NNON_LEAF(MachUserIntr, STAND_FRAME_SIZE, ra) sw s6, UADDR+U_PCB_REGS+(S6 * 4) sw s7, UADDR+U_PCB_REGS+(S7 * 4) sw s8, UADDR+U_PCB_REGS+(S8 * 4) - li t0, MACH_HARD_INT_MASK | MACH_SR_INT_ENA_CUR + li t0, MACH_HARD_INT_MASK | MIPS_SR_INT_IE /* * Call the software interrupt handler. */ @@ -1741,121 +1906,12 @@ NNON_LEAF(MachUserIntr, STAND_FRAME_SIZE, ra) .set at END(MachUserIntr) -#if 0 -/*---------------------------------------------------------------------------- - * - * MachTLBModException -- - * - * Handle a TLB modified exception. - * The BaddVAddr, Context, and EntryHi registers contain the failed - * virtual address. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -NLEAF(MachTLBModException) - .set noat - tlbp # find the TLB entry - mfc0 k0, MACH_COP_0_TLB_LOW # get the physical address - mfc0 k1, MACH_COP_0_TLB_INDEX # check to be sure its valid - or k0, k0, VMMACH_TLB_MOD_BIT # update TLB - blt k1, zero, 4f # not found!!! - mtc0 k0, MACH_COP_0_TLB_LOW - li k1, MACH_CACHED_MEMORY_ADDR - subu k0, k0, k1 - srl k0, k0, VMMACH_TLB_PHYS_PAGE_SHIFT - la k1, pmap_attributes - addu k0, k0, k1 - lbu k1, 0(k0) # fetch old value - nop - or k1, k1, 1 # set modified bit - sb k1, 0(k0) # save new value - mfc0 k0, MACH_COP_0_EXC_PC # get return address - nop - j k0 - rfe -4: - break 0 # panic - .set at -END(MachTLBModException) -#endif - -/*---------------------------------------------------------------------------- - * - * MachTLBMissException -- - * - * Handle a TLB miss exception from kernel mode. - * The BaddVAddr, Context, and EntryHi registers contain the failed - * virtual address. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -NLEAF(MachTLBMissException) - .set noat - mfc0 k0, MACH_COP_0_BAD_VADDR # get the fault address - li k1, VM_MIN_KERNEL_ADDRESS # compute index - subu k0, k0, k1 - lw k1, _C_LABEL(Sysmapsize) # index within range? - srl k0, k0, PGSHIFT - sltu k1, k0, k1 - beq k1, zero, 1f # No. check for valid stack - nop - lw k1, _C_LABEL(Sysmap) - sll k0, k0, 2 # compute offset from index - addu k1, k1, k0 - lw k0, 0(k1) # get PTE entry - mfc0 k1, MACH_COP_0_EXC_PC # get return address - mtc0 k0, MACH_COP_0_TLB_LOW # save PTE entry - and k0, k0, PG_V # check for valid entry - beq k0, zero, _C_LABEL(MachKernGenException) # PTE invalid - nop - tlbwr # update TLB - j k1 - rfe - -1: - subu k0, sp, UADDR + 0x200 # check to see if we have a - sltiu k0, UPAGES*NBPG - 0x200 # valid kernel stack - bne k0, zero, _C_LABEL(MachKernGenException) # Go panic - nop - - la a0, start - START_FRAME - 8 # set sp to a valid place - sw sp, 24(a0) - move sp, a0 - la a0, 1f - mfc0 a2, MACH_COP_0_STATUS_REG - mfc0 a3, MACH_COP_0_CAUSE_REG - mfc0 a1, MACH_COP_0_EXC_PC - sw a2, 16(sp) - sw a3, 20(sp) - sw sp, 24(sp) - move a2, ra - jal _C_LABEL(printf) - mfc0 a3, MACH_COP_0_BAD_VADDR - .data -1: - .asciiz "ktlbmiss: PC %x RA %x ADR %x\nSR %x CR %x SP %x\n" - .text - la sp, start - START_FRAME # set sp to a valid place - PANIC("kernel stack overflow") - .set at -END(MachTLBMissException) /* * Set/clear software interrupt routines. */ + LEAF(setsoftclock) mfc0 v1, MACH_COP_0_STATUS_REG # save status register mtc0 zero, MACH_COP_0_STATUS_REG # disable interrupts (2 cycles) @@ -1918,7 +1974,7 @@ END(clearsoftnet) LEAF(MachEnableIntr) mfc0 v0, MACH_COP_0_STATUS_REG # read status register nop - or v0, v0, MACH_SR_INT_ENA_CUR + or v0, v0, MIPS_SR_INT_IE mtc0 v0, MACH_COP_0_STATUS_REG # enable all interrupts j ra nop @@ -1927,10 +1983,10 @@ END(MachEnableIntr) LEAF(spl0) mfc0 v0, MACH_COP_0_STATUS_REG # read status register nop - or t0, v0, (MACH_INT_MASK | MACH_SR_INT_ENA_CUR) + or t0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) mtc0 t0, MACH_COP_0_STATUS_REG # enable all interrupts j ra - and v0, v0, (MACH_INT_MASK | MACH_SR_INT_ENA_CUR) + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) END(spl0) LEAF(splsoftclock) @@ -1938,8 +1994,9 @@ LEAF(splsoftclock) li t0, ~MACH_SOFT_INT_MASK_0 # disable soft clock and t0, t0, v0 mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable on r4x00 j ra - and v0, v0, (MACH_INT_MASK | MACH_SR_INT_ENA_CUR) + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) END(splsoftclock) LEAF(splsoftnet) @@ -1948,7 +2005,7 @@ LEAF(splsoftnet) and t0, t0, v0 mtc0 t0, MACH_COP_0_STATUS_REG # save it j ra - and v0, v0, (MACH_INT_MASK | MACH_SR_INT_ENA_CUR) + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) END(splsoftnet) LEAF(Mach_spl0) @@ -1956,8 +2013,9 @@ LEAF(Mach_spl0) li t0, ~(MACH_INT_MASK_0|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) and t0, t0, v0 mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable on r4x00 j ra - and v0, v0, (MACH_INT_MASK | MACH_SR_INT_ENA_CUR) + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) END(Mach_spl0) LEAF(Mach_spl1) @@ -1965,8 +2023,9 @@ LEAF(Mach_spl1) li t0, ~(MACH_INT_MASK_1|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) and t0, t0, v0 mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable on r4x00 j ra - and v0, v0, (MACH_INT_MASK | MACH_SR_INT_ENA_CUR) + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) END(Mach_spl1) LEAF(Mach_spl2) @@ -1974,8 +2033,9 @@ LEAF(Mach_spl2) li t0, ~(MACH_INT_MASK_2|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) and t0, t0, v0 mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable on r4x00 j ra - and v0, v0, (MACH_INT_MASK | MACH_SR_INT_ENA_CUR) + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) END(Mach_spl2) LEAF(Mach_spl3) @@ -1983,10 +2043,32 @@ LEAF(Mach_spl3) li t0, ~(MACH_INT_MASK_3|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) and t0, t0, v0 mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable on r4x00 j ra - and v0, v0, (MACH_INT_MASK | MACH_SR_INT_ENA_CUR) + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) END(Mach_spl3) +LEAF(Mach_spl4) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register + li t0, ~(MACH_INT_MASK_4|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) + and t0, t0, v0 + mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable + j ra + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) +END(Mach_spl4) + +LEAF(Mach_spl5) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register + li t0, ~(MACH_INT_MASK_5|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) + and t0, t0, v0 + mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable + j ra + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) +END(Mach_spl5) + + /* * We define an alternate entry point after mcount is called so it * can be used in mcount without causeing a recursive loop. @@ -1994,11 +2076,12 @@ END(Mach_spl3) LEAF(splhigh) ALEAF(_splhigh) mfc0 v0, MACH_COP_0_STATUS_REG # read status register - li t0, ~MACH_SR_INT_ENA_CUR # disable all interrupts + li t0, ~MIPS_SR_INT_IE # disable all interrupts and t0, t0, v0 mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable on r4000 j ra - and v0, v0, (MACH_INT_MASK | MACH_SR_INT_ENA_CUR) + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) END(splhigh) /* @@ -2007,10 +2090,11 @@ END(splhigh) LEAF(splx) ALEAF(_splx) mfc0 v0, MACH_COP_0_STATUS_REG - li t0, ~(MACH_INT_MASK | MACH_SR_INT_ENA_CUR) + li t0, ~(MACH_INT_MASK | MIPS_SR_INT_IE) and t0, t0, v0 or t0, t0, a0 mtc0 t0, MACH_COP_0_STATUS_REG + nop # 3 ins to disable j ra nop END(splx) @@ -2044,33 +2128,159 @@ ALEAF(MachEmptyWriteBuffer) nop END(MachEmptyWriteBuffer) -/*-------------------------------------------------------------------------- + +/*---------------------------------------------------------------------------- * - * MachTLBWriteIndexed -- + * XXX START of r3000-specific code XXX * - * Write the given entry into the TLB at the given index. + *---------------------------------------------------------------------------- + */ + + + +#if 0 +/*---------------------------------------------------------------------------- * - * MachTLBWriteIndexed(index, highEntry, lowEntry) - * int index; - * int highEntry; - * int lowEntry; + * MachTLBModException -- + * + * Handle a TLB modified exception. + * The BaddVAddr, Context, and EntryHi registers contain the failed + * virtual address. * * Results: * None. * * Side effects: - * TLB entry set. + * None. * - *-------------------------------------------------------------------------- + *---------------------------------------------------------------------------- */ -LEAF(MachTLBWriteIndexed) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - mfc0 t0, MACH_COP_0_TLB_HI # Save the current PID. - - sll a0, a0, VMMACH_TLB_INDEX_SHIFT - mtc0 a0, MACH_COP_0_TLB_INDEX # Set the index. - mtc0 a1, MACH_COP_0_TLB_HI # Set up entry high. +NLEAF(MachTLBModException) +ALEAF(mips_r2000_TLBModException) + .set noat + tlbp # find the TLB entry + mfc0 k0, MACH_COP_0_TLB_LOW # get the physical address + mfc0 k1, MACH_COP_0_TLB_INDEX # check to be sure its valid + or k0, k0, VMMACH_TLB_MOD_BIT # update TLB + blt k1, zero, 4f # not found!!! + mtc0 k0, MACH_COP_0_TLB_LOW + li k1, MACH_CACHED_MEMORY_ADDR + subu k0, k0, k1 + srl k0, k0, VMMACH_TLB_PHYS_PAGE_SHIFT + la k1, pmap_attributes + addu k0, k0, k1 + lbu k1, 0(k0) # fetch old value + nop + or k1, k1, 1 # set modified bit + sb k1, 0(k0) # save new value + mfc0 k0, MACH_COP_0_EXC_PC # get return address + nop + j k0 + rfe +4: + break 0 # panic + .set at +END(MachTLBModException) +#endif + +/*---------------------------------------------------------------------------- + * + * MachTLBMissException -- + * + * Handle a TLB miss exception from kernel mode. + * The BaddVAddr, Context, and EntryHi registers contain the failed + * virtual address. + * + * Results: + * None. + * + * Side effects: + * None. + * + *---------------------------------------------------------------------------- + */ +NLEAF(MachTLBMissException) +ALEAF(mips_r2000_TLBMissException) + .set noat + mfc0 k0, MACH_COP_0_BAD_VADDR # get the fault address + li k1, VM_MIN_KERNEL_ADDRESS # compute index + subu k0, k0, k1 + lw k1, _C_LABEL(Sysmapsize) # index within range? + srl k0, k0, PGSHIFT + sltu k1, k0, k1 + beq k1, zero, 1f # No. check for valid stack + nop + lw k1, _C_LABEL(Sysmap) + sll k0, k0, 2 # compute offset from index + addu k1, k1, k0 + lw k0, 0(k1) # get PTE entry + mfc0 k1, MACH_COP_0_EXC_PC # get return address + mtc0 k0, MACH_COP_0_TLB_LOW # save PTE entry + and k0, k0, PG_V # check for valid entry + beq k0, zero, _C_LABEL(MachKernGenException) # PTE invalid + nop + tlbwr # update TLB + j k1 + rfe + +1: + subu k0, sp, UADDR + 0x200 # check to see if we have a + sltiu k0, UPAGES*NBPG - 0x200 # valid kernel stack + bne k0, zero, _C_LABEL(MachKernGenException) # Go panic + nop + + la a0, start - START_FRAME - 8 # set sp to a valid place + sw sp, 24(a0) + move sp, a0 + la a0, 1f + mfc0 a2, MACH_COP_0_STATUS_REG + mfc0 a3, MACH_COP_0_CAUSE_REG + mfc0 a1, MACH_COP_0_EXC_PC + sw a2, 16(sp) + sw a3, 20(sp) + sw sp, 24(sp) + move a2, ra + jal _C_LABEL(printf) + mfc0 a3, MACH_COP_0_BAD_VADDR + .data +1: + .asciiz "ktlbmiss: PC %x RA %x ADR %x\nSR %x CR %x SP %x\n" + .text + + la sp, start - START_FRAME # set sp to a valid place + PANIC("kernel stack overflow") + .set at +END(MachTLBMissException) + + +/*-------------------------------------------------------------------------- + * + * MachTLBWriteIndexed -- + * + * Write the given entry into the TLB at the given index. + * + * MachTLBWriteIndexed(index, highEntry, lowEntry) + * int index; + * int highEntry; + * int lowEntry; + * + * Results: + * None. + * + * Side effects: + * TLB entry set. + * + *-------------------------------------------------------------------------- + */ +LEAF(MachTLBWriteIndexed) +ALEAF(mips_r2000_TLBWriteIndexed) + mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. + mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts + mfc0 t0, MACH_COP_0_TLB_HI # Save the current PID. + + sll a0, a0, VMMACH_TLB_INDEX_SHIFT + mtc0 a0, MACH_COP_0_TLB_INDEX # Set the index. + mtc0 a1, MACH_COP_0_TLB_HI # Set up entry high. mtc0 a2, MACH_COP_0_TLB_LOW # Set up entry low. nop tlbwi # Write the TLB @@ -2134,6 +2344,7 @@ END(MachTLBWriteRandom) *-------------------------------------------------------------------------- */ LEAF(MachSetPID) +ALEAF(mips_r2000_SetPID) sll a0, a0, VMMACH_TLB_PID_SHIFT # put PID in right spot mtc0 a0, MACH_COP_0_TLB_HI # Write the hi reg value j ra @@ -2157,6 +2368,7 @@ END(MachSetPID) *-------------------------------------------------------------------------- */ LEAF(MachTLBFlush) +ALEAF(mips_r2000_TLBFlush) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts mfc0 t0, MACH_COP_0_TLB_HI # Save the PID @@ -2248,6 +2460,7 @@ END(MachTLBFlushPID) *-------------------------------------------------------------------------- */ LEAF(MachTLBFlushAddr) +ALEAF(mips_r2000_TLBFlushAddr) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts mfc0 t0, MACH_COP_0_TLB_HI # Get current PID @@ -2287,6 +2500,7 @@ END(MachTLBFlushAddr) *-------------------------------------------------------------------------- */ LEAF(MachTLBUpdate) +ALEAF(mips_r2000_TLBUpdate) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts mfc0 t0, MACH_COP_0_TLB_HI # Save current PID @@ -2412,600 +2626,1492 @@ LEAF(MachTLBGetPID) srl v0, v0, VMMACH_TLB_PID_SHIFT # put PID in right spot END(MachTLBGetPID) + +/*---------------------------------------------------------------------------- + * + * R3000 cache sizing and flushing code. + * + *---------------------------------------------------------------------------- + */ + + +/*---------------------------------------------------------------------------- + * + * MachConfigCache -- + * + * Size the caches. + * NOTE: should only be called from mach_init(). + * + * Results: + * None. + * + * Side effects: + * The size of the data cache is stored into machDataCacheSize and the + * size of instruction cache is stored into machInstCacheSize. + * + *---------------------------------------------------------------------------- + */ +NON_LEAF(MachConfigCache, STAND_FRAME_SIZE, ra) +ALEAF(mips_r2000_ConfigCache) + subu sp, sp, STAND_FRAME_SIZE + sw ra, STAND_RA_OFFSET(sp) # Save return address. + .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) + mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. + la v0, 1f + or v0, MACH_UNCACHED_MEMORY_ADDR # Run uncached. + j v0 + nop +1: /* - * Return the current value of the cause register. + * This works because jal doesn't change pc[31..28] and the + * linker still thinks SizeCache is in the cached region so it computes + * the correct address without complaining. */ -LEAF(MachGetCauseReg) - mfc0 v0, MACH_COP_0_CAUSE_REG + jal _C_LABEL(SizeCache) # Get the size of the d-cache. + nop + sw v0, _C_LABEL(machDataCacheSize) + nop # Make sure sw out of pipe + nop + nop + nop + li v0, MACH_SR_SWAP_CACHES # Swap caches + mtc0 v0, MACH_COP_0_STATUS_REG + nop # Insure caches stable + nop + nop + nop + jal _C_LABEL(SizeCache) # Get the size of the i-cache. + nop + mtc0 zero, MACH_COP_0_STATUS_REG # Swap back caches and enable. + nop + nop + nop + nop + sw v0, _C_LABEL(machInstCacheSize) + la t0, 1f + j t0 # Back to cached mode + nop +1: + lw ra, STAND_RA_OFFSET(sp) # Restore return addr + addu sp, sp, STAND_FRAME_SIZE # Restore sp. j ra nop -END(MachGetCauseReg) +END(MachConfigCache) /*---------------------------------------------------------------------------- * - * MachSwitchFPState -- - * - * Save the current state into 'from' and restore it from 'to'. + * SizeCache -- * - * MachSwitchFPState(from, to) - * struct proc *from; - * struct user *to; + * Get the size of the cache. * * Results: - * None. + * The size of the cache. * * Side effects: * None. * *---------------------------------------------------------------------------- */ -LEAF(MachSwitchFPState) - mfc0 t1, MACH_COP_0_STATUS_REG # Save old SR - li t0, MACH_SR_COP_1_BIT # enable the coprocessor - mtc0 t0, MACH_COP_0_STATUS_REG - - beq a0, zero, 1f # skip save if NULL pointer +LEAF(SizeCache) +ALEAF(mips_r2000_SizeCache) + mfc0 t0, MACH_COP_0_STATUS_REG # Save the current status reg. + nop + or v0, t0, MACH_SR_ISOL_CACHES # Isolate the caches. + nop # Make sure no stores in pipe + mtc0 v0, MACH_COP_0_STATUS_REG + nop # Make sure isolated + nop nop /* - * First read out the status register to make sure that all FP operations - * have completed. - */ - lw a0, P_ADDR(a0) # get pointer to pcb for proc - cfc1 t0, MACH_FPC_CSR # stall til FP done - cfc1 t0, MACH_FPC_CSR # now get status - li t3, ~MACH_SR_COP_1_BIT - lw t2, U_PCB_REGS+(PS * 4)(a0) # get CPU status register - sw t0, U_PCB_FPREGS+(32 * 4)(a0) # save FP status - and t2, t2, t3 # clear COP_1 enable bit - sw t2, U_PCB_REGS+(PS * 4)(a0) # save new status register -/* - * Save the floating point registers. + * Clear cache size boundaries. */ - swc1 $f0, U_PCB_FPREGS+(0 * 4)(a0) - swc1 $f1, U_PCB_FPREGS+(1 * 4)(a0) - swc1 $f2, U_PCB_FPREGS+(2 * 4)(a0) - swc1 $f3, U_PCB_FPREGS+(3 * 4)(a0) - swc1 $f4, U_PCB_FPREGS+(4 * 4)(a0) - swc1 $f5, U_PCB_FPREGS+(5 * 4)(a0) - swc1 $f6, U_PCB_FPREGS+(6 * 4)(a0) - swc1 $f7, U_PCB_FPREGS+(7 * 4)(a0) - swc1 $f8, U_PCB_FPREGS+(8 * 4)(a0) - swc1 $f9, U_PCB_FPREGS+(9 * 4)(a0) - swc1 $f10, U_PCB_FPREGS+(10 * 4)(a0) - swc1 $f11, U_PCB_FPREGS+(11 * 4)(a0) - swc1 $f12, U_PCB_FPREGS+(12 * 4)(a0) - swc1 $f13, U_PCB_FPREGS+(13 * 4)(a0) - swc1 $f14, U_PCB_FPREGS+(14 * 4)(a0) - swc1 $f15, U_PCB_FPREGS+(15 * 4)(a0) - swc1 $f16, U_PCB_FPREGS+(16 * 4)(a0) - swc1 $f17, U_PCB_FPREGS+(17 * 4)(a0) - swc1 $f18, U_PCB_FPREGS+(18 * 4)(a0) - swc1 $f19, U_PCB_FPREGS+(19 * 4)(a0) - swc1 $f20, U_PCB_FPREGS+(20 * 4)(a0) - swc1 $f21, U_PCB_FPREGS+(21 * 4)(a0) - swc1 $f22, U_PCB_FPREGS+(22 * 4)(a0) - swc1 $f23, U_PCB_FPREGS+(23 * 4)(a0) - swc1 $f24, U_PCB_FPREGS+(24 * 4)(a0) - swc1 $f25, U_PCB_FPREGS+(25 * 4)(a0) - swc1 $f26, U_PCB_FPREGS+(26 * 4)(a0) - swc1 $f27, U_PCB_FPREGS+(27 * 4)(a0) - swc1 $f28, U_PCB_FPREGS+(28 * 4)(a0) - swc1 $f29, U_PCB_FPREGS+(29 * 4)(a0) - swc1 $f30, U_PCB_FPREGS+(30 * 4)(a0) - swc1 $f31, U_PCB_FPREGS+(31 * 4)(a0) - + li v0, MACH_MIN_CACHE_SIZE + li v1, MACH_CACHED_MEMORY_ADDR + li t2, MACH_MAX_CACHE_SIZE 1: -/* - * Restore the floating point registers. - */ - lw t0, U_PCB_FPREGS+(32 * 4)(a1) # get status register - lwc1 $f0, U_PCB_FPREGS+(0 * 4)(a1) - lwc1 $f1, U_PCB_FPREGS+(1 * 4)(a1) - lwc1 $f2, U_PCB_FPREGS+(2 * 4)(a1) - lwc1 $f3, U_PCB_FPREGS+(3 * 4)(a1) - lwc1 $f4, U_PCB_FPREGS+(4 * 4)(a1) - lwc1 $f5, U_PCB_FPREGS+(5 * 4)(a1) - lwc1 $f6, U_PCB_FPREGS+(6 * 4)(a1) - lwc1 $f7, U_PCB_FPREGS+(7 * 4)(a1) - lwc1 $f8, U_PCB_FPREGS+(8 * 4)(a1) - lwc1 $f9, U_PCB_FPREGS+(9 * 4)(a1) - lwc1 $f10, U_PCB_FPREGS+(10 * 4)(a1) - lwc1 $f11, U_PCB_FPREGS+(11 * 4)(a1) - lwc1 $f12, U_PCB_FPREGS+(12 * 4)(a1) - lwc1 $f13, U_PCB_FPREGS+(13 * 4)(a1) - lwc1 $f14, U_PCB_FPREGS+(14 * 4)(a1) - lwc1 $f15, U_PCB_FPREGS+(15 * 4)(a1) - lwc1 $f16, U_PCB_FPREGS+(16 * 4)(a1) - lwc1 $f17, U_PCB_FPREGS+(17 * 4)(a1) - lwc1 $f18, U_PCB_FPREGS+(18 * 4)(a1) - lwc1 $f19, U_PCB_FPREGS+(19 * 4)(a1) - lwc1 $f20, U_PCB_FPREGS+(20 * 4)(a1) - lwc1 $f21, U_PCB_FPREGS+(21 * 4)(a1) - lwc1 $f22, U_PCB_FPREGS+(22 * 4)(a1) - lwc1 $f23, U_PCB_FPREGS+(23 * 4)(a1) - lwc1 $f24, U_PCB_FPREGS+(24 * 4)(a1) - lwc1 $f25, U_PCB_FPREGS+(25 * 4)(a1) - lwc1 $f26, U_PCB_FPREGS+(26 * 4)(a1) - lwc1 $f27, U_PCB_FPREGS+(27 * 4)(a1) - lwc1 $f28, U_PCB_FPREGS+(28 * 4)(a1) - lwc1 $f29, U_PCB_FPREGS+(29 * 4)(a1) - lwc1 $f30, U_PCB_FPREGS+(30 * 4)(a1) - lwc1 $f31, U_PCB_FPREGS+(31 * 4)(a1) + addu t1, v0, v1 # Compute address to clear + sw zero, 0(t1) # Clear cache memory + bne v0, t2, 1b + sll v0, v0, 1 - and t0, t0, ~MACH_FPC_EXCEPTION_BITS - ctc1 t0, MACH_FPC_CSR + li v0, -1 + sw v0, 0(v1) # Store marker in cache + li v0, MACH_MIN_CACHE_SIZE +2: + addu t1, v0, v1 # Compute address + lw t3, 0(t1) # Look for marker + nop + bne t3, zero, 3f # Found marker. nop + bne v0, t2, 2b # keep looking + sll v0, v0, 1 # cache size * 2 - mtc0 t1, MACH_COP_0_STATUS_REG # Restore the status register. + move v0, zero # must be no cache +3: + mtc0 t0, MACH_COP_0_STATUS_REG + nop # Make sure unisolated + nop + nop + nop j ra nop -END(MachSwitchFPState) +END(SizeCache) /*---------------------------------------------------------------------------- * - * MachSaveCurFPState -- - * - * Save the current floating point coprocessor state. + * MachFlushCache -- * - * MachSaveCurFPState(p) - * struct proc *p; + * Flush the caches. * * Results: * None. * * Side effects: - * machFPCurProcPtr is cleared. + * The contents of the caches is flushed. * *---------------------------------------------------------------------------- */ -LEAF(MachSaveCurFPState) - lw a0, P_ADDR(a0) # get pointer to pcb for proc - mfc0 t1, MACH_COP_0_STATUS_REG # Disable interrupts and - li t0, MACH_SR_COP_1_BIT # enable the coprocessor - mtc0 t0, MACH_COP_0_STATUS_REG - sw zero, _C_LABEL(machFPCurProcPtr) # indicate state has been saved +LEAF(MachFlushCache) +ALEAF(mips_r2000_FlushCache) + lw t1, _C_LABEL(machInstCacheSize) # Must load before isolating + lw t2, _C_LABEL(machDataCacheSize) # Must load before isolating + mfc0 t3, MACH_COP_0_STATUS_REG # Save the status register. + mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. + la v0, 1f + or v0, MACH_UNCACHED_MEMORY_ADDR # Run uncached. + j v0 + nop /* - * First read out the status register to make sure that all FP operations - * have completed. + * Flush the instruction cache. */ - lw t2, U_PCB_REGS+(PS * 4)(a0) # get CPU status register - li t3, ~MACH_SR_COP_1_BIT - and t2, t2, t3 # clear COP_1 enable bit - cfc1 t0, MACH_FPC_CSR # stall til FP done - cfc1 t0, MACH_FPC_CSR # now get status - sw t2, U_PCB_REGS+(PS * 4)(a0) # save new status register - sw t0, U_PCB_FPREGS+(32 * 4)(a0) # save FP status +1: + li v0, MACH_SR_ISOL_CACHES | MACH_SR_SWAP_CACHES + mtc0 v0, MACH_COP_0_STATUS_REG # Isolate and swap caches. + li t0, MACH_UNCACHED_MEMORY_ADDR + subu t0, t0, t1 + li t1, MACH_UNCACHED_MEMORY_ADDR + la v0, 1f # Run cached + j v0 + nop +1: + addu t0, t0, 4 + bne t0, t1, 1b + sb zero, -4(t0) + + la v0, 1f + or v0, MACH_UNCACHED_MEMORY_ADDR + j v0 # Run uncached + nop /* - * Save the floating point registers. + * Flush the data cache. */ - swc1 $f0, U_PCB_FPREGS+(0 * 4)(a0) - swc1 $f1, U_PCB_FPREGS+(1 * 4)(a0) - swc1 $f2, U_PCB_FPREGS+(2 * 4)(a0) - swc1 $f3, U_PCB_FPREGS+(3 * 4)(a0) - swc1 $f4, U_PCB_FPREGS+(4 * 4)(a0) - swc1 $f5, U_PCB_FPREGS+(5 * 4)(a0) - swc1 $f6, U_PCB_FPREGS+(6 * 4)(a0) - swc1 $f7, U_PCB_FPREGS+(7 * 4)(a0) - swc1 $f8, U_PCB_FPREGS+(8 * 4)(a0) - swc1 $f9, U_PCB_FPREGS+(9 * 4)(a0) - swc1 $f10, U_PCB_FPREGS+(10 * 4)(a0) - swc1 $f11, U_PCB_FPREGS+(11 * 4)(a0) - swc1 $f12, U_PCB_FPREGS+(12 * 4)(a0) - swc1 $f13, U_PCB_FPREGS+(13 * 4)(a0) - swc1 $f14, U_PCB_FPREGS+(14 * 4)(a0) - swc1 $f15, U_PCB_FPREGS+(15 * 4)(a0) - swc1 $f16, U_PCB_FPREGS+(16 * 4)(a0) - swc1 $f17, U_PCB_FPREGS+(17 * 4)(a0) - swc1 $f18, U_PCB_FPREGS+(18 * 4)(a0) - swc1 $f19, U_PCB_FPREGS+(19 * 4)(a0) - swc1 $f20, U_PCB_FPREGS+(20 * 4)(a0) - swc1 $f21, U_PCB_FPREGS+(21 * 4)(a0) - swc1 $f22, U_PCB_FPREGS+(22 * 4)(a0) - swc1 $f23, U_PCB_FPREGS+(23 * 4)(a0) - swc1 $f24, U_PCB_FPREGS+(24 * 4)(a0) - swc1 $f25, U_PCB_FPREGS+(25 * 4)(a0) - swc1 $f26, U_PCB_FPREGS+(26 * 4)(a0) - swc1 $f27, U_PCB_FPREGS+(27 * 4)(a0) - swc1 $f28, U_PCB_FPREGS+(28 * 4)(a0) - swc1 $f29, U_PCB_FPREGS+(29 * 4)(a0) - swc1 $f30, U_PCB_FPREGS+(30 * 4)(a0) - swc1 $f31, U_PCB_FPREGS+(31 * 4)(a0) +1: + li v0, MACH_SR_ISOL_CACHES + mtc0 v0, MACH_COP_0_STATUS_REG # Isolate and swap back caches + li t0, MACH_UNCACHED_MEMORY_ADDR + subu t0, t0, t2 + la v0, 1f + j v0 # Back to cached mode + nop +1: + addu t0, t0, 4 + bne t0, t1, 1b + sb zero, -4(t0) - mtc0 t1, MACH_COP_0_STATUS_REG # Restore the status register. + nop # Insure isolated stores + nop # out of pipe. + nop + nop + mtc0 t3, MACH_COP_0_STATUS_REG # Restore status reg. + nop # Insure cache unisolated. + nop + nop + nop j ra nop -END(MachSaveCurFPState) +END(MachFlushCache) /*---------------------------------------------------------------------------- * - * MachFPInterrupt -- + * MachFlushICache -- * - * Handle a floating point interrupt. + * void MachFlushICache(addr, len) + * vm_offset_t addr, len; * - * MachFPInterrupt(statusReg, causeReg, pc) - * unsigned statusReg; - * unsigned causeReg; - * unsigned pc; + * Flush instruction cache for range of addr to addr + len - 1. + * The address can be any valid address so long as no TLB misses occur. * * Results: * None. * * Side effects: - * None. + * The contents of the cache is flushed. * *---------------------------------------------------------------------------- */ -NON_LEAF(MachFPInterrupt, STAND_FRAME_SIZE, ra) - subu sp, sp, STAND_FRAME_SIZE - mfc0 t0, MACH_COP_0_STATUS_REG - sw ra, STAND_RA_OFFSET(sp) - .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) +LEAF(MachFlushICache) +ALEAF(mips_r2000_FlushICache) + mfc0 t0, MACH_COP_0_STATUS_REG # Save SR + mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. - or t1, t0, MACH_SR_COP_1_BIT - mtc0 t1, MACH_COP_0_STATUS_REG - nop + la v1, 1f + or v1, MACH_UNCACHED_MEMORY_ADDR # Run uncached. + j v1 nop - cfc1 t1, MACH_FPC_CSR # stall til FP done - cfc1 t1, MACH_FPC_CSR # now get status +1: + bc0f 1b # make sure stores are complete + li v1, MACH_SR_ISOL_CACHES | MACH_SR_SWAP_CACHES + mtc0 v1, MACH_COP_0_STATUS_REG nop - sll t2, t1, (31 - 17) # unimplemented operation? - bgez t2, 3f # no, normal trap + addu a1, a1, a0 # compute ending address +1: + addu a0, a0, 4 + bne a0, a1, 1b + sb zero, -4(a0) + + mtc0 t0, MACH_COP_0_STATUS_REG # enable interrupts + j ra # return and run cached nop -/* - * We got an unimplemented operation trap so - * fetch the instruction, compute the next PC and emulate the instruction. +END(MachFlushICache) + +/*---------------------------------------------------------------------------- + * + * MachFlushDCache -- + * + * void MachFlushDCache(addr, len) + * vm_offset_t addr, len; + * + * Flush data cache for range of addr to addr + len - 1. + * The address can be any valid address so long as no TLB misses occur. + * (Be sure to use cached K0SEG kernel addresses) + * Results: + * None. + * + * Side effects: + * The contents of the cache is flushed. + * + *---------------------------------------------------------------------------- */ - bgez a1, 1f # Check the branch delay bit. +LEAF(MachFlushDCache) +ALEAF(mips_r2000_FlushDCache) + mfc0 t0, MACH_COP_0_STATUS_REG # Save SR + mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. nop -/* - * The instruction is in the branch delay slot so the branch will have to - * be emulated to get the resulting PC. - */ - sw a2, STAND_FRAME_SIZE + 8(sp) - li a0, UADDR+U_PCB_REGS # first arg is ptr to CPU registers - move a1, a2 # second arg is instruction PC - move a2, t1 # third arg is floating point CSR - jal _C_LABEL(MachEmulateBranch) # compute PC after branch - move a3, zero # fourth arg is FALSE -/* - * Now load the floating-point instruction in the branch delay slot - * to be emulated. - */ - lw a2, STAND_FRAME_SIZE + 8(sp) # restore EXC pc - b 2f - lw a0, 4(a2) # a0 = coproc instruction -/* - * This is not in the branch delay slot so calculate the resulting - * PC (epc + 4) into v0 and continue to MachEmulateFP(). - */ 1: - lw a0, 0(a2) # a0 = coproc instruction - addu v0, a2, 4 # v0 = next pc -2: - sw v0, UADDR+U_PCB_REGS+(PC * 4) # save new pc -/* - * Check to see if the instruction to be emulated is a floating-point - * instruction. - */ - srl a3, a0, MACH_OPCODE_SHIFT - beq a3, MACH_OPCODE_C1, 4f # this should never fail + bc0f 1b # make sure stores are complete +# BUG: should drain write buffer. +# The insn above does not work on some all DEC machines, or all variants +# of the mips architecture. + li v1, MACH_SR_ISOL_CACHES + mtc0 v1, MACH_COP_0_STATUS_REG nop -/* - * Send a floating point exception signal to the current process. - */ -3: - lw a0, _C_LABEL(curproc) # get current process - cfc1 a2, MACH_FPC_CSR # code = FP execptions - ctc1 zero, MACH_FPC_CSR # Clear exceptions - jal _C_LABEL(trapsignal) - li a1, SIGFPE - b FPReturn + addu t1, a1, a0 # compute ending address +1: + sb zero, 0(a0) + sb zero, 4(a0) + sb zero, 8(a0) + sb zero, 12(a0) + sb zero, 16(a0) + sb zero, 20(a0) + sb zero, 24(a0) + addu a0, 32 + bltu a0, t1, 1b + sb zero, -4(a0) + + nop # drain pipeline + nop + mtc0 t0, MACH_COP_0_STATUS_REG # enable interrupts nop + j ra # return and run cached + nop +END(MachFlushDCache) -/* - * Finally, we can call MachEmulateFP() where a0 is the instruction to emulate. +/*---------------------------------------------------------------------------- + * + * XXX END of r3000-specific code XXX + * + *---------------------------------------------------------------------------- */ -4: - jal _C_LABEL(MachEmulateFP) - nop -/* - * Turn off the floating point coprocessor and return. + + +#ifdef notyet /* XXX -- r4000 support, not yet */ + + +/*---------------------------------------------------------------------------- + * + * XXX START of r4000-specific code XXX + * + *---------------------------------------------------------------------------- */ -FPReturn: - mfc0 t0, MACH_COP_0_STATUS_REG - lw ra, STAND_RA_OFFSET(sp) - and t0, t0, ~MACH_SR_COP_1_BIT - mtc0 t0, MACH_COP_0_STATUS_REG - j ra - addu sp, sp, STAND_FRAME_SIZE -END(MachFPInterrupt) + /*---------------------------------------------------------------------------- * - * MachConfigCache -- + * R4000 TLB exception handlers * - * Size the caches. - * NOTE: should only be called from mach_init(). + *---------------------------------------------------------------------------- + */ + + +/*---------------------------------------------------------------------------- + * + * MachTLBMInvalidException -- + * + * Handle a TLB invalid exception from kernel mode in kernel space. + * The BaddVAddr, Context, and EntryHi registers contain the failed + * virtual address. * * Results: - * None. + * None. * * Side effects: - * The size of the data cache is stored into machDataCacheSize and the - * size of instruction cache is stored into machInstCacheSize. + * None. * *---------------------------------------------------------------------------- */ -NON_LEAF(MachConfigCache, STAND_FRAME_SIZE, ra) - subu sp, sp, STAND_FRAME_SIZE - sw ra, STAND_RA_OFFSET(sp) # Save return address. - .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. - la v0, 1f - or v0, MACH_UNCACHED_MEMORY_ADDR # Run uncached. - j v0 +NLEAF(MachTLBInvalidException) + .set noat + dmfc0 k0, MACH_COP_0_BAD_VADDR # get the fault address + li k1, VM_MIN_KERNEL_ADDRESS # compute index + subu k0, k0, k1 + lw k1, Sysmapsize # index within range? + srl k0, k0, PGSHIFT + sltu k1, k0, k1 + beq k1, zero, sys_stk_chk # No. check for valid stack + lw k1, Sysmap + + sll k0, k0, 2 # compute offset from index + tlbp # Probe the invalid entry + addu k1, k1, k0 + and k0, k0, 4 # check even/odd page + bne k0, zero, KernTLBIOdd nop -1: -/* - * This works because jal doesn't change pc[31..28] and the - * linker still thinks SizeCache is in the cached region so it computes - * the correct address without complaining. - */ - jal _C_LABEL(SizeCache) # Get the size of the d-cache. + + mfc0 k0, MACH_COP_0_TLB_INDEX nop - sw v0, _C_LABEL(machDataCacheSize) - nop # Make sure sw out of pipe + bltz k0, sys_stk_chk + sltiu k0, k0, 8 + + bne k0, zero, sys_stk_chk + lw k0, 0(k1) # get PTE entry + + dsll k0, k0, 34 # get rid of "wired" bit + dsrl k0, k0, 34 + dmtc0 k0, MACH_COP_0_TLB_LO0 # load PTE entry + and k0, k0, PG_V # check for valid entry + beq k0, zero, MachKernGenException # PTE invalid + lw k0, 4(k1) # get odd PTE entry + dsll k0, k0, 34 + dsrl k0, k0, 34 + dmtc0 k0, MACH_COP_0_TLB_LO1 # load PTE entry nop + tlbwi # write TLB nop nop - li v0, MACH_SR_SWAP_CACHES # Swap caches - mtc0 v0, MACH_COP_0_STATUS_REG - nop # Insure caches stable nop nop nop - jal _C_LABEL(SizeCache) # Get the size of the i-cache. + eret + +KernTLBIOdd: + mfc0 k0, MACH_COP_0_TLB_INDEX nop - mtc0 zero, MACH_COP_0_STATUS_REG # Swap back caches and enable. + bltz k0, sys_stk_chk + sltiu k0, k0, 8 + + bne k0, zero, sys_stk_chk + lw k0, 0(k1) # get PTE entry + + dsll k0, k0, 34 # get rid of wired bit + dsrl k0, k0, 34 + dmtc0 k0, MACH_COP_0_TLB_LO1 # save PTE entry + and k0, k0, PG_V # check for valid entry + beq k0, zero, MachKernGenException # PTE invalid + lw k0, -4(k1) # get even PTE entry + dsll k0, k0, 34 + dsrl k0, k0, 34 + dmtc0 k0, MACH_COP_0_TLB_LO0 # save PTE entry nop + tlbwi # update TLB nop nop nop - sw v0, _C_LABEL(machInstCacheSize) - la t0, 1f - j t0 # Back to cached mode nop -1: - lw ra, STAND_RA_OFFSET(sp) # Restore return addr - addu sp, sp, STAND_FRAME_SIZE # Restore sp. - j ra nop -END(MachConfigCache) + eret +END(MachTLBInvalidException) /*---------------------------------------------------------------------------- * - * SizeCache -- + * MachTLBMissException -- * - * Get the size of the cache. + * Handle a TLB miss exception from kernel mode in kernel space. + * The BaddVAddr, Context, and EntryHi registers contain the failed + * virtual address. * * Results: - * The size of the cache. + * None. * * Side effects: * None. * *---------------------------------------------------------------------------- */ -LEAF(SizeCache) - mfc0 t0, MACH_COP_0_STATUS_REG # Save the current status reg. - nop - or v0, t0, MACH_SR_ISOL_CACHES # Isolate the caches. - nop # Make sure no stores in pipe - mtc0 v0, MACH_COP_0_STATUS_REG - nop # Make sure isolated - nop +NLEAF(MachTLBMissException) + .set noat + dmfc0 k0, MACH_COP_0_BAD_VADDR # get the fault address + li k1, VM_MIN_KERNEL_ADDRESS # compute index + subu k0, k0, k1 + lw k1, Sysmapsize # index within range? + srl k0, k0, PGSHIFT + sltu k1, k0, k1 + beq k1, zero, sys_stk_chk # No. check for valid stack + lw k1, Sysmap + srl k0, k0, 1 + sll k0, k0, 3 # compute offset from index + addu k1, k1, k0 + lw k0, 0(k1) # get PTE entry + lw k1, 4(k1) # get odd PTE entry + dsll k0, k0, 34 # get rid of "wired" bit + dsrl k0, k0, 34 + dmtc0 k0, MACH_COP_0_TLB_LO0 # load PTE entry + dsll k1, k1, 34 + dsrl k1, k1, 34 + dmtc0 k1, MACH_COP_0_TLB_LO1 # load PTE entry nop -/* - * Clear cache size boundaries. - */ - li v0, MACH_MIN_CACHE_SIZE - li v1, MACH_CACHED_MEMORY_ADDR - li t2, MACH_MAX_CACHE_SIZE -1: - addu t1, v0, v1 # Compute address to clear - sw zero, 0(t1) # Clear cache memory - bne v0, t2, 1b - sll v0, v0, 1 - - li v0, -1 - sw v0, 0(v1) # Store marker in cache - li v0, MACH_MIN_CACHE_SIZE -2: - addu t1, v0, v1 # Compute address - lw t3, 0(t1) # Look for marker + tlbwr # write TLB nop - bne t3, zero, 3f # Found marker. nop - bne v0, t2, 2b # keep looking - sll v0, v0, 1 # cache size * 2 - - move v0, zero # must be no cache -3: - mtc0 t0, MACH_COP_0_STATUS_REG - nop # Make sure unisolated nop nop nop - j ra + eret + +sys_stk_chk: + subu k0, sp, UADDR + 0x200 # check to see if we have a + sltiu k0, UPAGES*NBPG - 0x200 # valid kernel stack + bne k0, zero, MachKernGenException # Go panic nop -END(SizeCache) -/*---------------------------------------------------------------------------- + la a0, start - START_FRAME - 8 # set sp to a valid place + sw sp, 24(a0) + move sp, a0 + la a0, 1f + mfc0 a2, MACH_COP_0_STATUS_REG + mfc0 a3, MACH_COP_0_CAUSE_REG + dmfc0 a1, MACH_COP_0_EXC_PC + sw a2, 16(sp) + sw a3, 20(sp) + move a2, ra + jal printf + dmfc0 a3, MACH_COP_0_BAD_VADDR + .data +1: + .asciiz "ktlbmiss: PC %x RA %x ADR %x\nSR %x CR %x SP %x\n" + .text + + la sp, start - START_FRAME # set sp to a valid place + PANIC("kernel stack overflow") + .set at +END(MachTLBMissException) + + +/*-------------------------------------------------------------------------- * - * MachFlushCache -- + * MachTLBWriteIndexed -- * - * Flush the caches. + * Write the given entry into the TLB at the given index. + * + * MachTLBWriteIndexed(index, tlb) + * unsigned index; + * tlb *tlb; * * Results: * None. * * Side effects: - * The contents of the caches is flushed. + * TLB entry set. * - *---------------------------------------------------------------------------- + *-------------------------------------------------------------------------- */ -LEAF(MachFlushCache) - lw t1, _C_LABEL(machInstCacheSize) # Must load before isolating - lw t2, _C_LABEL(machDataCacheSize) # Must load before isolating - mfc0 t3, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. - la v0, 1f - or v0, MACH_UNCACHED_MEMORY_ADDR # Run uncached. - j v0 +LEAF(MachTLBWriteIndexed) +ALEAF(mips_r2000_TLBWriteIndexed) + mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. + mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts nop -/* - * Flush the instruction cache. - */ -1: - li v0, MACH_SR_ISOL_CACHES | MACH_SR_SWAP_CACHES - mtc0 v0, MACH_COP_0_STATUS_REG # Isolate and swap caches. - li t0, MACH_UNCACHED_MEMORY_ADDR - subu t0, t0, t1 - li t1, MACH_UNCACHED_MEMORY_ADDR - la v0, 1f # Run cached - j v0 - nop -1: - addu t0, t0, 4 - bne t0, t1, 1b - sb zero, -4(t0) + lw a2, 8(a1) + lw a3, 12(a1) + dmfc0 t0, MACH_COP_0_TLB_HI # Save the current PID. - la v0, 1f - or v0, MACH_UNCACHED_MEMORY_ADDR - j v0 # Run uncached + dmtc0 a2, MACH_COP_0_TLB_LO0 # Set up entry low0. + dmtc0 a3, MACH_COP_0_TLB_LO1 # Set up entry low1. + lw a2, 0(a1) + lw a3, 4(a1) + mtc0 a0, MACH_COP_0_TLB_INDEX # Set the index. + dmtc0 a2, MACH_COP_0_TLB_PG_MASK # Set up entry mask. + dmtc0 a3, MACH_COP_0_TLB_HI # Set up entry high. nop -/* - * Flush the data cache. - */ -1: - li v0, MACH_SR_ISOL_CACHES - mtc0 v0, MACH_COP_0_STATUS_REG # Isolate and swap back caches - li t0, MACH_UNCACHED_MEMORY_ADDR - subu t0, t0, t2 - la v0, 1f - j v0 # Back to cached mode + tlbwi # Write the TLB nop -1: - addu t0, t0, 4 - bne t0, t1, 1b - sb zero, -4(t0) - - nop # Insure isolated stores - nop # out of pipe. nop + nop # Delay for effect nop - mtc0 t3, MACH_COP_0_STATUS_REG # Restore status reg. - nop # Insure cache unisolated. + + dmtc0 t0, MACH_COP_0_TLB_HI # Restore the PID. nop + dmtc0 zero, MACH_COP_0_TLB_PG_MASK # Default mask value. + j ra + mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register +END(MachTLBWriteIndexed) + +/*-------------------------------------------------------------------------- + * + * MachSetPID -- + * + * Write the given pid into the TLB pid reg. + * + * MachSetPID(pid) + * int pid; + * + * Results: + * None. + * + * Side effects: + * PID set in the entry hi register. + * + *-------------------------------------------------------------------------- + */ +LEAF(MachSetPID) + dmtc0 a0, MACH_COP_0_TLB_HI # Write the hi reg value + j ra nop +END(MachSetPID) + +/*-------------------------------------------------------------------------- + * + * MachSetWIRED -- + * + * Write the given value into the TLB wired reg. + * + * MachSetPID(wired) + * int wired; + * + * Results: + * None. + * + * Side effects: + * WIRED set in the wired register. + * + *-------------------------------------------------------------------------- + */ +LEAF(MachSetWIRED) + mtc0 a0, MACH_COP_0_TLB_WIRED + j ra nop +END(MachSetWIRED) + +/*-------------------------------------------------------------------------- + * + * MachGetWIRED -- + * + * Get the value from the TLB wired reg. + * + * MachGetWIRED(void) + * + * Results: + * Value of wired reg. + * + * Side effects: + * None. + * + *-------------------------------------------------------------------------- + */ +LEAF(MachGetWIRED) + mfc0 v0, MACH_COP_0_TLB_WIRED j ra nop -END(MachFlushCache) +END(MachGetWIRED) -/*---------------------------------------------------------------------------- +/*-------------------------------------------------------------------------- * - * MachFlushICache -- + * MachTLBFlush -- * - * void MachFlushICache(addr, len) - * vm_offset_t addr, len; + * Flush the "random" entries from the TLB. + * Uses "wired" register to determine what register to start with. * - * Flush instruction cache for range of addr to addr + len - 1. - * The address can be any valid address so long as no TLB misses occur. + * MachTLBFlush() * * Results: * None. * * Side effects: - * The contents of the cache is flushed. + * The TLB is flushed. * - *---------------------------------------------------------------------------- + *-------------------------------------------------------------------------- */ -LEAF(MachFlushICache) - mfc0 t0, MACH_COP_0_STATUS_REG # Save SR - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. +LEAF(MachTLBFlush) + mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. + mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts + mfc0 t1, MACH_COP_0_TLB_WIRED + li t2, VMMACH_NUM_TLB_ENTRIES + li v0, MACH_CACHED_MEMORY_ADDR # invalid address + dmfc0 t0, MACH_COP_0_TLB_HI # Save the PID - la v1, 1f - or v1, MACH_UNCACHED_MEMORY_ADDR # Run uncached. - j v1 - nop + dmtc0 v0, MACH_COP_0_TLB_HI # Mark entry high as invalid + dmtc0 zero, MACH_COP_0_TLB_LO0 # Zero out low entry0. + dmtc0 zero, MACH_COP_0_TLB_LO1 # Zero out low entry1. + mtc0 zero, MACH_COP_0_TLB_PG_MASK # Zero out mask entry. +/* + * Align the starting value (t1) and the upper bound (t2). + */ 1: - bc0f 1b # make sure stores are complete - li v1, MACH_SR_ISOL_CACHES | MACH_SR_SWAP_CACHES - mtc0 v1, MACH_COP_0_STATUS_REG + mtc0 t1, MACH_COP_0_TLB_INDEX # Set the index register. + addu t1, t1, 1 # Increment index. + tlbwi # Write the TLB entry. nop - addu a1, a1, a0 # compute ending address -1: - addu a0, a0, 4 - bne a0, a1, 1b - sb zero, -4(a0) - - mtc0 t0, MACH_COP_0_STATUS_REG # enable interrupts - j ra # return and run cached nop -END(MachFlushICache) + bne t1, t2, 1b + nop -/*---------------------------------------------------------------------------- + dmtc0 t0, MACH_COP_0_TLB_HI # Restore the PID + j ra + mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register +END(MachTLBFlush) + + +/*-------------------------------------------------------------------------- * - * MachFlushDCache -- + * MachTLBFlushAddr -- * - * void MachFlushDCache(addr, len) - * vm_offset_t addr, len; + * Flush any TLB entries for the given address and TLB PID. + * + * MachTLBFlushAddr(TLBhi) + * unsigned TLBhi; * - * Flush data cache for range of addr to addr + len - 1. - * The address can be any valid address so long as no TLB misses occur. - * (Be sure to use cached K0SEG kernel addresses) * Results: * None. * * Side effects: - * The contents of the cache is flushed. + * The process's page is flushed from the TLB. * - *---------------------------------------------------------------------------- + *-------------------------------------------------------------------------- */ -LEAF(MachFlushDCache) - mfc0 t0, MACH_COP_0_STATUS_REG # Save SR - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. +LEAF(MachTLBFlushAddr) + mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. + mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts + nop + li v0, (PG_HVPN | PG_ASID) + and a0, a0, v0 # Make shure valid hi value. + dmfc0 t0, MACH_COP_0_TLB_HI # Get current PID + dmtc0 a0, MACH_COP_0_TLB_HI # look for addr & PID + nop + nop + nop + tlbp # Probe for the entry. + nop + nop # Delay for effect + nop + mfc0 v0, MACH_COP_0_TLB_INDEX # See what we got + li t1, MACH_CACHED_MEMORY_ADDR # Load invalid entry. + bltz v0, 1f # index < 0 => !found + nop + dmtc0 t1, MACH_COP_0_TLB_HI # Mark entry high as invalid + + dmtc0 zero, MACH_COP_0_TLB_LO0 # Zero out low entry. + dmtc0 zero, MACH_COP_0_TLB_LO1 # Zero out low entry. + nop + tlbwi + nop + nop + nop nop 1: - bc0f 1b # make sure stores are complete -# BUG: should drain write buffer. -# The insn above does not work on some all DEC machines, or all variants -# of the mips architecture. - li v1, MACH_SR_ISOL_CACHES - mtc0 v1, MACH_COP_0_STATUS_REG + dmtc0 t0, MACH_COP_0_TLB_HI # restore PID + j ra + mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register +END(MachTLBFlushAddr) + +/*-------------------------------------------------------------------------- + * + * MachTLBUpdate -- + * + * Update the TLB if highreg is found; otherwise, enter the data. + * + * MachTLBUpdate(virpageadr, lowregx) + * unsigned virpageadr, lowregx; + * + * Results: + * < 0 if loaded >= 0 if updated. + * + * Side effects: + * None. + * + *-------------------------------------------------------------------------- + */ +LEAF(MachTLBUpdate) + mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. + mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts + and t1, a0, 0x1000 # t1 = Even/Odd flag + li v0, (PG_HVPN | PG_ASID) + and a0, a0, v0 + dmfc0 t0, MACH_COP_0_TLB_HI # Save current PID + dmtc0 a0, MACH_COP_0_TLB_HI # Init high reg + and a2, a1, PG_G # Copy global bit + nop + nop + tlbp # Probe for the entry. + dsll a1, a1, 34 + dsrl a1, a1, 34 + bne t1, zero, 2f # Decide even odd + mfc0 v0, MACH_COP_0_TLB_INDEX # See what we got +# EVEN + nop + bltz v0, 1f # index < 0 => !found + nop + + tlbr # update, read entry first + nop + nop + nop + dmtc0 a1, MACH_COP_0_TLB_LO0 # init low reg0. + nop + tlbwi # update slot found + b 4f nop - addu t1, a1, a0 # compute ending address 1: - sb zero, 0(a0) - sb zero, 4(a0) - sb zero, 8(a0) - sb zero, 12(a0) - sb zero, 16(a0) - sb zero, 20(a0) - sb zero, 24(a0) - addu a0, 32 - bltu a0, t1, 1b - sb zero, -4(a0) + mtc0 zero, MACH_COP_0_TLB_PG_MASK # init mask. + dmtc0 a0, MACH_COP_0_TLB_HI # init high reg. + dmtc0 a1, MACH_COP_0_TLB_LO0 # init low reg0. + dmtc0 a2, MACH_COP_0_TLB_LO1 # init low reg1. + nop + tlbwr # enter into a random slot + b 4f + nop +# ODD +2: + nop + bltz v0, 3f # index < 0 => !found + nop - nop # drain pipeline + tlbr # read the entry first nop - mtc0 t0, MACH_COP_0_STATUS_REG # enable interrupts nop - j ra # return and run cached nop -END(MachFlushDCache) + dmtc0 a1, MACH_COP_0_TLB_LO1 # init low reg1. + nop + tlbwi # update slot found + b 4f + nop +3: + mtc0 zero, MACH_COP_0_TLB_PG_MASK # init mask. + dmtc0 a0, MACH_COP_0_TLB_HI # init high reg. + dmtc0 a2, MACH_COP_0_TLB_LO0 # init low reg0. + dmtc0 a1, MACH_COP_0_TLB_LO1 # init low reg1. + nop + tlbwr # enter into a random slot + +4: # Make shure pipeline + nop # advances before we + nop # uses the tlb. + nop + nop + dmtc0 t0, MACH_COP_0_TLB_HI # restore PID + j ra + mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register +END(MachTLBUpdate) + +/*-------------------------------------------------------------------------- + * + * MachTLBRead -- + * + * Read the TLB entry. + * + * MachTLBRead(entry, tlb) + * unsigned entry; + * struct tlb *tlb; + * + * Results: + * None. + * + * Side effects: + * tlb will contain the TLB entry found. + * + *-------------------------------------------------------------------------- + */ +LEAF(MachTLBRead) + mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. + mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts + nop + nop + nop + dmfc0 t0, MACH_COP_0_TLB_HI # Get current PID + + mtc0 a0, MACH_COP_0_TLB_INDEX # Set the index register + nop + tlbr # Read from the TLB + nop + nop + nop + mfc0 t2, MACH_COP_0_TLB_PG_MASK # fetch the hi entry + dmfc0 t3, MACH_COP_0_TLB_HI # fetch the hi entry + dmfc0 t4, MACH_COP_0_TLB_LO0 # See what we got + dmfc0 t5, MACH_COP_0_TLB_LO1 # See what we got + dmtc0 t0, MACH_COP_0_TLB_HI # restore PID + nop + nop + nop # wait for PID active + mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register + sw t2, 0(a1) + sw t3, 4(a1) + sw t4, 8(a1) + j ra + sw t5, 12(a1) +END(MachTLBRead) + +/*-------------------------------------------------------------------------- + * + * MachTLBGetPID -- + * + * MachTLBGetPID() + * + * Results: + * Returns the current TLB pid reg. + * + * Side effects: + * None. + * + *-------------------------------------------------------------------------- + */ +LEAF(MachTLBGetPID) + dmfc0 v0, MACH_COP_0_TLB_HI # get PID + j ra + and v0, v0, VMMACH_TLB_PID # mask off PID +END(MachTLBGetPID) + + + +/*---------------------------------------------------------------------------- + * + * R4000 cache sizing and flushing code. + * + *---------------------------------------------------------------------------- + */ + + +/*---------------------------------------------------------------------------- + * + * MachConfigCache -- + * + * Size the caches. + * NOTE: should only be called from mach_init(). + * + * Results: + * None. + * + * Side effects: + * The size of the data cache is stored into machPrimaryDataCacheSize. + * The size of instruction cache is stored into machPrimaryInstCacheSize. + * Alignment mask for cache aliasing test is stored in machCacheAliasMask. + * + *---------------------------------------------------------------------------- + */ +LEAF(MachConfigCache) + mfc0 v0, MACH_COP_0_CONFIG # Get configuration register + nop + srl t1, v0, 9 # Get I cache size. + and t1, 3 + li t2, 4096 + sllv t2, t2, t1 + sw t2, machPrimaryDataCacheSize + addiu t2, -1 + and t2, ~(NBPG - 1) + sw t2, machCacheAliasMask + + and t2, v0, 0x20 + srl t2, t2, 1 + addu t2, t2, 16 + sw t2, machPrimaryDataCacheLSize + + srl t1, v0, 6 # Get I cache size. + and t1, 3 + li t2, 4096 + sllv t2, t2, t1 + sw t2, machPrimaryInstCacheSize + + and t2, v0, 0x10 + addu t2, t2, 16 + sw t2, machPrimaryInstCacheLSize + j ra + nop +END(MachConfigCache) + +/*---------------------------------------------------------------------------- + * + * MachFlushCache -- + * + * Flush the caches. Assumes a line size of 16 bytes for speed. + * + * Results: + * None. + * + * Side effects: + * The contents of the caches is flushed. + * + *---------------------------------------------------------------------------- + */ +LEAF(MachFlushCache) + lw t1, machPrimaryInstCacheSize + lw t2, machPrimaryDataCacheSize + # lw t3, machPrimaryInstCacheLSize + # lw t4, machPrimaryDataCacheLSize +/* + * Flush the instruction cache. + */ + li t0, MACH_CACHED_MEMORY_ADDR + addu t1, t0, t1 # End address + subu t1, t1, 128 +1: + cache 0, 0(t0) + cache 0, 16(t0) + cache 0, 32(t0) + cache 0, 48(t0) + cache 0, 64(t0) + cache 0, 80(t0) + cache 0, 96(t0) + cache 0, 112(t0) + bne t0, t1, 1b + addu t0, t0, 128 + +/* + * Flush the data cache. + */ + li t0, MACH_CACHED_MEMORY_ADDR + addu t1, t0, t2 # End address + subu t1, t1, 128 +1: + cache 1, 0(t0) + cache 1, 16(t0) + cache 1, 32(t0) + cache 1, 48(t0) + cache 1, 64(t0) + cache 1, 80(t0) + cache 1, 96(t0) + cache 1, 112(t0) + bne t0, t1, 1b + addu t0, t0, 128 + + j ra + nop +END(MachFlushCache) + +/*---------------------------------------------------------------------------- + * + * MachFlushICache -- + * + * void MachFlushICache(addr, len) + * vm_offset_t addr, len; + * + * Flush instruction cache for range of addr to addr + len - 1. + * The address can be any valid address so long as no TLB misses occur. + * Assumes a cache line size of 16 bytes for speed. + * + * Results: + * None. + * + * Side effects: + * The contents of the cache is flushed. + * Must not touch v0. + * + *---------------------------------------------------------------------------- + */ +LEAF(MachFlushICache) + addu a1, 127 # Align + srl a1, a1, 7 # Number of unrolled loops +1: + cache 0, 0(a0) + cache 0, 16(a0) + cache 0, 32(a0) + cache 0, 48(a0) + cache 0, 64(a0) + cache 0, 80(a0) + cache 0, 96(a0) + cache 0, 112(a0) + addu a1, -1 + bne a1, zero, 1b + addu a0, 128 + + j ra + nop +END(MachFlushICache) + +/*---------------------------------------------------------------------------- + * + * MachFlushDCache -- + * + * void MachFlushDCache(addr, len) + * vm_offset_t addr, len; + * + * Flush data cache for index range of addr to addr + len - 1. + * The address is reduced to a kseg0 index. + * + * Results: + * None. + * + * Side effects: + * The contents of the cache is written back to primary memory. + * The cache line is invalidated. + * + *---------------------------------------------------------------------------- + */ +LEAF(MachFlushDCache) +ALEAF(mips_r2000_FlushDCache) + lw a2, machPrimaryDataCacheSize + addiu a2, -1 + and a0, a0, a2 + addu a1, 127 # Align + li a2, 0x80000000 + addu a0, a0, a2 + addu a1, a1, a0 + and a0, a0, -128 + subu a1, a1, a0 + srl a1, a1, 7 # Compute number of cache lines +1: + cache 1, 0(a0) + cache 1, 16(a0) + cache 1, 32(a0) + cache 1, 48(a0) + cache 1, 64(a0) + cache 1, 80(a0) + cache 1, 96(a0) + cache 1, 112(a0) + addu a1, -1 + bne a1, zero, 1b + addu a0, 128 + + j ra + nop +END(MachFlushDCache) + +/*---------------------------------------------------------------------------- + * + * MachHitFlushDCache -- + * + * void MachHitFlushDCache(addr, len) + * vm_offset_t addr, len; + * + * Flush data cache for range of addr to addr + len - 1. + * The address can be any valid viritual address as long + * as no TLB invalid traps occur. Only lines with matching + * addr is flushed. + * + * Results: + * None. + * + * Side effects: + * The contents of the cache is written back to primary memory. + * The cache line is invalidated. + * + *---------------------------------------------------------------------------- + */ +LEAF(MachHitFlushDCache) + beq a1, zero, 2f + addu a1, 127 # Align + addu a1, a1, a0 + and a0, a0, -128 + subu a1, a1, a0 + srl a1, a1, 7 # Compute number of cache lines +1: + cache 0x15, 0(a0) + cache 0x15, 16(a0) + cache 0x15, 32(a0) + cache 0x15, 48(a0) + cache 0x15, 64(a0) + cache 0x15, 80(a0) + cache 0x15, 96(a0) + cache 0x15, 112(a0) + addu a1, -1 + bne a1, zero, 1b + addu a0, 128 + +2: + j ra + nop +END(MachHitFlushDCache) +/*---------------------------------------------------------------------------- + * + * MachInvalidateDCache -- + * + * void MachFlushDCache(addr, len) + * vm_offset_t addr, len; + * + * Flush data cache for range of addr to addr + len - 1. + * The address can be any valid address as long as no TLB misses occur. + * (Be sure to use cached K0SEG kernel addresses or mapped addresses) + * Results: + * None. + * + * Side effects: + * The cache line is invalidated. + * + *---------------------------------------------------------------------------- + */ +LEAF(MachInvalidateDCache) + addu a1, a1, a0 # compute ending address +1: + addu a0, a0, 4 + bne a0, a1, 1b + cache 0x11,-4(a0) + + j ra + nop +END(MachInvalidateDCache) + +/*---------------------------------------------------------------------------- + * + * XXX END of r4000-specific code XXX + * + *---------------------------------------------------------------------------- + */ + +#endif /* XXX -- r4000 support, not yet */ + + +/*---------------------------------------------------------------------------- + * + * MachSwitchFPState -- + * + * Return the current value of the cause register. + * + * MachGetCauseReg(void) + * + * Results: + * current value of Cause register.None. + * + * Side effects: + * None. + * + *---------------------------------------------------------------------------- + */ +LEAF(MachGetCauseReg) + mfc0 v0, MACH_COP_0_CAUSE_REG + j ra + nop +END(MachGetCauseReg) + +/*---------------------------------------------------------------------------- + * + * MachSwitchFPState -- + * + * Save the current state into 'from' and restore it from 'to'. + * + * MachSwitchFPState(from, to) + * struct proc *from; + * struct user *to; + * + * Results: + * None. + * + * Side effects: + * None. + * + *---------------------------------------------------------------------------- + */ +LEAF(MachSwitchFPState) + mfc0 t1, MACH_COP_0_STATUS_REG # Save old SR + li t0, MACH_SR_COP_1_BIT # enable the coprocessor + mtc0 t0, MACH_COP_0_STATUS_REG + + beq a0, zero, 1f # skip save if NULL pointer + nop +/* + * First read out the status register to make sure that all FP operations + * have completed. + */ + lw a0, P_ADDR(a0) # get pointer to pcb for proc + cfc1 t0, MACH_FPC_CSR # stall til FP done + cfc1 t0, MACH_FPC_CSR # now get status + li t3, ~MACH_SR_COP_1_BIT + lw t2, U_PCB_REGS+(PS * 4)(a0) # get CPU status register + sw t0, U_PCB_FPREGS+(32 * 4)(a0) # save FP status + and t2, t2, t3 # clear COP_1 enable bit + sw t2, U_PCB_REGS+(PS * 4)(a0) # save new status register +/* + * Save the floating point registers. + */ + swc1 $f0, U_PCB_FPREGS+(0 * 4)(a0) + swc1 $f1, U_PCB_FPREGS+(1 * 4)(a0) + swc1 $f2, U_PCB_FPREGS+(2 * 4)(a0) + swc1 $f3, U_PCB_FPREGS+(3 * 4)(a0) + swc1 $f4, U_PCB_FPREGS+(4 * 4)(a0) + swc1 $f5, U_PCB_FPREGS+(5 * 4)(a0) + swc1 $f6, U_PCB_FPREGS+(6 * 4)(a0) + swc1 $f7, U_PCB_FPREGS+(7 * 4)(a0) + swc1 $f8, U_PCB_FPREGS+(8 * 4)(a0) + swc1 $f9, U_PCB_FPREGS+(9 * 4)(a0) + swc1 $f10, U_PCB_FPREGS+(10 * 4)(a0) + swc1 $f11, U_PCB_FPREGS+(11 * 4)(a0) + swc1 $f12, U_PCB_FPREGS+(12 * 4)(a0) + swc1 $f13, U_PCB_FPREGS+(13 * 4)(a0) + swc1 $f14, U_PCB_FPREGS+(14 * 4)(a0) + swc1 $f15, U_PCB_FPREGS+(15 * 4)(a0) + swc1 $f16, U_PCB_FPREGS+(16 * 4)(a0) + swc1 $f17, U_PCB_FPREGS+(17 * 4)(a0) + swc1 $f18, U_PCB_FPREGS+(18 * 4)(a0) + swc1 $f19, U_PCB_FPREGS+(19 * 4)(a0) + swc1 $f20, U_PCB_FPREGS+(20 * 4)(a0) + swc1 $f21, U_PCB_FPREGS+(21 * 4)(a0) + swc1 $f22, U_PCB_FPREGS+(22 * 4)(a0) + swc1 $f23, U_PCB_FPREGS+(23 * 4)(a0) + swc1 $f24, U_PCB_FPREGS+(24 * 4)(a0) + swc1 $f25, U_PCB_FPREGS+(25 * 4)(a0) + swc1 $f26, U_PCB_FPREGS+(26 * 4)(a0) + swc1 $f27, U_PCB_FPREGS+(27 * 4)(a0) + swc1 $f28, U_PCB_FPREGS+(28 * 4)(a0) + swc1 $f29, U_PCB_FPREGS+(29 * 4)(a0) + swc1 $f30, U_PCB_FPREGS+(30 * 4)(a0) + swc1 $f31, U_PCB_FPREGS+(31 * 4)(a0) + +1: +/* + * Restore the floating point registers. + */ + lw t0, U_PCB_FPREGS+(32 * 4)(a1) # get status register + lwc1 $f0, U_PCB_FPREGS+(0 * 4)(a1) + lwc1 $f1, U_PCB_FPREGS+(1 * 4)(a1) + lwc1 $f2, U_PCB_FPREGS+(2 * 4)(a1) + lwc1 $f3, U_PCB_FPREGS+(3 * 4)(a1) + lwc1 $f4, U_PCB_FPREGS+(4 * 4)(a1) + lwc1 $f5, U_PCB_FPREGS+(5 * 4)(a1) + lwc1 $f6, U_PCB_FPREGS+(6 * 4)(a1) + lwc1 $f7, U_PCB_FPREGS+(7 * 4)(a1) + lwc1 $f8, U_PCB_FPREGS+(8 * 4)(a1) + lwc1 $f9, U_PCB_FPREGS+(9 * 4)(a1) + lwc1 $f10, U_PCB_FPREGS+(10 * 4)(a1) + lwc1 $f11, U_PCB_FPREGS+(11 * 4)(a1) + lwc1 $f12, U_PCB_FPREGS+(12 * 4)(a1) + lwc1 $f13, U_PCB_FPREGS+(13 * 4)(a1) + lwc1 $f14, U_PCB_FPREGS+(14 * 4)(a1) + lwc1 $f15, U_PCB_FPREGS+(15 * 4)(a1) + lwc1 $f16, U_PCB_FPREGS+(16 * 4)(a1) + lwc1 $f17, U_PCB_FPREGS+(17 * 4)(a1) + lwc1 $f18, U_PCB_FPREGS+(18 * 4)(a1) + lwc1 $f19, U_PCB_FPREGS+(19 * 4)(a1) + lwc1 $f20, U_PCB_FPREGS+(20 * 4)(a1) + lwc1 $f21, U_PCB_FPREGS+(21 * 4)(a1) + lwc1 $f22, U_PCB_FPREGS+(22 * 4)(a1) + lwc1 $f23, U_PCB_FPREGS+(23 * 4)(a1) + lwc1 $f24, U_PCB_FPREGS+(24 * 4)(a1) + lwc1 $f25, U_PCB_FPREGS+(25 * 4)(a1) + lwc1 $f26, U_PCB_FPREGS+(26 * 4)(a1) + lwc1 $f27, U_PCB_FPREGS+(27 * 4)(a1) + lwc1 $f28, U_PCB_FPREGS+(28 * 4)(a1) + lwc1 $f29, U_PCB_FPREGS+(29 * 4)(a1) + lwc1 $f30, U_PCB_FPREGS+(30 * 4)(a1) + lwc1 $f31, U_PCB_FPREGS+(31 * 4)(a1) + + and t0, t0, ~MACH_FPC_EXCEPTION_BITS + ctc1 t0, MACH_FPC_CSR + nop + + mtc0 t1, MACH_COP_0_STATUS_REG # Restore the status register. + j ra + nop +END(MachSwitchFPState) + +/*---------------------------------------------------------------------------- + * + * MachSaveCurFPState -- + * + * Save the current floating point coprocessor state. + * + * MachSaveCurFPState(p) + * struct proc *p; + * + * Results: + * None. + * + * Side effects: + * machFPCurProcPtr is cleared. + * + *---------------------------------------------------------------------------- + */ +LEAF(MachSaveCurFPState) + lw a0, P_ADDR(a0) # get pointer to pcb for proc + mfc0 t1, MACH_COP_0_STATUS_REG # Disable interrupts and + li t0, MACH_SR_COP_1_BIT # enable the coprocessor + mtc0 t0, MACH_COP_0_STATUS_REG + sw zero, _C_LABEL(machFPCurProcPtr) # indicate state has been saved +/* + * First read out the status register to make sure that all FP operations + * have completed. + */ + lw t2, U_PCB_REGS+(PS * 4)(a0) # get CPU status register + li t3, ~MACH_SR_COP_1_BIT + and t2, t2, t3 # clear COP_1 enable bit + cfc1 t0, MACH_FPC_CSR # stall til FP done + cfc1 t0, MACH_FPC_CSR # now get status + sw t2, U_PCB_REGS+(PS * 4)(a0) # save new status register + sw t0, U_PCB_FPREGS+(32 * 4)(a0) # save FP status +/* + * Save the floating point registers. + */ + swc1 $f0, U_PCB_FPREGS+(0 * 4)(a0) + swc1 $f1, U_PCB_FPREGS+(1 * 4)(a0) + swc1 $f2, U_PCB_FPREGS+(2 * 4)(a0) + swc1 $f3, U_PCB_FPREGS+(3 * 4)(a0) + swc1 $f4, U_PCB_FPREGS+(4 * 4)(a0) + swc1 $f5, U_PCB_FPREGS+(5 * 4)(a0) + swc1 $f6, U_PCB_FPREGS+(6 * 4)(a0) + swc1 $f7, U_PCB_FPREGS+(7 * 4)(a0) + swc1 $f8, U_PCB_FPREGS+(8 * 4)(a0) + swc1 $f9, U_PCB_FPREGS+(9 * 4)(a0) + swc1 $f10, U_PCB_FPREGS+(10 * 4)(a0) + swc1 $f11, U_PCB_FPREGS+(11 * 4)(a0) + swc1 $f12, U_PCB_FPREGS+(12 * 4)(a0) + swc1 $f13, U_PCB_FPREGS+(13 * 4)(a0) + swc1 $f14, U_PCB_FPREGS+(14 * 4)(a0) + swc1 $f15, U_PCB_FPREGS+(15 * 4)(a0) + swc1 $f16, U_PCB_FPREGS+(16 * 4)(a0) + swc1 $f17, U_PCB_FPREGS+(17 * 4)(a0) + swc1 $f18, U_PCB_FPREGS+(18 * 4)(a0) + swc1 $f19, U_PCB_FPREGS+(19 * 4)(a0) + swc1 $f20, U_PCB_FPREGS+(20 * 4)(a0) + swc1 $f21, U_PCB_FPREGS+(21 * 4)(a0) + swc1 $f22, U_PCB_FPREGS+(22 * 4)(a0) + swc1 $f23, U_PCB_FPREGS+(23 * 4)(a0) + swc1 $f24, U_PCB_FPREGS+(24 * 4)(a0) + swc1 $f25, U_PCB_FPREGS+(25 * 4)(a0) + swc1 $f26, U_PCB_FPREGS+(26 * 4)(a0) + swc1 $f27, U_PCB_FPREGS+(27 * 4)(a0) + swc1 $f28, U_PCB_FPREGS+(28 * 4)(a0) + swc1 $f29, U_PCB_FPREGS+(29 * 4)(a0) + swc1 $f30, U_PCB_FPREGS+(30 * 4)(a0) + swc1 $f31, U_PCB_FPREGS+(31 * 4)(a0) + + mtc0 t1, MACH_COP_0_STATUS_REG # Restore the status register. + j ra + nop +END(MachSaveCurFPState) + +/*---------------------------------------------------------------------------- + * + * MachFPInterrupt -- + * MachFPTrap -- + * + * Handle a floating point interrupt (r3k) or trap (r4k). + * the handlers are indentical, only the reporting mechanisms differ. + * + * MachFPInterrupt(statusReg, causeReg, pc) + * unsigned statusReg; + * unsigned causeReg; + * unsigned pc; + * + * MachFPTrap(statusReg, causeReg, pc) + * unsigned statusReg; + * unsigned causeReg; + * unsigned pc; + * + * Results: + * None. + * + * Side effects: + * None. + * + *---------------------------------------------------------------------------- + */ +NON_LEAF(MachFPInterrupt, STAND_FRAME_SIZE, ra) + # XXX should use ANONLEAF (or ANESTED) instead of ALEAF. +ALEAF(MachFPTrap) + + subu sp, sp, STAND_FRAME_SIZE + mfc0 t0, MACH_COP_0_STATUS_REG + sw ra, STAND_RA_OFFSET(sp) + .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) + + or t1, t0, MACH_SR_COP_1_BIT + mtc0 t1, MACH_COP_0_STATUS_REG + nop + nop + nop # 1st extra nop for r4k + nop # 2nd extra nop for r4k + + cfc1 t1, MACH_FPC_CSR # stall til FP done + cfc1 t1, MACH_FPC_CSR # now get status + nop + sll t2, t1, (31 - 17) # unimplemented operation? + bgez t2, 3f # no, normal trap + nop +/* + * We got an unimplemented operation trap so + * fetch the instruction, compute the next PC and emulate the instruction. + */ + bgez a1, 1f # Check the branch delay bit. + nop +/* + * The instruction is in the branch delay slot so the branch will have to + * be emulated to get the resulting PC. + */ + sw a2, STAND_FRAME_SIZE + 8(sp) + li a0, UADDR+U_PCB_REGS # first arg is ptr to CPU registers + move a1, a2 # second arg is instruction PC + move a2, t1 # third arg is floating point CSR + jal _C_LABEL(MachEmulateBranch) # compute PC after branch + move a3, zero # fourth arg is FALSE +/* + * Now load the floating-point instruction in the branch delay slot + * to be emulated. + */ + lw a2, STAND_FRAME_SIZE + 8(sp) # restore EXC pc + b 2f + lw a0, 4(a2) # a0 = coproc instruction +/* + * This is not in the branch delay slot so calculate the resulting + * PC (epc + 4) into v0 and continue to MachEmulateFP(). + */ +1: + lw a0, 0(a2) # a0 = coproc instruction + addu v0, a2, 4 # v0 = next pc +2: + sw v0, UADDR+U_PCB_REGS+(PC * 4) # save new pc +/* + * Check to see if the instruction to be emulated is a floating-point + * instruction. + */ + srl a3, a0, MACH_OPCODE_SHIFT + beq a3, MACH_OPCODE_C1, 4f # this should never fail + nop +/* + * Send a floating point exception signal to the current process. + */ +3: + lw a0, _C_LABEL(curproc) # get current process + cfc1 a2, MACH_FPC_CSR # code = FP execptions + ctc1 zero, MACH_FPC_CSR # Clear exceptions + jal _C_LABEL(trapsignal) + li a1, SIGFPE + b FPReturn + nop + +/* + * Finally, we can call MachEmulateFP() where a0 is the instruction to emulate. + */ +4: + jal _C_LABEL(MachEmulateFP) + nop + +/* + * Turn off the floating point coprocessor and return. + */ +FPReturn: + mfc0 t0, MACH_COP_0_STATUS_REG + lw ra, STAND_RA_OFFSET(sp) + and t0, t0, ~MACH_SR_COP_1_BIT + mtc0 t0, MACH_COP_0_STATUS_REG + j ra + addu sp, sp, STAND_FRAME_SIZE +END(MachFPInterrupt) + #ifdef KADB /* @@ -3161,22 +4267,27 @@ END(cpu_getregs) _C_LABEL(intrnames): .asciiz "softclock" .asciiz "softnet" - .asciiz "dc" + .asciiz "serial0" + .asciiz "serial1" + .asciiz "serial2" .asciiz "ether" - .asciiz "disk" + .asciiz "scsi" .asciiz "memory" .asciiz "clock" - .asciiz "fp" - .asciiz "tcslot0" # Intrs 0 through 4 folded in here for now + .asciiz "fpu" + .asciiz "tcslot0" .asciiz "tcslot1" .asciiz "tcslot2" - .asciiz "tcslot3" - .asciiz "tcslot4" + .asciiz "dtop" + .asciiz "isdn" + .asciiz "floppy" + .asciiz "stray" .asciiz "nmi" + .asciiz "lostclock" _C_LABEL(eintrnames): .align 2 _C_LABEL(intrcnt): - .word 0,0,0,0,0,0,0,0,0,0,0,0,0,0 + .word 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, 0 _C_LABEL(eintrcnt): .word 0 # This shouldn't be needed but with 4.4bsd's as, the eintrcnt # label ends end up in a different section otherwise. diff --git a/sys/arch/pmax/pmax/machdep.c b/sys/arch/pmax/pmax/machdep.c index 8422bc65cae..9b1c110e50d 100644 --- a/sys/arch/pmax/pmax/machdep.c +++ b/sys/arch/pmax/pmax/machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: machdep.c,v 1.41 1996/01/04 22:22:40 jtc Exp $ */ +/* $NetBSD: machdep.c,v 1.51.2.4 1996/06/25 21:52:17 jtc Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -80,10 +80,11 @@ #include -#include #include #include +#include + #include #include #include @@ -95,28 +96,27 @@ #include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include +#include /* XXX */ + + +#include "pm.h" +#include "cfb.h" +#include "mfb.h" +#include "xcfb.h" +#include "sfb.h" +#include "dc.h" +#include "dtop.h" +#include "scc.h" +#include "le_ioasic.h" +#include "asc.h" #if NDTOP > 0 -extern int dtopKBDGetc(); +#include #endif -extern int KBDGetc(); extern void fbPutc(); -/*extern struct consdev cn_tab;*/ /* Will scan from max to min, inclusive */ static int tc_max_slot = KN02_TC_MAX; @@ -152,10 +152,11 @@ int bufpages = 0; int msgbufmapped = 0; /* set when safe to use msgbuf */ int maxmem; /* max memory per process */ int physmem; /* max supported memory, changes to actual */ +int physmem_boardmax; /* {model,simm}-specific bound on physmem */ int pmax_boardtype; /* Mother board type */ u_long le_iomem; /* 128K for lance chip via. ASIC */ u_long asc_iomem; /* and 7 * 8K buffers for the scsi */ -u_long asic_base; /* Base address of I/O asic */ +u_long ioasic_base; /* Base address of I/O asic */ const struct callback *callv; /* pointer to PROM entry points */ extern void (*tc_enable_interrupt) __P ((u_int slotno, @@ -164,7 +165,7 @@ extern void (*tc_enable_interrupt) __P ((u_int slotno, void (*tc_enable_interrupt) __P ((u_int slotno, int (*handler) __P ((void *sc)), void *sc, int onoff)); -extern int (*pmax_hardware_intr)(); +extern int (*mips_hardware_intr)(); int kn02_intr(), kmin_intr(), xine_intr(); @@ -175,9 +176,14 @@ void kn01_enable_intr __P ((u_int slotno, intr_arg_t sc, int onoff)); #endif /* DS3100 */ +#ifdef DS5100 /* mipsmate */ +# include /* kn230_establish_intr(), kn230_intr() */ +#endif + #ifdef DS5000_240 int kn03_intr(); #endif + extern int Mach_spl0(), Mach_spl1(), Mach_spl2(), Mach_spl3(), splhigh(); int (*Mach_splbio)() = splhigh; int (*Mach_splnet)() = splhigh; @@ -187,21 +193,21 @@ int (*Mach_splclock)() = splhigh; int (*Mach_splstatclock)() = splhigh; extern volatile struct chiptime *Mach_clock_addr; u_long kmin_tc3_imask, xine_tc3_imask; + #ifdef DS5000_240 u_long kn03_tc3_imask; extern u_long latched_cycle_cnt; #endif + tc_option_t tc_slot_info[TC_MAX_LOGICAL_SLOTS]; static void asic_init(); extern void RemconsInit(); -#ifdef DS5000 - -#if 1 /*def DS5000_200*/ +#ifdef DS5000_200 void kn02_enable_intr __P ((u_int slotno, int (*handler) __P((intr_arg_t sc)), intr_arg_t sc, int onoff)); -#endif /*def DS5000_200*/ +#endif /*DS5000_200*/ #ifdef DS5000_100 void kmin_enable_intr __P ((u_int slotno, int (*handler) (intr_arg_t sc), @@ -218,8 +224,10 @@ void kn03_enable_intr __P ((u_int slotno, int (*handler) (intr_arg_t sc), intr_arg_t sc, int onoff)); #endif /*DS5000_240*/ +#if defined(DS5000_200) || defined(DS5000_25) || defined(DS5000_100) || \ + defined(DS5000_240) volatile u_int *Mach_reset_addr; -#endif /* DS5000 */ +#endif /* DS5000_200 || DS5000_25 || DS5000_100 || DS5000_240 */ /* @@ -236,6 +244,7 @@ struct proc nullproc; /* for use by swtch_exit() */ * Process arguments passed to us by the prom monitor. * Return the first page address following the system. */ +void mach_init(argc, argv, code, cv) int argc; char *argv[]; @@ -249,10 +258,10 @@ mach_init(argc, argv, code, cv) caddr_t start; extern char edata[], end[]; extern char MachUTLBMiss[], MachUTLBMissEnd[]; - extern char MachException[], MachExceptionEnd[]; + extern char mips_R2000_exception[], mips_R2000_exceptionEnd[]; /* clear the BSS segment */ - v = (caddr_t)pmax_round_page(end); + v = (caddr_t)mips_round_page(end); bzero(edata, v - edata); /* Initialize callv so we can do PROM output... */ @@ -268,6 +277,33 @@ mach_init(argc, argv, code, cv) argv++; } +#if 0 + /* + * Copy down exception vector code. + */ + if (MachUTLBMissEnd - MachUTLBMiss > 0x80) + panic("startup: UTLB code too large"); + bcopy(MachUTLBMiss, (char *)MACH_UTLB_MISS_EXC_VEC, + MachUTLBMissEnd - MachUTLBMiss); + bcopy(mips_R2000_exception, (char *)MACH_GEN_EXC_VEC, + mips_R2000_exceptionEnd - mips_R2000_exception); + + /* + * Copy locore-function vector. + */ + bcopy(&R2000_locore_vec, &mips_locore_jumpvec, + sizeof(mips_locore_jumpvec_t)); + + /* + * Clear out the I and D caches. + */ + mips_r2000_ConfigCache(); + mips_r2000_FlushCache(); +#else + /*XXX*/ + r2000_vector_init(); +#endif + /* look at argv[0] and compute bootdev */ makebootdev(argv[0]); @@ -353,22 +389,6 @@ mach_init(argc, argv, code, cv) /* clear pages for u areas */ bzero(start, v - start); - /* - * Copy down exception vector code. - */ - if (MachUTLBMissEnd - MachUTLBMiss > 0x80) - panic("startup: UTLB code too large"); - bcopy(MachUTLBMiss, (char *)MACH_UTLB_MISS_EXC_VEC, - MachUTLBMissEnd - MachUTLBMiss); - bcopy(MachException, (char *)MACH_GEN_EXC_VEC, - MachExceptionEnd - MachException); - - /* - * Clear out the I and D caches. - */ - MachConfigCache(); - MachFlushCache(); - /* * Determine what model of computer we are running on. */ @@ -389,33 +409,44 @@ mach_init(argc, argv, code, cv) boot(RB_HALT | RB_NOSYNC); } + /* + * Initialize physmem_boardmax; assume no SIMM-bank limits. + * Adjst later in model-specific code if necessary. + */ + physmem_boardmax = MACH_MAX_MEM_ADDR; + /* check what model platform we are running on */ pmax_boardtype = ((i >> 16) & 0xff); switch (pmax_boardtype) { + +#ifdef DS3100 case DS_PMAX: /* DS3100 Pmax */ /* * Set up interrupt handling and I/O addresses. */ - pmax_hardware_intr = kn01_intr; + mips_hardware_intr = kn01_intr; tc_enable_interrupt = kn01_enable_intr; /*XXX*/ Mach_splbio = Mach_spl0; Mach_splnet = Mach_spl1; Mach_spltty = Mach_spl2; - Mach_splimp = Mach_spl2; + Mach_splimp = splhigh; /*XXX Mach_spl1(), if not for malloc()*/ Mach_splclock = Mach_spl3; Mach_splstatclock = Mach_spl3; Mach_clock_addr = (volatile struct chiptime *) MACH_PHYS_TO_UNCACHED(KN01_SYS_CLOCK); strcpy(cpu_model, "3100"); break; +#endif /* DS3100 */ - case DS_MIPSFAIR: /* DS5100 mipsfair */ + +#ifdef DS5100 + case DS_MIPSMATE: /* DS5100 aka mipsmate aka kn230 */ /* XXX just a guess */ /* * Set up interrupt handling and I/O addresses. */ - pmax_hardware_intr = kn01_intr; + mips_hardware_intr = kn230_intr; tc_enable_interrupt = kn01_enable_intr; /*XXX*/ Mach_splbio = Mach_spl0; Mach_splnet = Mach_spl1; @@ -427,8 +458,9 @@ mach_init(argc, argv, code, cv) MACH_PHYS_TO_UNCACHED(KN01_SYS_CLOCK); strcpy(cpu_model, "5100"); break; +#endif /* DS5100 */ -#ifdef DS5000 +#ifdef DS5000_200 case DS_3MAX: /* DS5000/200 3max */ { volatile int *csr_addr = @@ -446,7 +478,7 @@ mach_init(argc, argv, code, cv) i = *csr_addr; *csr_addr = (i & ~(KN02_CSR_WRESERVED | KN02_CSR_IOINTEN)) | KN02_CSR_CORRECT | 0xff; - pmax_hardware_intr = kn02_intr; + mips_hardware_intr = kn02_intr; tc_enable_interrupt = kn02_enable_intr; Mach_splbio = Mach_spl0; Mach_splnet = Mach_spl0; @@ -460,6 +492,7 @@ mach_init(argc, argv, code, cv) } strcpy(cpu_model, "5000/200"); break; +#endif /* DS5000_200 */ #ifdef DS5000_100 case DS_3MIN: /* DS5000/1xx 3min */ @@ -468,8 +501,8 @@ mach_init(argc, argv, code, cv) tc_slot_phys_base[0] = KMIN_PHYS_TC_0_START; tc_slot_phys_base[1] = KMIN_PHYS_TC_1_START; tc_slot_phys_base[2] = KMIN_PHYS_TC_2_START; - asic_base = MACH_PHYS_TO_UNCACHED(KMIN_SYS_ASIC); - pmax_hardware_intr = kmin_intr; + ioasic_base = MACH_PHYS_TO_UNCACHED(KMIN_SYS_ASIC); + mips_hardware_intr = kmin_intr; tc_enable_interrupt = kmin_enable_intr; kmin_tc3_imask = (KMIN_INTR_CLOCK | KMIN_INTR_PSWARN | KMIN_INTR_TIMEOUT); @@ -493,8 +526,8 @@ mach_init(argc, argv, code, cv) /* * Initialize interrupts. */ - *(u_int *)ASIC_REG_IMSK(asic_base) = KMIN_IM0; - *(u_int *)ASIC_REG_INTR(asic_base) = 0; + *(u_int *)IOASIC_REG_IMSK(ioasic_base) = KMIN_IM0; + *(u_int *)IOASIC_REG_INTR(ioasic_base) = 0; /* clear any memory errors from probes */ Mach_reset_addr = @@ -502,8 +535,21 @@ mach_init(argc, argv, code, cv) (*Mach_reset_addr) = 0; strcpy(cpu_model, "5000/1xx"); - break; + /* + * The kmin memory hardware seems to wrap memory addresses + * with 4Mbyte SIMMs, which causes the physmem computation + * to lose. Find out how big the SIMMS are and set + * max_ physmem accordingly. + * XXX Do MAXINEs lose the same way? + */ + physmem_boardmax = KMIN_PHYS_MEMORY_END + 1; + if ((*(int*)(MACH_PHYS_TO_UNCACHED(KMIN_REG_MSR)) & + KMIN_MSR_SIZE_16Mb) == 0) + physmem_boardmax = physmem_boardmax >> 2; + physmem_boardmax = MACH_PHYS_TO_UNCACHED(physmem_boardmax); + + break; #endif /* ds5000_100 */ #ifdef DS5000_25 @@ -512,8 +558,8 @@ mach_init(argc, argv, code, cv) tc_min_slot = XINE_TC_MIN; tc_slot_phys_base[0] = XINE_PHYS_TC_0_START; tc_slot_phys_base[1] = XINE_PHYS_TC_1_START; - asic_base = MACH_PHYS_TO_UNCACHED(XINE_SYS_ASIC); - pmax_hardware_intr = xine_intr; + ioasic_base = MACH_PHYS_TO_UNCACHED(XINE_SYS_ASIC); + mips_hardware_intr = xine_intr; tc_enable_interrupt = xine_enable_intr; Mach_splbio = Mach_spl3; Mach_splnet = Mach_spl3; @@ -527,8 +573,8 @@ mach_init(argc, argv, code, cv) /* * Initialize interrupts. */ - *(u_int *)ASIC_REG_IMSK(asic_base) = XINE_IM0; - *(u_int *)ASIC_REG_INTR(asic_base) = 0; + *(u_int *)IOASIC_REG_IMSK(ioasic_base) = XINE_IM0; + *(u_int *)IOASIC_REG_INTR(ioasic_base) = 0; /* clear any memory errors from probes */ Mach_reset_addr = (u_int*)MACH_PHYS_TO_UNCACHED(XINE_REG_TIMEOUT); @@ -544,8 +590,8 @@ mach_init(argc, argv, code, cv) tc_slot_phys_base[0] = KN03_PHYS_TC_0_START; tc_slot_phys_base[1] = KN03_PHYS_TC_1_START; tc_slot_phys_base[2] = KN03_PHYS_TC_2_START; - asic_base = MACH_PHYS_TO_UNCACHED(KN03_SYS_ASIC); - pmax_hardware_intr = kn03_intr; + ioasic_base = MACH_PHYS_TO_UNCACHED(KN03_SYS_ASIC); + mips_hardware_intr = kn03_intr; tc_enable_interrupt = kn03_enable_intr; Mach_reset_addr = (u_int *)MACH_PHYS_TO_UNCACHED(KN03_SYS_ERRADR); @@ -570,18 +616,17 @@ mach_init(argc, argv, code, cv) */ kn03_tc3_imask = KN03_IM0 & ~(KN03_INTR_TC_0|KN03_INTR_TC_1|KN03_INTR_TC_2); - *(u_int *)ASIC_REG_IMSK(asic_base) = kn03_tc3_imask; - *(u_int *)ASIC_REG_INTR(asic_base) = 0; + *(u_int *)IOASIC_REG_IMSK(ioasic_base) = kn03_tc3_imask; + *(u_int *)IOASIC_REG_INTR(ioasic_base) = 0; wbflush(); /* XXX hard-reset LANCE */ - *(u_int *)ASIC_REG_CSR(asic_base) |= 0x100; + *(u_int *)IOASIC_REG_CSR(ioasic_base) |= 0x100; /* clear any memory errors from probes */ *Mach_reset_addr = 0; strcpy(cpu_model, "5000/240"); break; #endif /* DS5000_240 */ -#endif /* DS5000 */ default: printf("kernel not configured for systype 0x%x\n", i); @@ -593,28 +638,31 @@ mach_init(argc, argv, code, cv) * Be careful to save and restore the original contents for msgbuf. */ physmem = btoc((vm_offset_t)v - KERNBASE); - cp = (char *)MACH_PHYS_TO_UNCACHED(physmem << PGSHIFT); - while (cp < (char *)MACH_MAX_MEM_ADDR) { + cp = (char *)MACH_PHYS_TO_UNCACHED(physmem << PGSHIFT); + while (cp < (char *)physmem_boardmax) { + int j; if (badaddr(cp, 4)) break; i = *(int *)cp; + j = ((int *)cp)[4]; *(int *)cp = 0xa5a5a5a5; /* * Data will persist on the bus if we read it right away. * Have to be tricky here. */ ((int *)cp)[4] = 0x5a5a5a5a; - MachEmptyWriteBuffer(); + wbflush(); if (*(int *)cp != 0xa5a5a5a5) break; *(int *)cp = i; + ((int *)cp)[4] = j; cp += NBPG; physmem++; } maxmem = physmem; -#if NLE > 0 +#if NLE_IOASIC > 0 /* * Grab 128K at the top of physical memory for the lance chip * on machines where it does dma through the I/O ASIC. @@ -625,7 +673,7 @@ mach_init(argc, argv, code, cv) maxmem -= btoc(128 * 1024); le_iomem = (maxmem << PGSHIFT); } -#endif /* NLE */ +#endif /* NLE_IOASIC */ #if NASC > 0 /* * Ditto for the scsi chip. There is probably a way to make asc.c @@ -712,6 +760,7 @@ mach_init(argc, argv, code, cv) * cpu_startup: allocate memory for variable-sized tables, * initialize cpu, and do autoconfiguration. */ +void cpu_startup() { register unsigned i; @@ -811,13 +860,6 @@ cpu_startup() /* * Configure the system. */ - if (boothowto & RB_CONFIG) { -#ifdef BOOT_CONFIG - user_config(); -#else - printf("kernel does not support -c; continuing..\n"); -#endif - } configure(); } @@ -850,7 +892,10 @@ cpu_sysctl(name, namelen, oldp, oldlenp, newp, newlen, p) /* * Set registers on exec. - * Clear all registers except sp, pc. + * Clear all registers except sp, pc, and t9. + * $sp is set to the stack pointer passed in. $pc is set to the entry + * point given by the exec_package passed in, as is $t9 (used for PIC + * code by the MIPS elf abi). */ void setregs(p, pack, stack, retval) @@ -864,6 +909,7 @@ setregs(p, pack, stack, retval) bzero((caddr_t)p->p_md.md_regs, (FSR + 1) * sizeof(int)); p->p_md.md_regs[SP] = stack; p->p_md.md_regs[PC] = pack->ep_entry & ~3; + p->p_md.md_regs[T9] = pack->ep_entry & ~3; /* abicall requirement */ p->p_md.md_regs[PS] = PSL_USERSET; p->p_md.md_flags & ~MDP_FPUSED; if (machFPCurProcPtr == p) @@ -976,6 +1022,7 @@ sendsig(catcher, sig, mask, code) regs[A3] = (int)catcher; regs[PC] = (int)catcher; + regs[T9] = (int)catcher; regs[SP] = (int)fp; /* * Signal trampoline code is at base of user stack. @@ -1059,64 +1106,12 @@ sys_sigreturn(p, v, retval) int waittime = -1; -boot(howto) - register int howto; -{ - - /* take a snap shot before clobbering any registers */ - if (curproc) - savectx(curproc->p_addr, 0); - -#ifdef DEBUG - if (panicstr) - stacktrace(); -#endif - - boothowto = howto; - if ((howto & RB_NOSYNC) == 0 && waittime < 0) { - extern struct proc proc0; - /* avoid panic at boot XXX */ - if (curproc == NULL) - curproc = &proc0; - /* - * Synchronize the disks.... - */ - waittime = 0; - vfs_shutdown (); - - /* - * If we've been adjusting the clock, the todr - * will be out of synch; adjust it now. - */ - resettodr(); - } - (void) splhigh(); /* extreme priority */ - if (callv != &callvec) { - if (howto & RB_HALT) - (*callv->_rex)('h'); - else { - if (howto & RB_DUMP) - dumpsys(); - (*callv->_rex)('b'); - } - } else if (howto & RB_HALT) { - volatile void (*f)() = (volatile void (*)())DEC_PROM_REINIT; - - (*f)(); /* jump back to prom monitor */ - } else { - volatile void (*f)() = (volatile void (*)())DEC_PROM_AUTOBOOT; - - if (howto & RB_DUMP) - dumpsys(); - (*f)(); /* jump back to prom monitor and do 'auto' cmd */ - } - /*NOTREACHED*/ -} int dumpmag = (int)0x8fca0101; /* magic number for savecore */ int dumpsize = 0; /* also for savecore */ long dumplo = 0; +void dumpconf() { int nblks; @@ -1142,6 +1137,7 @@ dumpconf() * getting on the dump stack, either when called above, or by * the auto-restart code. */ +void dumpsys() { int error; @@ -1159,7 +1155,13 @@ dumpsys() return; printf("\ndumping to dev %x, offset %d\n", dumpdev, dumplo); printf("dump "); - switch (error = (*bdevsw[major(dumpdev)].d_dump)(dumpdev)) { + /* + * XXX + * All but first arguments to dump() bogus. + * What should blkno, va, size be? + */ + error = (*bdevsw[major(dumpdev)].d_dump)(dumpdev, 0, 0, 0); + switch (error) { case ENXIO: printf("device bad\n"); @@ -1186,6 +1188,135 @@ dumpsys() } } +void +boot(howto) + register int howto; +{ + + /* take a snap shot before clobbering any registers */ + if (curproc) + savectx(curproc->p_addr, 0); + +#ifdef DEBUG + if (panicstr) + stacktrace(); +#endif + + boothowto = howto; + if ((howto & RB_NOSYNC) == 0 && waittime < 0) { + /* + * Synchronize the disks.... + */ + waittime = 0; + vfs_shutdown (); + + /* + * If we've been adjusting the clock, the todr + * will be out of synch; adjust it now. + */ + resettodr(); + } + (void) splhigh(); /* extreme priority */ + if (callv != &callvec) { + if (howto & RB_HALT) + (*callv->_rex)('h'); + else { + if (howto & RB_DUMP) + dumpsys(); + (*callv->_rex)('b'); + } + } else if (howto & RB_HALT) { + volatile void (*f)() = (volatile void (*)())DEC_PROM_REINIT; + + (*f)(); /* jump back to prom monitor */ + } else { + volatile void (*f)() = (volatile void (*)())DEC_PROM_AUTOBOOT; + + if (howto & RB_DUMP) + dumpsys(); + (*f)(); /* jump back to prom monitor and do 'auto' cmd */ + } + while(1) ; /* fool gcc */ + /*NOTREACHED*/ +} + + + +/* + * Read a high-resolution clock, if one is available, and return + * the current microsecond offset from time-of-day. + */ + +#ifndef DS5000_240 +# define clkread() (0) +#else + +/* + * IOASIC TC cycle counter, latched on every interrupt from RTC chip. + */ +u_long latched_cycle_cnt; + +/* + * On a Decstation 5000/240, use the turbochannel bus-cycle counter + * to interpolate micro-seconds since the last RTC clock tick. + * The interpolation base is the copy of the bus cycle-counter taken + * by the RTC interrupt handler. + * XXX on XINE, use the microsecond free-running counter. + * + */ +static inline u_long +clkread() +{ + + register u_long usec, cycles; /* really 32 bits? */ + + /* only support 5k/240 TC bus counter */ + if (pmax_boardtype != DS_3MAXPLUS) { + return (0); + } + + cycles = *(u_long*)IOASIC_REG_CTR(ioasic_base); + + /* Compute difference in cycle count from last hardclock() to now */ +#if 1 + /* my code, using u_ints */ + cycles = cycles - latched_cycle_cnt; +#else + /* Mills code, using (signed) ints */ + if (cycles >= latched_cycle_cnt) + cycles = cycles - latched_cycle_cnt; + else + cycles = latched_cycle_cnt - cycles; +#endif + + /* + * Scale from 40ns to microseconds. + * Avoid a kernel FP divide (by 25) using the approximation + * 1/25 = 40/1000 =~ 41/ 1024, which is good to 0.0975 % + */ + usec = cycles + (cycles << 3) + (cycles << 5); + usec = usec >> 10; + +#ifdef CLOCK_DEBUG + if (usec > 3906 +4) { + addlog("clkread: usec %d, counter=%lx\n", + usec, latched_cycle_cnt); + stacktrace(); + } +#endif /*CLOCK_DEBUG*/ + return usec; +} + +#if 0 +void +microset() +{ + latched_cycle_cnt = *(u_long*)(IOASIC_REG_CTR(ioasic_base)); +} +#endif +#endif /*DS5000_240*/ + + /* * Return the best possible estimate of the time in the timeval * to which tvp points. Unfortunately, we can't read the hardware registers. @@ -1202,42 +1333,11 @@ microtime(tvp) *tvp = time; -#ifdef notdef tvp->tv_usec += clkread(); - while (tvp->tv_usec > 1000000) { - tvp->tv_sec++; + if (tvp->tv_usec >= 1000000) { tvp->tv_usec -= 1000000; + tvp->tv_sec++; } -#endif - /* - * if there's a turbochannel cycle counter, use that to - * interpolate micro-seconds since the last RTC clock tick, - * using the software copy of the bus cycle-counter taken by - * the RTC interrupt handler. - */ -#ifdef DS5000_240 - if (pmax_boardtype == DS_3MAXPLUS) { - usec = *(u_int*)ASIC_REG_CTR(asic_base); - /* subtract cycle count a last tick */ - if (usec >= latched_cycle_cnt) - usec = usec - latched_cycle_cnt; - else - usec = latched_cycle_cnt - usec; - - /* - * scale from 40ns to microseconds. - * avoid a kernel FP divide (by 25) using - * an approximation 1/25 = 40/1000 =~ 41/ 1024. - */ - usec = usec + (usec << 3) + (usec << 5); - usec = usec >> 10; - tvp-> tv_usec += usec; - if (tvp->tv_usec >= 1000000) { - tvp->tv_usec -= 1000000; - tvp->tv_sec++; - } - } -#endif if (tvp->tv_sec == lasttime.tv_sec && tvp->tv_usec <= lasttime.tv_usec && @@ -1249,16 +1349,20 @@ microtime(tvp) splx(s); } +int initcpu() { register volatile struct chiptime *c; int i; +#if defined(DS5000_200) || defined(DS5000_25) || defined(DS5000_100) || \ + defined(DS5000_240) /* Reset after bus errors during probe */ if (Mach_reset_addr) { *Mach_reset_addr = 0; - MachEmptyWriteBuffer(); + wbflush(); } +#endif /* clear any pending interrupts */ switch (pmax_boardtype) { @@ -1267,14 +1371,14 @@ initcpu() case DS_3MAXPLUS: case DS_3MIN: case DS_MAXINE: - *(u_int *)ASIC_REG_INTR(asic_base) = 0; + *(u_int *)IOASIC_REG_INTR(ioasic_base) = 0; break; case DS_3MAX: *(u_int *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CHKSYN) = 0; - MachEmptyWriteBuffer(); + wbflush(); break; default: - printf("Unknown system type in initcpu()\n"); + printf("initcpu(): unknown system type 0x%x\n", pmax_boardtype); break; } @@ -1355,7 +1459,7 @@ out: } -#ifdef DS5000 +#ifdef DS3100 /* * Enable an interrupt from a slot on the KN01 internal bus. @@ -1381,8 +1485,11 @@ kn01_enable_intr(slotno, handler, sc, on) tc_slot_info[slotno].sc = 0; } } +#endif /* DS3100 */ +#ifdef DS5000_200 + /* * Enable/Disable interrupts for a TURBOchannel slot on the 3MAX. */ @@ -1399,8 +1506,8 @@ kn02_enable_intr(slotno, handler, sc, on) int s; #if 0 - printf("3MAX enable_intr: imask %x, %sabling slot %d, unit %d\n", - kn03_tc3_imask, (on? "en" : "dis"), slotno, unit); + printf("3MAX enable_intr: imask %x, %sabling slot %d, sc %p\n", + kn03_tc3_imask, (on? "en" : "dis"), slotno, sc); #endif if (slotno > TC_MAX_LOGICAL_SLOTS) @@ -1424,7 +1531,9 @@ kn02_enable_intr(slotno, handler, sc, on) *p_csr = csr & ~slotno; splx(s); } +#endif /*DS5000_200*/ +#ifdef DS5000_100 /* * Object: * kmin_enable_intr EXPORTED function @@ -1463,6 +1572,7 @@ kmin_enable_intr(slotno, handler, sc, on) mask = (KMIN_INTR_SCSI | KMIN_INTR_SCSI_PTR_LOAD | KMIN_INTR_SCSI_OVRUN | KMIN_INTR_SCSI_READ_E); break; + case KMIN_LANCE_SLOT: mask = KMIN_INTR_LANCE; break; @@ -1527,7 +1637,10 @@ kmin_enable_intr(slotno, handler, sc, on) tc_slot_info[slotno].sc = 0; } } +#endif /*DS5000_100*/ + +#ifdef DS5000_25 /* * Object: * xine_enable_intr EXPORTED function @@ -1591,8 +1704,9 @@ xine_enable_intr(slotno, handler, sc, on) tc_slot_info[slotno].intr = 0; tc_slot_info[slotno].sc = 0; } - *(u_int *)ASIC_REG_IMSK(asic_base) = xine_tc3_imask; + *(u_int *)IOASIC_REG_IMSK(ioasic_base) = xine_tc3_imask; } +#endif /*DS5000_25*/ #ifdef DS5000_240 void @@ -1601,7 +1715,7 @@ kn03_tc_reset() /* * Reset interrupts, clear any errors from newconf probes */ - *(u_int *)ASIC_REG_INTR(asic_base) = 0; + *(u_int *)IOASIC_REG_INTR(ioasic_base) = 0; *(unsigned *)MACH_PHYS_TO_UNCACHED(KN03_SYS_ERRADR) = 0; } @@ -1646,7 +1760,7 @@ kn03_enable_intr(slotno, handler, sc, on) break; case KN03_LANCE_SLOT: mask = KN03_INTR_LANCE; - mask |= ASIC_INTR_LANCE_READ_E; + mask |= IOASIC_INTR_LANCE_READ_E; break; case KN03_SCC0_SLOT: mask = KN03_INTR_SCC_0; @@ -1674,7 +1788,7 @@ kn03_enable_intr(slotno, handler, sc, on) tc_slot_info[slotno].sc = 0; } done: - *(u_int *)ASIC_REG_IMSK(asic_base) = kn03_tc3_imask; + *(u_int *)IOASIC_REG_IMSK(ioasic_base) = kn03_tc3_imask; wbflush(); } #endif /* DS5000_240 */ @@ -1690,11 +1804,10 @@ asic_init(isa_maxine) volatile u_int *decoder; /* These are common between 3min and maxine */ - decoder = (volatile u_int *)ASIC_REG_LANCE_DECODE(asic_base); + decoder = (volatile u_int *)IOASIC_REG_LANCE_DECODE(ioasic_base); *decoder = KMIN_LANCE_CONFIG; /* set the SCSI DMA configuration map */ - decoder = (volatile u_int *) ASIC_REG_SCSI_DECODE(asic_base); + decoder = (volatile u_int *) IOASIC_REG_SCSI_DECODE(ioasic_base); (*decoder) = 0x00000000e; } -#endif /* DS5000 */ diff --git a/sys/arch/pmax/pmax/mainbus.c b/sys/arch/pmax/pmax/mainbus.c index 92a157a15b6..cd4c9118b56 100644 --- a/sys/arch/pmax/pmax/mainbus.c +++ b/sys/arch/pmax/pmax/mainbus.c @@ -1,4 +1,4 @@ -/* $NetBSD: mainbus.c,v 1.4 1995/12/28 06:45:01 jonathan Exp $ */ +/* $NetBSD: mainbus.c,v 1.11.4.3 1996/06/16 17:24:42 mhitch Exp $ */ /* * Copyright (c) 1994, 1995 Carnegie-Mellon University. @@ -33,40 +33,56 @@ #include #include + #include -/*#include */ +#include +#include +#include + #include "pmaxtype.h" -#include "machine/machConst.h" #include "nameglue.h" + #include "kn01.h" +#include + +#include "tc.h" /* Is Turbochannel configured? */ struct mainbus_softc { struct device sc_dv; - struct abus sc_bus; }; /* Definition of the mainbus driver. */ static int mbmatch __P((struct device *, void *, void *)); static void mbattach __P((struct device *, struct device *, void *)); static int mbprint __P((void *, char *)); -struct cfdriver mainbuscd = - { NULL, "mainbus", mbmatch, mbattach, DV_DULL, - sizeof (struct mainbus_softc) }; + +struct cfattach mainbus_ca = { + sizeof (struct mainbus_softc), mbmatch, mbattach +}; + +struct cfdriver mainbus_cd = { + NULL, "mainbus", DV_DULL +}; + void mb_intr_establish __P((struct confargs *ca, int (*handler)(intr_arg_t), intr_arg_t val )); void mb_intr_disestablish __P((struct confargs *)); -caddr_t mb_cvtaddr __P((struct confargs *)); -int mb_matchname __P((struct confargs *, char *)); +/* + * Declarations of Potential child busses and how to configure them. + */ /* KN01 has devices directly on the system bus */ -void kn01_intr_establish __P((struct confargs *ca, +void kn01_intr_establish __P((struct device *parent, void *cookie, + int level, int (*handler)(intr_arg_t), intr_arg_t val )); void kn01_intr_disestablish __P((struct confargs *)); -caddr_t kn01_cvtaddr __P((struct confargs *)); static void kn01_attach __P((struct device *, struct device *, void *)); +void config_tcbus __P((struct device *parent, int cputype, + int (*printfn) __P((void *, char *)) )); + static int mbmatch(parent, cfdata, aux) @@ -96,96 +112,72 @@ mbattach(parent, self, aux) struct device *self; void *aux; { - struct mainbus_softc *sc = (struct mainbus_softc *)self; + register struct device *mb = self; struct confargs nca; - struct pcs *pcsp; - int i, cpuattachcnt; + extern int cputype, ncpus; printf("\n"); - sc->sc_bus.ab_dv = (struct device *)sc; - sc->sc_bus.ab_type = BUS_MAIN; - sc->sc_bus.ab_intr_establish = mb_intr_establish; - sc->sc_bus.ab_intr_disestablish = mb_intr_disestablish; - sc->sc_bus.ab_cvtaddr = mb_cvtaddr; - sc->sc_bus.ab_matchname = mb_matchname; - /* - * Try to find and attach all of the CPUs in the machine. + * if we ever support multi-CPU DEcstations (5800 family), + * the Alpha port's mainbus.c has an example of attaching + * multiple CPUs. + * + * For now, we only have one. Attach it directly. */ - cpuattachcnt = 0; - -#ifdef notyet /* alpha code */ - for (i = 0; i < hwrpb->rpb_pcs_cnt; i++) { - struct pcs *pcsp; - - pcsp = (struct pcs *)((char *)hwrpb + hwrpb->rpb_pcs_off + - (i * hwrpb->rpb_pcs_size)); - if ((pcsp->pcs_flags & PCS_PP) == 0) - continue; - - nca.ca_name = "cpu"; - nca.ca_slot = 0; - nca.ca_offset = 0; - nca.ca_bus = &sc->sc_bus; - if (config_found(self, &nca, mbprint)) - cpuattachcnt++; - } -#endif - - if (ncpus != cpuattachcnt) - printf("WARNING: %d cpus in machine, %d attached\n", - ncpus, cpuattachcnt); - -#if defined(DS_5000) || defined(DS5000_240) || defined(DS_5000_100) || \ - defined(DS_5000_25) - - if (cputype == DS_3MAXPLUS || - cputype == DS_3MAX || - cputype == DS_3MIN || - cputype == DS_MAXINE) { - - if (cputype == DS_3MIN || cputype == DS_MAXINE) - printf("UNTESTED autoconfiguration!!\n"); /*XXX*/ - - /* we have a TurboChannel bus! */ - nca.ca_name = "tc"; - nca.ca_slot = 0; - nca.ca_offset = 0; - nca.ca_bus = &sc->sc_bus; - config_found(self, &nca, mbprint); + /*nca.ca_name = "cpu";*/ + bcopy("cpu", nca.ca_name, sizeof(nca.ca_name)); + nca.ca_slot = 0; + nca.ca_offset = 0; + nca.ca_addr = 0; + config_found(mb, &nca, mbprint); + +#if NTC > 0 + if (cputype == DS_3MAXPLUS || cputype == DS_3MAX || + cputype == DS_3MIN || cputype == DS_MAXINE) { + /* + * This system might have a turbochannel. + * Call the TC subr code to look for one + * and if found, to configure it. + */ + config_tcbus(mb, 0 /* XXX */, mbprint); } -#endif /*Turbochannel*/ +#endif /* NTC */ /* * We haven't yet decided how to handle the PMAX (KN01) * which really only has a mainbus, baseboard devices, and an * optional framebuffer. */ -#if defined(DS3100) - /* XXX mipsfair: just a guess */ - if (cputype == DS_PMAX || cputype == DS_MIPSFAIR) { - /*XXX*/ - sc->sc_bus.ab_intr_establish = kn01_intr_establish; - sc->sc_bus.ab_intr_disestablish = kn01_intr_disestablish; - sc->sc_bus.ab_cvtaddr = kn01_cvtaddr; - - kn01_attach(parent, self, aux); +#if 1 /*defined(DS3100)*/ + + /* XXX mipsmate: just a guess */ + if (cputype == DS_PMAX || cputype == DS_MIPSMATE) { + kn01_attach(mb, (void*)0, aux); } #endif /*DS3100*/ - } -#define KN01_MAXDEVS 5 +#define KN01_MAXDEVS 8 struct confargs kn01_devs[KN01_MAXDEVS] = { - /* name index pri xxx */ - { "pm", 0, 3, (u_int)KV(KN01_PHYS_FBUF_START) }, - { "dc", 1, 2, (u_int)KV(KN01_SYS_DZ) }, - { "lance", 2, 1, (u_int)KV(KN01_SYS_LANCE) }, - { "sii", 3, 0, (u_int)KV(KN01_SYS_SII) }, - { "dallas_rtc", 4, 16, (u_int)KV(KN01_SYS_CLOCK) } + /* name slot offset addr intpri */ + { "pm", 0, 0, (u_int)KV(KN01_PHYS_FBUF_START), 3, }, + { "dc", 1, 0, (u_int)KV(KN01_SYS_DZ), 2, }, + { "lance", 2, 0, (u_int)KV(KN01_SYS_LANCE), 1, }, + { "sii", 3, 0, (u_int)KV(KN01_SYS_SII), 0, }, + { "mc146818", 4, 0, (u_int)KV(KN01_SYS_CLOCK), 16, }, + { "dc", 5, 0, (u_int)KV(0x15000000), 4, }, + { "dc", 6, 0, (u_int)KV(0x15200000), 5, }, +#ifdef notyet + /* + * XXX Ultrix configures at 0x86400400. the first 0x400 byte are + * used for NVRAM state?? + */ + { "nvram", 6, 0, (u_int)KV(0x86400000), -1, }, +#endif + { "", 0, 0 } }; /* @@ -197,10 +189,13 @@ kn01_attach(parent, self, aux) struct device *self; void *aux; { - struct mainbus_softc *sc = (struct mainbus_softc *)self; struct confargs *nca; register int i; +#ifdef DEBUG +/*XXX*/ printf("(configuring kn01/5100 baseboard devices)\n"); +#endif + /* Try to configure each KN01 mainbus device */ for (i = 0; i < KN01_MAXDEVS; i++) { @@ -209,7 +204,10 @@ kn01_attach(parent, self, aux) printf("mbattach: bad config for slot %d\n", i); break; } - nca->ca_bus = &sc->sc_bus; + + if (nca->ca_name == NULL) { + panic("No name for mainbus device\n"); + } #if defined(DIAGNOSTIC) || defined(DEBUG) if (nca->ca_slot > KN01_MAXDEVS) @@ -218,13 +216,23 @@ dev slot > number of slots for %s", nca->ca_name); #endif - if (nca->ca_name == NULL) { - panic("No name for mainbus device\n"); - } +#ifdef DEBUG + printf("configuring %s at %x interrupt number %d\n", + nca->ca_name, nca->ca_addr, (u_int)nca->ca_slotpri); +#endif /* Tell the autoconfig machinery we've found the hardware. */ - config_found(self, nca, mbprint); + config_found(parent, nca, mbprint); } + + /* + * The Decstation 5100, like the 3100, has an sii, clock, ethernet, + * and dc, presumably at the same addresses. If so, the + * code above will configure them. The 5100 also + * has a slot for PrestoServe NVRAM and for an additional + * `mdc' dc-like, eigh-port serial option. If we supported + * those devices, this is the right place to configure them. + */ } static int @@ -256,31 +264,18 @@ mb_intr_disestablish(ca) panic("can never mb_intr_disestablish"); } -caddr_t -mb_cvtaddr(ca) - struct confargs *ca; -{ - - return (NULL); -} - -int -mb_matchname(ca, name) - struct confargs *ca; - char *name; -{ - - return (strcmp(name, ca->ca_name) == 0); -} - +#ifdef DS3100 void -kn01_intr_establish(ca, handler, val) - struct confargs *ca; +kn01_intr_establish(parent, cookie, level, handler, arg) + struct device *parent; + void * cookie; + int level; int (*handler) __P((intr_arg_t)); - intr_arg_t val; + intr_arg_t arg; { /* Interrupts on the KN01 are currently hardcoded. */ printf(" (kn01: intr_establish hardcoded) "); + kn01_enable_intr((u_int) cookie, handler, arg, 1); } void @@ -289,10 +284,47 @@ kn01_intr_disestablish(ca) { printf("(kn01: ignoring intr_disestablish) "); } +#endif /* DS3100 */ -caddr_t -kn01_cvtaddr(ca) - struct confargs *ca; +/* + * An interrupt-establish method. This should somehow be folded + * back into the autoconfiguration machinery. Until the TC machine + * portmasters agree on how to do that, it's a separate function. + * + * XXX since all drivers should be passign a softc for "arg", + * why not make that explicit and use (struct device*)arg->dv_parent, + * instead of explicitly passign the parent? +*/ +void +generic_intr_establish(parent, cookie, level, handler, arg) + void * parent; + void * cookie; + int level; + intr_handler_t handler; + intr_arg_t arg; { - return ((void *)ca->ca_offset); + struct device *dev = arg; + +#if NTC>0 + extern struct cfdriver ioasic_cd, tc_cd; + + if (dev->dv_parent->dv_cfdata->cf_driver == &ioasic_cd) { + /*XXX*/ printf("ioasic interrupt for %d\n", (u_int)cookie); + ioasic_intr_establish(parent, cookie, level, handler, arg); + } else + if (dev->dv_parent->dv_cfdata->cf_driver == &tc_cd) { + tc_intr_establish(parent, cookie, level, handler, arg); + } else +#endif +#ifdef DS3100 + if (dev->dv_parent->dv_cfdata->cf_driver == &mainbus_cd) { + kn01_intr_establish(parent, cookie, level, handler, arg); + } + else { +#else + { +#endif + printf("intr_establish: unknown parent bustype for %s\n", + dev->dv_xname); + } } diff --git a/sys/arch/pmax/pmax/maxine.h b/sys/arch/pmax/pmax/maxine.h index 0b0bb9d1b37..1a88c4c0798 100644 --- a/sys/arch/pmax/pmax/maxine.h +++ b/sys/arch/pmax/pmax/maxine.h @@ -1,4 +1,4 @@ -/* $NetBSD: maxine.h,v 1.4 1994/10/26 21:10:34 cgd Exp $ */ +/* $NetBSD: maxine.h,v 1.5 1996/01/31 08:46:56 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -153,33 +153,33 @@ #define XINE_SYS_ASIC (XINE_PHYS_TC_3_START + 0x0000000) -#define XINE_SYS_ROM_START (XINE_SYS_ASIC + ASIC_SLOT_0_START) +#define XINE_SYS_ROM_START (XINE_SYS_ASIC + IOASIC_SLOT_0_START) -#define XINE_SYS_ASIC_REGS (XINE_SYS_ASIC + ASIC_SLOT_1_START) +#define XINE_SYS_ASIC_REGS (XINE_SYS_ASIC + IOASIC_SLOT_1_START) -#define XINE_SYS_ETHER_ADDRESS (XINE_SYS_ASIC + ASIC_SLOT_2_START) +#define XINE_SYS_ETHER_ADDRESS (XINE_SYS_ASIC + IOASIC_SLOT_2_START) -#define XINE_SYS_LANCE (XINE_SYS_ASIC + ASIC_SLOT_3_START) +#define XINE_SYS_LANCE (XINE_SYS_ASIC + IOASIC_SLOT_3_START) -#define XINE_SYS_SCC_0 (XINE_SYS_ASIC + ASIC_SLOT_4_START) +#define XINE_SYS_SCC_0 (XINE_SYS_ASIC + IOASIC_SLOT_4_START) -#define XINE_SYS_VDAC_HI (XINE_SYS_ASIC + ASIC_SLOT_5_START) +#define XINE_SYS_VDAC_HI (XINE_SYS_ASIC + IOASIC_SLOT_5_START) -#define XINE_SYS_VDAC_LO (XINE_SYS_ASIC + ASIC_SLOT_7_START) +#define XINE_SYS_VDAC_LO (XINE_SYS_ASIC + IOASIC_SLOT_7_START) -#define XINE_SYS_CLOCK (XINE_SYS_ASIC + ASIC_SLOT_8_START) +#define XINE_SYS_CLOCK (XINE_SYS_ASIC + IOASIC_SLOT_8_START) -#define XINE_SYS_ISDN (XINE_SYS_ASIC + ASIC_SLOT_9_START) +#define XINE_SYS_ISDN (XINE_SYS_ASIC + IOASIC_SLOT_9_START) -#define XINE_SYS_DTOP (XINE_SYS_ASIC + ASIC_SLOT_10_START) +#define XINE_SYS_DTOP (XINE_SYS_ASIC + IOASIC_SLOT_10_START) -#define XINE_SYS_FLOPPY (XINE_SYS_ASIC + ASIC_SLOT_11_START) +#define XINE_SYS_FLOPPY (XINE_SYS_ASIC + IOASIC_SLOT_11_START) -#define XINE_SYS_SCSI (XINE_SYS_ASIC + ASIC_SLOT_12_START) +#define XINE_SYS_SCSI (XINE_SYS_ASIC + IOASIC_SLOT_12_START) -#define XINE_SYS_FLOPPY_DMA (XINE_SYS_ASIC + ASIC_SLOT_13_START) +#define XINE_SYS_FLOPPY_DMA (XINE_SYS_ASIC + IOASIC_SLOT_13_START) -#define XINE_SYS_SCSI_DMA (XINE_SYS_ASIC + ASIC_SLOT_14_START) +#define XINE_SYS_SCSI_DMA (XINE_SYS_ASIC + IOASIC_SLOT_14_START) #define XINE_SYS_BOOT_ROM_START (XINE_PHYS_TC_3_START + 0x3c00000) #define XINE_SYS_BOOT_ROM_END (XINE_PHYS_TC_3_START + 0x3c40000) @@ -210,39 +210,39 @@ #define XINE_REG_TIMEOUT 0x0e00000c /* I/O write timeout reg */ -#define XINE_REG_SCSI_DMAPTR ( XINE_SYS_ASIC + ASIC_SCSI_DMAPTR ) -#define XINE_REG_SCSI_DMANPTR ( XINE_SYS_ASIC + ASIC_SCSI_NEXTPTR ) -#define XINE_REG_LANCE_DMAPTR ( XINE_SYS_ASIC + ASIC_LANCE_DMAPTR ) -#define XINE_REG_SCC_T1_DMAPTR ( XINE_SYS_ASIC + ASIC_SCC_T1_DMAPTR ) -#define XINE_REG_SCC_R1_DMAPTR ( XINE_SYS_ASIC + ASIC_SCC_R1_DMAPTR ) -#define XINE_REG_DTOP_T_DMAPTR ( XINE_SYS_ASIC + ASIC_SCC_T2_DMAPTR ) -#define XINE_REG_DTOP_R_DMAPTR ( XINE_SYS_ASIC + ASIC_SCC_R2_DMAPTR ) -#define XINE_FLOPPY_DMAPTR ( XINE_SYS_ASIC + ASIC_FLOPPY_DMAPTR ) -#define XINE_ISDN_X_DMAPTR ( XINE_SYS_ASIC + ASIC_ISDN_X_DMAPTR ) -#define XINE_ISDN_X_NEXTPTR ( XINE_SYS_ASIC + ASIC_ISDN_X_NEXTPTR ) -#define XINE_ISDN_R_DMAPTR ( XINE_SYS_ASIC + ASIC_ISDN_R_DMAPTR ) -#define XINE_ISDN_R_NEXTPTR ( XINE_SYS_ASIC + ASIC_ISDN_R_NEXTPTR ) -#define XINE_REG_CSR ( XINE_SYS_ASIC + ASIC_CSR ) -#define XINE_REG_INTR ( XINE_SYS_ASIC + ASIC_INTR ) -#define XINE_REG_IMSK ( XINE_SYS_ASIC + ASIC_IMSK ) -#define XINE_REG_CURADDR ( XINE_SYS_ASIC + ASIC_CURADDR ) -#define XINE_ISDN_X_DATA ( XINE_SYS_ASIC + ASIC_ISDN_X_DATA ) -#define XINE_ISDN_R_DATA ( XINE_SYS_ASIC + ASIC_ISDN_R_DATA ) - -#define XINE_REG_LANCE_DECODE ( XINE_SYS_ASIC + ASIC_LANCE_DECODE ) -#define XINE_REG_SCSI_DECODE ( XINE_SYS_ASIC + ASIC_SCSI_DECODE ) -#define XINE_REG_SCC0_DECODE ( XINE_SYS_ASIC + ASIC_SCC0_DECODE ) -#define XINE_REG_DTOP_DECODE ( XINE_SYS_ASIC + ASIC_SCC1_DECODE ) -#define XINE_REG_FLOPPY_DECODE ( XINE_SYS_ASIC + ASIC_FLOPPY_DECODE ) +#define XINE_REG_SCSI_DMAPTR ( XINE_SYS_ASIC + IOASIC_SCSI_DMAPTR ) +#define XINE_REG_SCSI_DMANPTR ( XINE_SYS_ASIC + IOASIC_SCSI_NEXTPTR ) +#define XINE_REG_LANCE_DMAPTR ( XINE_SYS_ASIC + IOASIC_LANCE_DMAPTR ) +#define XINE_REG_SCC_T1_DMAPTR ( XINE_SYS_ASIC + IOASIC_SCC_T1_DMAPTR ) +#define XINE_REG_SCC_R1_DMAPTR ( XINE_SYS_ASIC + IOASIC_SCC_R1_DMAPTR ) +#define XINE_REG_DTOP_T_DMAPTR ( XINE_SYS_ASIC + IOASIC_SCC_T2_DMAPTR ) +#define XINE_REG_DTOP_R_DMAPTR ( XINE_SYS_ASIC + IOASIC_SCC_R2_DMAPTR ) +#define XINE_FLOPPY_DMAPTR ( XINE_SYS_ASIC + IOASIC_FLOPPY_DMAPTR ) +#define XINE_ISDN_X_DMAPTR ( XINE_SYS_ASIC + IOASIC_ISDN_X_DMAPTR ) +#define XINE_ISDN_X_NEXTPTR ( XINE_SYS_ASIC + IOASIC_ISDN_X_NEXTPTR ) +#define XINE_ISDN_R_DMAPTR ( XINE_SYS_ASIC + IOASIC_ISDN_R_DMAPTR ) +#define XINE_ISDN_R_NEXTPTR ( XINE_SYS_ASIC + IOASIC_ISDN_R_NEXTPTR ) +#define XINE_REG_CSR ( XINE_SYS_ASIC + IOASIC_CSR ) +#define XINE_REG_INTR ( XINE_SYS_ASIC + IOASIC_INTR ) +#define XINE_REG_IMSK ( XINE_SYS_ASIC + IOASIC_IMSK ) +#define XINE_REG_CURADDR ( XINE_SYS_ASIC + IOASIC_CURADDR ) +#define XINE_ISDN_X_DATA ( XINE_SYS_ASIC + IOASIC_ISDN_X_DATA ) +#define XINE_ISDN_R_DATA ( XINE_SYS_ASIC + IOASIC_ISDN_R_DATA ) + +#define XINE_REG_LANCE_DECODE ( XINE_SYS_ASIC + IOASIC_LANCE_DECODE ) +#define XINE_REG_SCSI_DECODE ( XINE_SYS_ASIC + IOASIC_SCSI_DECODE ) +#define XINE_REG_SCC0_DECODE ( XINE_SYS_ASIC + IOASIC_SCC0_DECODE ) +#define XINE_REG_DTOP_DECODE ( XINE_SYS_ASIC + IOASIC_SCC1_DECODE ) +#define XINE_REG_FLOPPY_DECODE ( XINE_SYS_ASIC + IOASIC_FLOPPY_DECODE ) # define XINE_LANCE_CONFIG 3 # define XINE_SCSI_CONFIG 14 # define XINE_SCC0_CONFIG (0x10|4) # define XINE_DTOP_CONFIG 10 # define XINE_FLOPPY_CONFIG 13 -#define XINE_REG_SCSI_SCR ( XINE_SYS_ASIC + ASIC_SCSI_SCR ) -#define XINE_REG_SCSI_SDR0 ( XINE_SYS_ASIC + ASIC_SCSI_SDR0 ) -#define XINE_REG_SCSI_SDR1 ( XINE_SYS_ASIC + ASIC_SCSI_SDR1 ) +#define XINE_REG_SCSI_SCR ( XINE_SYS_ASIC + IOASIC_SCSI_SCR ) +#define XINE_REG_SCSI_SDR0 ( XINE_SYS_ASIC + IOASIC_SCSI_SDR0 ) +#define XINE_REG_SCSI_SDR1 ( XINE_SYS_ASIC + IOASIC_SCSI_SDR1 ) /* * System registers defines (MREG and CREG) @@ -338,22 +338,22 @@ /* (re)defines for the System Interrupt and Mask Registers */ -#define XINE_INTR_T1_PAGE_END ASIC_INTR_T1_PAGE_END -#define XINE_INTR_T1_READ_E ASIC_INTR_T1_READ_E -#define XINE_INTR_R1_HALF_PAGE ASIC_INTR_R1_HALF_PAGE -#define XINE_INTR_R1_DMA_OVRUN ASIC_INTR_R1_DMA_OVRUN -#define XINE_INTR_DT_PAGE_END ASIC_INTR_T2_PAGE_END -#define XINE_INTR_DT_READ_E ASIC_INTR_T2_READ_E -#define XINE_INTR_DT_HALF_PAGE ASIC_INTR_R2_HALF_PAGE -#define XINE_INTR_DT_DMA_OVRUN ASIC_INTR_R2_DMA_OVRUN -#define XINE_INTR_FLOPPY_DMA_E ASIC_INTR_FLOPPY_DMA_E -#define XINE_INTR_ISDN_PTR_LOAD ASIC_INTR_ISDN_PTR_LOAD -#define XINE_INTR_ISDN_OVRUN ASIC_INTR_ISDN_OVRUN -#define XINE_INTR_ISDN_READ_E ASIC_INTR_ISDN_READ_E -#define XINE_INTR_SCSI_PTR_LOAD ASIC_INTR_SCSI_PTR_LOAD -#define XINE_INTR_SCSI_OVRUN ASIC_INTR_SCSI_OVRUN -#define XINE_INTR_SCSI_READ_E ASIC_INTR_SCSI_READ_E -#define XINE_INTR_LANCE_READ_E ASIC_INTR_LANCE_READ_E +#define XINE_INTR_T1_PAGE_END IOASIC_INTR_T1_PAGE_END +#define XINE_INTR_T1_READ_E IOASIC_INTR_T1_READ_E +#define XINE_INTR_R1_HALF_PAGE IOASIC_INTR_R1_HALF_PAGE +#define XINE_INTR_R1_DMA_OVRUN IOASIC_INTR_R1_DMA_OVRUN +#define XINE_INTR_DT_PAGE_END IOASIC_INTR_T2_PAGE_END +#define XINE_INTR_DT_READ_E IOASIC_INTR_T2_READ_E +#define XINE_INTR_DT_HALF_PAGE IOASIC_INTR_R2_HALF_PAGE +#define XINE_INTR_DT_DMA_OVRUN IOASIC_INTR_R2_DMA_OVRUN +#define XINE_INTR_FLOPPY_DMA_E IOASIC_INTR_FLOPPY_DMA_E +#define XINE_INTR_ISDN_PTR_LOAD IOASIC_INTR_ISDN_PTR_LOAD +#define XINE_INTR_ISDN_OVRUN IOASIC_INTR_ISDN_OVRUN +#define XINE_INTR_ISDN_READ_E IOASIC_INTR_ISDN_READ_E +#define XINE_INTR_SCSI_PTR_LOAD IOASIC_INTR_SCSI_PTR_LOAD +#define XINE_INTR_SCSI_OVRUN IOASIC_INTR_SCSI_OVRUN +#define XINE_INTR_SCSI_READ_E IOASIC_INTR_SCSI_READ_E +#define XINE_INTR_LANCE_READ_E IOASIC_INTR_LANCE_READ_E #define XINE_INTR_xxxx 0x00002808 /* ro */ #define XINE_INTR_FLOPPY 0x00008000 /* ro */ #define XINE_INTR_NVR_JUMPER 0x00004000 /* ro */ diff --git a/sys/arch/pmax/pmax/mem.c b/sys/arch/pmax/pmax/mem.c deleted file mode 100644 index c1d99888c86..00000000000 --- a/sys/arch/pmax/pmax/mem.c +++ /dev/null @@ -1,171 +0,0 @@ -/* $NetBSD: mem.c,v 1.7 1995/09/29 21:53:29 jonathan Exp $ */ - -/* - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1982, 1986, 1990, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)mem.c 8.3 (Berkeley) 1/12/94 - */ - -/* - * Memory special file - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -extern vm_offset_t avail_end; -caddr_t zeropage; - -/*ARGSUSED*/ -int -mmopen(dev, flag, mode) - dev_t dev; - int flag, mode; -{ - - return (0); -} - -/*ARGSUSED*/ -int -mmclose(dev, flag, mode) - dev_t dev; - int flag, mode; -{ - - return (0); -} - -/*ARGSUSED*/ -int -mmrw(dev, uio, flags) - dev_t dev; - struct uio *uio; - int flags; -{ - register vm_offset_t o, v; - register int c; - register struct iovec *iov; - int error = 0; - - while (uio->uio_resid > 0 && error == 0) { - iov = uio->uio_iov; - if (iov->iov_len == 0) { - uio->uio_iov++; - uio->uio_iovcnt--; - if (uio->uio_iovcnt < 0) - panic("mmrw"); - continue; - } - switch (minor(dev)) { - -/* minor device 0 is physical memory */ - case 0: - v = uio->uio_offset; - c = iov->iov_len; - if (v + c > ctob(physmem)) - return (EFAULT); - v += MACH_CACHED_MEMORY_ADDR; - error = uiomove((caddr_t)v, c, uio); - continue; - -/* minor device 1 is kernel memory */ - case 1: - v = uio->uio_offset; - c = min(iov->iov_len, MAXPHYS); - if (v < MACH_CACHED_MEMORY_ADDR) - return (EFAULT); - if (v + c > MACH_PHYS_TO_CACHED(avail_end + - sizeof (struct msgbuf)) && - (v < MACH_KSEG2_ADDR || - !kernacc((caddr_t)v, c, - uio->uio_rw == UIO_READ ? B_READ : B_WRITE))) - return (EFAULT); - error = uiomove((caddr_t)v, c, uio); - continue; - -/* minor device 2 is EOF/RATHOLE */ - case 2: - if (uio->uio_rw == UIO_WRITE) - uio->uio_resid = 0; - return (0); - -/* minor device 12 (/dev/zero) is source of nulls on read, rathole on write */ - case 12: - if (uio->uio_rw == UIO_WRITE) { - c = iov->iov_len; - break; - } - if (zeropage == NULL) { - zeropage = (caddr_t) - malloc(CLBYTES, M_TEMP, M_WAITOK); - bzero(zeropage, CLBYTES); - } - c = min(iov->iov_len, CLBYTES); - error = uiomove(zeropage, c, uio); - continue; - - default: - return (ENXIO); - } - if (error) - break; - iov->iov_base += c; - iov->iov_len -= c; - uio->uio_offset += c; - uio->uio_resid -= c; - } - return (error); -} - -int -mmmmap(dev, off, prot) - dev_t dev; - int off, prot; -{ - - return (EOPNOTSUPP); -} diff --git a/sys/arch/pmax/pmax/pmap.c b/sys/arch/pmax/pmax/pmap.c index 847d3b2e491..b3b2b632144 100644 --- a/sys/arch/pmax/pmax/pmap.c +++ b/sys/arch/pmax/pmax/pmap.c @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.9 1995/04/10 12:45:59 mycroft Exp $ */ +/* $NetBSD: pmap.c,v 1.10 1996/05/19 01:58:35 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -79,7 +79,8 @@ #include #include -#include +#include +#include #include extern vm_page_t vm_page_alloc1 __P((void)); @@ -198,17 +199,17 @@ pmap_bootstrap(firstaddr) * phys_start and phys_end but its better to use kseg0 addresses * rather than kernel virtual addresses mapped through the TLB. */ - i = maxmem - pmax_btop(MACH_CACHED_TO_PHYS(firstaddr)); + i = maxmem - mips_btop(MACH_CACHED_TO_PHYS(firstaddr)); valloc(pv_table, struct pv_entry, i); /* * Clear allocated memory. */ - firstaddr = pmax_round_page(firstaddr); + firstaddr = mips_round_page(firstaddr); bzero((caddr_t)start, firstaddr - start); avail_start = MACH_CACHED_TO_PHYS(firstaddr); - avail_end = pmax_ptob(maxmem); + avail_end = mips_ptob(maxmem); mem_size = avail_end - avail_start; virtual_avail = VM_MIN_KERNEL_ADDRESS; @@ -518,7 +519,7 @@ pmap_remove(pmap, sva, eva) panic("pmap_remove: uva not in range"); #endif while (sva < eva) { - nssva = pmax_trunc_seg(sva) + NBSEG; + nssva = mips_trunc_seg(sva) + NBSEG; if (nssva == 0 || nssva > eva) nssva = eva; /* @@ -686,7 +687,7 @@ pmap_protect(pmap, sva, eva, prot) panic("pmap_protect: uva not in range"); #endif while (sva < eva) { - nssva = pmax_trunc_seg(sva) + NBSEG; + nssva = mips_trunc_seg(sva) + NBSEG; if (nssva == 0 || nssva > eva) nssva = eva; /* @@ -717,6 +718,80 @@ pmap_protect(pmap, sva, eva, prot) } } +#ifdef CPU_R4000 +/* + * Return RO protection of page. + */ +int +pmap_is_page_ro(pmap, va, entry) + pmap_t pmap; + vm_offset_t va; + int entry; +{ + return(entry & PG_RO); +} + +/* + * pmap_page_cache: + * + * Change all mappings of a page to cached/uncached. + */ +void +pmap_page_cache(pa,mode) + vm_offset_t pa; +{ + register pv_entry_t pv; + register pt_entry_t *pte; + register vm_offset_t va; + register unsigned entry; + register unsigned newmode; + int s; + +#ifdef DEBUG + if (pmapdebug & (PDB_FOLLOW|PDB_ENTER)) + printf("pmap_page_uncache(%x)\n", pa); +#endif + if (!IS_VM_PHYSADDR(pa)) + return; + + newmode = mode & PV_UNCACHED ? PG_UNCACHED : PG_CACHED; + pv = pa_to_pvh(pa); + s = splimp(); + while (pv) { + pv->pv_flags = (pv->pv_flags & ~PV_UNCACHED) | mode; + if (!pv->pv_pmap->pm_segtab) { + /* + * Change entries in kernel pmap. + */ + pte = kvtopte(pv->pv_va); + entry = pte->pt_entry; + if (entry & PG_V) { + entry = (entry & ~PG_CACHEMODE) | newmode; + pte->pt_entry = entry; + MachTLBUpdate(pv->pv_va, entry); + } + } + else { + if (pte = pmap_segmap(pv->pv_pmap, pv->pv_va)) { + pte += (pv->pv_va >> PGSHIFT) & (NPTEPG - 1); + entry = pte->pt_entry; + if (entry & PG_V) { + entry = (entry & ~PG_CACHEMODE) | newmode; + pte->pt_entry = entry; + if (pv->pv_pmap->pm_tlbgen == tlbpid_gen) + MachTLBUpdate(pv->pv_va | (pv->pv_pmap->pm_tlbpid << + VMMACH_TLB_PID_SHIFT), entry); + } + } + } + pv = pv->pv_next; + } + + splx(s); +} +#endif /* CPU_R4000 */ + + /* * Insert the given physical page (p) at * the specified virtual address (v) in the @@ -1288,7 +1363,7 @@ pmap_phys_address(ppn) if (pmapdebug & PDB_FOLLOW) printf("pmap_phys_address(%x)\n", ppn); #endif - return (pmax_ptob(ppn)); + return (mips_ptob(ppn)); } /* diff --git a/sys/arch/pmax/pmax/pmax_trap.c b/sys/arch/pmax/pmax/pmax_trap.c new file mode 100644 index 00000000000..f5457833846 --- /dev/null +++ b/sys/arch/pmax/pmax/pmax_trap.c @@ -0,0 +1,915 @@ +/* $NetBSD: pmax_trap.c,v 1.35.4.2 1996/06/16 17:26:29 mhitch Exp $ */ + +/* + * Copyright (c) 1988 University of Utah. + * Copyright (c) 1992, 1993 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * the Systems Programming Group of the University of Utah Computer + * Science Department and Ralph Campbell. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: Utah Hdr: trap.c 1.32 91/04/06 + * + * @(#)trap.c 8.5 (Berkeley) 1/11/94 + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef KTRACE +#include +#endif +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +/* XXX */ +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include + +struct ifnet; struct arpcom; +#include /* Lance interrupt for kn01 */ + +#include "asc.h" +#include "sii.h" +#include "le_pmax.h" +#include "dc.h" + +#include +#include + +#include + +#include + +#ifdef DS3100 +#include +#include +#endif /* DS3100 */ + +struct proc *machFPCurProcPtr; /* pointer to last proc to use FP */ + + + + + +static void pmax_errintr __P((void)); +static void kn02_errintr __P((void)), kn02ba_errintr __P((void)); + +#ifdef DS5000_240 +static void kn03_errintr __P ((void)); +extern u_long kn03_tc3_imask; + +/* + + * IOASIC 40ns bus-cycle counter, used as hi-resolution clock: + * may also be present on (some) XINE, 3min hardware, but not tested there. + */ +extern u_long ioasic_base; /* Base address of I/O asic */ +u_long latched_cycle_cnt; /* + * IOASIC cycle counter, latched on every + * interrupt from RTC chip (64Hz). + */ +#endif /*DS5000_240*/ + +static unsigned kn02ba_recover_erradr __P((u_int phys, u_int mer)); +extern tc_option_t tc_slot_info[TC_MAX_LOGICAL_SLOTS]; +extern u_long kmin_tc3_imask, xine_tc3_imask; +extern const struct callback *callv; + +extern volatile struct chiptime *Mach_clock_addr; +extern u_long intrcnt[]; + +/* + * Index into intrcnt[], which is defined in locore + */ +typedef enum { + SOFTCLOCK_INTR =0, + SOFTNET_INTR =1, + SERIAL0_INTR=2, + SERIAL1_INTR = 3, + SERIAL2_INTR = 4, + LANCE_INTR =5, + SCSI_INTR = 6, + ERROR_INTR=7, + HARDCLOCK = 8, + FPU_INTR =9, + SLOT0_INTR =10, + SLOT1_INTR =11, + SLOT2_INTR =12, + DTOP_INTR = 13, /* XXX */ + ISDN_INTR = 14, /* XXX */ + FLOPPY_INTR = 15, + STRAY_INTR = 16 +} decstation_intr_t; + + +#ifdef DS3100 + +/* + * The pmax (3100) has no option bus. Each device is wired to + * a separate interrupt. For historical reasons, we call interrupt + * routines directly, if they're enabled. + */ + +#if NLE > 0 +int leintr __P((void *)); +#endif +#if NSII > 0 +int siiintr __P((void *)); +#endif +#if NDC > 0 +int dcintr __P((void *)); +#endif + +/* + * Handle pmax (DECstation 2100/3100) interrupts. + */ +int +kn01_intr(mask, pc, statusReg, causeReg) + unsigned mask; + unsigned pc; + unsigned statusReg; + unsigned causeReg; +{ + register volatile struct chiptime *c = Mach_clock_addr; + struct clockframe cf; + int temp; + extern struct cfdriver sii_cd; + extern struct cfdriver le_cd; + extern struct cfdriver dc_cd; + + /* handle clock interrupts ASAP */ + if (mask & MACH_INT_MASK_3) { + temp = c->regc; /* XXX clear interrupt bits */ + cf.pc = pc; + cf.sr = statusReg; + hardclock(&cf); + intrcnt[HARDCLOCK]++; + + /* keep clock interrupts enabled */ + causeReg &= ~MACH_INT_MASK_3; + } + /* Re-enable clock interrupts ASAP*/ + splx(MACH_INT_MASK_3 | MACH_SR_INT_ENA_CUR); + +#if NSII > 0 + if (mask & MACH_INT_MASK_0) { + intrcnt[SCSI_INTR]++; + siiintr(sii_cd.cd_devs[0]); + } +#endif /* NSII */ + +#if NLE_PMAX > 0 + if (mask & MACH_INT_MASK_1) { + /* + * tty interrupts were disabled by the splx() call + * that re-enables clock interrupts. A slip or ppp driver + * manipulating if queues should have called splimp(), + * which would mask out MACH_INT_MASK_1. + */ + am7990_intr(tc_slot_info[1].sc); + intrcnt[LANCE_INTR]++; + } +#endif /* NLE_PMAX */ + +#if NDC > 0 + if (mask & MACH_INT_MASK_2) { + dcintr(dc_cd.cd_devs[0]); + intrcnt[SERIAL0_INTR]++; + } +#endif /* NDC */ + + if (mask & MACH_INT_MASK_4) { + pmax_errintr(); + intrcnt[ERROR_INTR]++; + } + return ((statusReg & ~causeReg & MACH_HARD_INT_MASK) | + MACH_SR_INT_ENA_CUR); +} +#endif /* DS3100 */ + + +/* + * Handle hardware interrupts for the KN02. (DECstation 5000/200) + * Returns spl value. + */ +int +kn02_intr(mask, pc, statusReg, causeReg) + unsigned mask; + unsigned pc; + unsigned statusReg; + unsigned causeReg; +{ + register unsigned i, m; + register volatile struct chiptime *c = Mach_clock_addr; + register unsigned csr; + int temp; + struct clockframe cf; + static int warned = 0; + + /* handle clock interrupts ASAP */ + if (mask & MACH_INT_MASK_1) { + csr = *(unsigned *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CSR); + if ((csr & KN02_CSR_PSWARN) && !warned) { + warned = 1; + printf("WARNING: power supply is overheating!\n"); + } else if (warned && !(csr & KN02_CSR_PSWARN)) { + warned = 0; + printf("WARNING: power supply is OK again\n"); + } + + temp = c->regc; /* XXX clear interrupt bits */ + cf.pc = pc; + cf.sr = statusReg; + hardclock(&cf); + intrcnt[HARDCLOCK]++; + + /* keep clock interrupts enabled */ + causeReg &= ~MACH_INT_MASK_1; + } + /* Re-enable clock interrupts */ + splx(MACH_INT_MASK_1 | MACH_SR_INT_ENA_CUR); + if (mask & MACH_INT_MASK_0) { + static int intr_map[8] = { SLOT0_INTR, SLOT1_INTR, SLOT2_INTR, + /* these two bits reserved */ + STRAY_INTR, STRAY_INTR, + SCSI_INTR, LANCE_INTR, + SERIAL0_INTR }; + + csr = *(unsigned *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CSR); + m = csr & (csr >> KN02_CSR_IOINTEN_SHIFT) & KN02_CSR_IOINT; +#if 0 + *(unsigned *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CSR) = + (csr & ~(KN02_CSR_WRESERVED | 0xFF)) | + (m << KN02_CSR_IOINTEN_SHIFT); +#endif + for (i = 0; m; i++, m >>= 1) { + if (!(m & 1)) + continue; + intrcnt[intr_map[i]]++; + if (tc_slot_info[i].intr) + (*tc_slot_info[i].intr)(tc_slot_info[i].sc); + else + printf("spurious interrupt %d\n", i); + } +#if 0 + *(unsigned *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CSR) = + csr & ~(KN02_CSR_WRESERVED | 0xFF); +#endif + } + if (mask & MACH_INT_MASK_3) { + intrcnt[ERROR_INTR]++; + kn02_errintr(); + } + + return ((statusReg & ~causeReg & MACH_HARD_INT_MASK) | + MACH_SR_INT_ENA_CUR); +} + +/* + * 3min hardware interrupts. (DECstation 5000/1xx) + */ +int +kmin_intr(mask, pc, statusReg, causeReg) + unsigned mask; + unsigned pc; + unsigned statusReg; + unsigned causeReg; +{ + register u_int intr; + register volatile struct chiptime *c = Mach_clock_addr; + volatile u_int *imaskp = + (volatile u_int *)MACH_PHYS_TO_UNCACHED(KMIN_REG_IMSK); + volatile u_int *intrp = + (volatile u_int *)MACH_PHYS_TO_UNCACHED(KMIN_REG_INTR); + unsigned int old_mask; + struct clockframe cf; + int temp; + static int user_warned = 0; + + old_mask = *imaskp & kmin_tc3_imask; + *imaskp = kmin_tc3_imask | + (KMIN_IM0 & ~(KN03_INTR_TC_0|KN03_INTR_TC_1|KN03_INTR_TC_2)); + + if (mask & MACH_INT_MASK_4) + (*callv->_halt)((int *)0, 0); + if (mask & MACH_INT_MASK_3) { + intr = *intrp; + + /* masked interrupts are still observable */ + intr &= old_mask; + + if (intr & KMIN_INTR_SCSI_PTR_LOAD) { + *intrp &= ~KMIN_INTR_SCSI_PTR_LOAD; +#ifdef notdef + asc_dma_intr(); +#endif + } + + if (intr & (KMIN_INTR_SCSI_OVRUN | KMIN_INTR_SCSI_READ_E)) + *intrp &= ~(KMIN_INTR_SCSI_OVRUN | KMIN_INTR_SCSI_READ_E); + + if (intr & KMIN_INTR_LANCE_READ_E) + *intrp &= ~KMIN_INTR_LANCE_READ_E; + + if (intr & KMIN_INTR_TIMEOUT) + kn02ba_errintr(); + + if (intr & KMIN_INTR_CLOCK) { + temp = c->regc; /* XXX clear interrupt bits */ + cf.pc = pc; + cf.sr = statusReg; + hardclock(&cf); + intrcnt[HARDCLOCK]++; + } + + if ((intr & KMIN_INTR_SCC_0) && + tc_slot_info[KMIN_SCC0_SLOT].intr) { + (*(tc_slot_info[KMIN_SCC0_SLOT].intr)) + (tc_slot_info[KMIN_SCC0_SLOT].sc); + intrcnt[SERIAL0_INTR]++; + } + + if ((intr & KMIN_INTR_SCC_1) && + tc_slot_info[KMIN_SCC1_SLOT].intr) { + (*(tc_slot_info[KMIN_SCC1_SLOT].intr)) + (tc_slot_info[KMIN_SCC1_SLOT].sc); + intrcnt[SERIAL1_INTR]++; + } + + if ((intr & KMIN_INTR_SCSI) && + tc_slot_info[KMIN_SCSI_SLOT].intr) { + (*(tc_slot_info[KMIN_SCSI_SLOT].intr)) + (tc_slot_info[KMIN_SCSI_SLOT].sc); + intrcnt[SCSI_INTR]++; + } + + if ((intr & KMIN_INTR_LANCE) && + tc_slot_info[KMIN_LANCE_SLOT].intr) { + (*(tc_slot_info[KMIN_LANCE_SLOT].intr)) + (tc_slot_info[KMIN_LANCE_SLOT].sc); + intrcnt[LANCE_INTR]++; + } + + if (user_warned && ((intr & KMIN_INTR_PSWARN) == 0)) { + printf("%s\n", "Power supply ok now."); + user_warned = 0; + } + if ((intr & KMIN_INTR_PSWARN) && (user_warned < 3)) { + user_warned++; + printf("%s\n", "Power supply overheating"); + } + } + if ((mask & MACH_INT_MASK_0) && tc_slot_info[0].intr) { + (*tc_slot_info[0].intr)(tc_slot_info[0].sc); + intrcnt[SLOT0_INTR]++; + } + + if ((mask & MACH_INT_MASK_1) && tc_slot_info[1].intr) { + (*tc_slot_info[1].intr)(tc_slot_info[1].sc); + intrcnt[SLOT1_INTR]++; + } + if ((mask & MACH_INT_MASK_2) && tc_slot_info[2].intr) { + (*tc_slot_info[2].intr)(tc_slot_info[2].sc); + intrcnt[SLOT2_INTR]++; + } + +#if 0 /*XXX*/ + if (mask & (MACH_INT_MASK_2|MACH_INT_MASK_1|MACH_INT_MASK_0)) + printf("kmin: slot intr, mask 0x%x\n", + mask & + (MACH_INT_MASK_2|MACH_INT_MASK_1|MACH_INT_MASK_0)); +#endif + + return ((statusReg & ~causeReg & MACH_HARD_INT_MASK) | + MACH_SR_INT_ENA_CUR); +} + +/* + * Maxine hardware interrupts. (Personal DECstation 5000/xx) + */ +int +xine_intr(mask, pc, statusReg, causeReg) + unsigned mask; + unsigned pc; + unsigned statusReg; + unsigned causeReg; +{ + register u_int intr; + register volatile struct chiptime *c = Mach_clock_addr; + volatile u_int *imaskp = (volatile u_int *) + MACH_PHYS_TO_UNCACHED(XINE_REG_IMSK); + volatile u_int *intrp = (volatile u_int *) + MACH_PHYS_TO_UNCACHED(XINE_REG_INTR); + u_int old_mask; + struct clockframe cf; + int temp; + + old_mask = *imaskp & xine_tc3_imask; + *imaskp = xine_tc3_imask; + + if (mask & MACH_INT_MASK_4) + (*callv->_halt)((int *)0, 0); + + /* handle clock interrupts ASAP */ + if (mask & MACH_INT_MASK_1) { + temp = c->regc; /* XXX clear interrupt bits */ + cf.pc = pc; + cf.sr = statusReg; + hardclock(&cf); + intrcnt[HARDCLOCK]++; + causeReg &= ~MACH_INT_MASK_1; + } + /* reenable clock interrupts */ + splx(MACH_INT_MASK_1 | MACH_SR_INT_ENA_CUR); + + if (mask & MACH_INT_MASK_3) { + intr = *intrp; + /* masked interrupts are still observable */ + intr &= old_mask; + + if ((intr & XINE_INTR_SCC_0)) { + if (tc_slot_info[XINE_SCC0_SLOT].intr) + (*(tc_slot_info[XINE_SCC0_SLOT].intr)) + (tc_slot_info[XINE_SCC0_SLOT].sc); + else + printf ("can't handle scc interrupt\n"); + intrcnt[SERIAL0_INTR]++; + } + + if (intr & XINE_INTR_SCSI_PTR_LOAD) { + *intrp &= ~XINE_INTR_SCSI_PTR_LOAD; +#ifdef notdef + asc_dma_intr(); +#endif + } + + if (intr & (XINE_INTR_SCSI_OVRUN | XINE_INTR_SCSI_READ_E)) + *intrp &= ~(XINE_INTR_SCSI_OVRUN | XINE_INTR_SCSI_READ_E); + + if (intr & XINE_INTR_LANCE_READ_E) + *intrp &= ~XINE_INTR_LANCE_READ_E; + + if (intr & XINE_INTR_DTOP_RX) { + if (tc_slot_info[XINE_DTOP_SLOT].intr) + (*(tc_slot_info[XINE_DTOP_SLOT].intr)) + (tc_slot_info[XINE_DTOP_SLOT].sc); + else + printf ("can't handle dtop interrupt\n"); + intrcnt[DTOP_INTR]++; + } + + if (intr & XINE_INTR_FLOPPY) { + if (tc_slot_info[XINE_FLOPPY_SLOT].intr) + (*(tc_slot_info[XINE_FLOPPY_SLOT].intr)) + (tc_slot_info[XINE_FLOPPY_SLOT].sc); + else + printf ("can't handle floppy interrupt\n"); + intrcnt[FLOPPY_INTR]++; + } + + if (intr & XINE_INTR_TC_0) { + if (tc_slot_info[0].intr) + (*(tc_slot_info[0].intr)) + (tc_slot_info[0].sc); + else + printf ("can't handle tc0 interrupt\n"); + intrcnt[SLOT0_INTR]++; + } + + if (intr & XINE_INTR_TC_1) { + if (tc_slot_info[1].intr) + (*(tc_slot_info[1].intr)) + (tc_slot_info[1].sc); + else + printf ("can't handle tc1 interrupt\n"); + intrcnt[SLOT1_INTR]++; + } + + if (intr & XINE_INTR_ISDN) { + if (tc_slot_info[XINE_ISDN_SLOT].intr) + (*(tc_slot_info[XINE_ISDN_SLOT].intr)) + (tc_slot_info[XINE_ISDN_SLOT].sc); + else + printf ("can't handle isdn interrupt\n"); + intrcnt[ISDN_INTR]++; + } + + if (intr & XINE_INTR_SCSI) { + if (tc_slot_info[XINE_SCSI_SLOT].intr) + (*(tc_slot_info[XINE_SCSI_SLOT].intr)) + (tc_slot_info[XINE_SCSI_SLOT].sc); + else + printf ("can't handle scsi interrupt\n"); + intrcnt[SCSI_INTR]++; + } + + if (intr & XINE_INTR_LANCE) { + if (tc_slot_info[XINE_LANCE_SLOT].intr) + (*(tc_slot_info[XINE_LANCE_SLOT].intr)) + (tc_slot_info[XINE_LANCE_SLOT].sc); + else + printf ("can't handle lance interrupt\n"); + + intrcnt[LANCE_INTR]++; + } + } + if (mask & MACH_INT_MASK_2) + kn02ba_errintr(); + return ((statusReg & ~causeReg & MACH_HARD_INT_MASK) | + MACH_SR_INT_ENA_CUR); +} + +#ifdef DS5000_240 +/* + * 3Max+ hardware interrupts. (DECstation 5000/240) UNTESTED!! + */ +int +kn03_intr(mask, pc, statusReg, causeReg) + unsigned mask; + unsigned pc; + unsigned statusReg; + unsigned causeReg; +{ + register u_int intr; + register volatile struct chiptime *c = Mach_clock_addr; + volatile u_int *imaskp = (volatile u_int *) + MACH_PHYS_TO_UNCACHED(KN03_REG_IMSK); + volatile u_int *intrp = (volatile u_int *) + MACH_PHYS_TO_UNCACHED(KN03_REG_INTR); + u_int old_mask; + struct clockframe cf; + int temp; + static int user_warned = 0; + register u_long old_buscycle = latched_cycle_cnt; + + old_mask = *imaskp & kn03_tc3_imask; + *imaskp = kn03_tc3_imask; + + if (mask & MACH_INT_MASK_4) + (*callv->_halt)((int *)0, 0); + + /* handle clock interrupts ASAP */ + if (mask & MACH_INT_MASK_1) { + temp = c->regc; /* XXX clear interrupt bits */ + cf.pc = pc; + cf.sr = statusReg; + latched_cycle_cnt = *(u_long*)(IOASIC_REG_CTR(ioasic_base)); + hardclock(&cf); + intrcnt[HARDCLOCK]++; + old_buscycle = latched_cycle_cnt - old_buscycle; + causeReg &= ~MACH_INT_MASK_1; + } + /* reenable clock interrupts */ + splx(MACH_INT_MASK_1 | MACH_SR_INT_ENA_CUR); + + /* + * Check for late clock interrupts (allow 10% slop). Be careful + * to do so only after calling hardclock(), due to logging cost. + * Even then, logging dropped ticks just causes more clock + * ticks to be missed. + */ +#ifdef notdef + if ((mask & MACH_INT_MASK_1) && old_buscycle > (tick+49) * 25) { + extern int msgbufmapped; + if(msgbufmapped && 0) + addlog("kn03: clock intr %d usec late\n", + old_buscycle/25); + } +#endif + /* + * IOCTL asic DMA-related interrupts should be checked here, + * and DMA pointers serviced as soon as possible. + */ + + if (mask & MACH_INT_MASK_0) { + intr = *intrp; + /* masked interrupts are still observable */ + intr &= old_mask; + + if (intr & KN03_INTR_SCSI_PTR_LOAD) { + *intrp &= ~KN03_INTR_SCSI_PTR_LOAD; +#ifdef notdef + asc_dma_intr(); +#endif + } + + /* + * XXX + * DMA and non-DMA interrupts from the IOCTl asic all use the + * single interrupt request line from the IOCTL asic. + * Disabling IOASIC interrupts while servicing network or + * disk-driver interrupts causes DMA overruns. NON-dma IOASIC + * interrupts should be disabled in the ioasic, and + * interrupts from the IOASIC itself should be re-enabled. + * DMA interrupts can then be serviced whilst still servicing + * non-DMA interrupts from ioctl devices or TC options. + */ + + if (intr & (KN03_INTR_SCSI_OVRUN | KN03_INTR_SCSI_READ_E)) + *intrp &= ~(KN03_INTR_SCSI_OVRUN | KN03_INTR_SCSI_READ_E); + + if (intr & KN03_INTR_LANCE_READ_E) + *intrp &= ~KN03_INTR_LANCE_READ_E; + + if ((intr & KN03_INTR_SCC_0) && + tc_slot_info[KN03_SCC0_SLOT].intr) { + (*(tc_slot_info[KN03_SCC0_SLOT].intr)) + (tc_slot_info[KN03_SCC0_SLOT].sc); + intrcnt[SERIAL0_INTR]++; + } + + if ((intr & KN03_INTR_SCC_1) && + tc_slot_info[KN03_SCC1_SLOT].intr) { + (*(tc_slot_info[KN03_SCC1_SLOT].intr)) + (tc_slot_info[KN03_SCC1_SLOT].sc); + intrcnt[SERIAL1_INTR]++; + } + + if ((intr & KN03_INTR_TC_0) && + tc_slot_info[0].intr) { + (*(tc_slot_info[0].intr)) + (tc_slot_info[0].sc); + intrcnt[SLOT0_INTR]++; + } +#ifdef DIAGNOSTIC + else if (intr & KN03_INTR_TC_0) + printf ("can't handle tc0 interrupt\n"); +#endif /*DIAGNOSTIC*/ + + if ((intr & KN03_INTR_TC_1) && + tc_slot_info[1].intr) { + (*(tc_slot_info[1].intr)) + (tc_slot_info[1].sc); + intrcnt[SLOT1_INTR]++; + } +#ifdef DIAGNOSTIC + else if (intr & KN03_INTR_TC_1) + printf ("can't handle tc1 interrupt\n"); +#endif /*DIAGNOSTIC*/ + + if ((intr & KN03_INTR_TC_2) && + tc_slot_info[2].intr) { + (*(tc_slot_info[2].intr)) + (tc_slot_info[2].sc); + intrcnt[SLOT2_INTR]++; + } +#ifdef DIAGNOSTIC + else if (intr & KN03_INTR_TC_2) + printf ("can't handle tc2 interrupt\n"); +#endif /*DIAGNOSTIC*/ + + if ((intr & KN03_INTR_SCSI) && + tc_slot_info[KN03_SCSI_SLOT].intr) { + (*(tc_slot_info[KN03_SCSI_SLOT].intr)) + (tc_slot_info[KN03_SCSI_SLOT].sc); + intrcnt[SCSI_INTR]++; + } + + if ((intr & KN03_INTR_LANCE) && + tc_slot_info[KN03_LANCE_SLOT].intr) { + (*(tc_slot_info[KN03_LANCE_SLOT].intr)) + (tc_slot_info[KN03_LANCE_SLOT].sc); + intrcnt[LANCE_INTR]++; + } + + if (user_warned && ((intr & KN03_INTR_PSWARN) == 0)) { + printf("%s\n", "Power supply ok now."); + user_warned = 0; + } + if ((intr & KN03_INTR_PSWARN) && (user_warned < 3)) { + user_warned++; + printf("%s\n", "Power supply overheating"); + } + } + if (mask & MACH_INT_MASK_3) + kn03_errintr(); + return ((statusReg & ~causeReg & MACH_HARD_INT_MASK) | + MACH_SR_INT_ENA_CUR); +} +#endif /* DS5000_240 */ + + +/* + *---------------------------------------------------------------------- + * + * MemErrorInterrupts -- + * pmax_errintr - for the DS2100/DS3100 + * kn02_errintr - for the DS5000/200 + * kn02ba_errintr - for the DS5000/1xx and DS5000/xx + * + * Handler an interrupt for the control register. + * + * Results: + * None. + * + * Side effects: + * None. + * + *---------------------------------------------------------------------- + */ +#ifdef DS3100 +static void +pmax_errintr() +{ + volatile u_short *sysCSRPtr = + (u_short *)MACH_PHYS_TO_UNCACHED(KN01_SYS_CSR); + u_short csr; + + csr = *sysCSRPtr; + + if (csr & KN01_CSR_MERR) { + printf("Memory error at 0x%x\n", + *(unsigned *)MACH_PHYS_TO_UNCACHED(KN01_SYS_ERRADR)); + panic("Mem error interrupt"); + } + *sysCSRPtr = (csr & ~KN01_CSR_MBZ) | 0xff; +} +#endif /* DS3100 */ + +static void +kn02_errintr() +{ + u_int erradr, chksyn, physadr; + + erradr = *(u_int *)MACH_PHYS_TO_UNCACHED(KN02_SYS_ERRADR); + chksyn = *(u_int *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CHKSYN); + *(u_int *)MACH_PHYS_TO_UNCACHED(KN02_SYS_ERRADR) = 0; + wbflush(); + + if (!(erradr & KN02_ERR_VALID)) + return; + /* extract the physical word address and compensate for pipelining */ + physadr = erradr & KN02_ERR_ADDRESS; + if (!(erradr & KN02_ERR_WRITE)) + physadr = (physadr & ~0xfff) | ((physadr & 0xfff) - 5); + physadr <<= 2; + printf("%s memory %s %s error at 0x%08x\n", + (erradr & KN02_ERR_CPU) ? "CPU" : "DMA", + (erradr & KN02_ERR_WRITE) ? "write" : "read", + (erradr & KN02_ERR_ECCERR) ? "ECC" : "timeout", + physadr); + if (erradr & KN02_ERR_ECCERR) { + *(u_int *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CHKSYN) = 0; + wbflush(); + printf("ECC 0x%08x\n", chksyn); + + /* check for a corrected, single bit, read error */ + if (!(erradr & KN02_ERR_WRITE)) { + if (physadr & 0x4) { + /* check high word */ + if (chksyn & KN02_ECC_SNGHI) + return; + } else { + /* check low word */ + if (chksyn & KN02_ECC_SNGLO) + return; + } + } + } + panic("Mem error interrupt"); +} + +#ifdef DS5000_240 +static void +kn03_errintr() +{ + u_int erradr, errsyn, physadr; + + erradr = *(u_int *)MACH_PHYS_TO_UNCACHED(KN03_SYS_ERRADR); + errsyn = *(u_int *)MACH_PHYS_TO_UNCACHED(KN03_SYS_ERRSYN); + *(u_int *)MACH_PHYS_TO_UNCACHED(KN03_SYS_ERRADR) = 0; + wbflush(); + + if (!(erradr & KN03_ERR_VALID)) + return; + /* extract the physical word address and compensate for pipelining */ + physadr = erradr & KN03_ERR_ADDRESS; + if (!(erradr & KN03_ERR_WRITE)) + physadr = (physadr & ~0xfff) | ((physadr & 0xfff) - 5); + physadr <<= 2; + printf("%s memory %s %s error at 0x%08x", + (erradr & KN03_ERR_CPU) ? "CPU" : "DMA", + (erradr & KN03_ERR_WRITE) ? "write" : "read", + (erradr & KN03_ERR_ECCERR) ? "ECC" : "timeout", + physadr); + if (erradr & KN03_ERR_ECCERR) { + *(u_int *)MACH_PHYS_TO_UNCACHED(KN03_SYS_ERRSYN) = 0; + wbflush(); + printf(" ECC 0x%08x\n", errsyn); + + /* check for a corrected, single bit, read error */ + if (!(erradr & KN03_ERR_WRITE)) { + if (physadr & 0x4) { + /* check high word */ + if (errsyn & KN03_ECC_SNGHI) + return; + } else { + /* check low word */ + if (errsyn & KN03_ECC_SNGLO) + return; + } + } + printf("\n"); + } + else + printf("\n"); + printf("panic(\"Mem error interrupt\");\n"); +} +#endif /* DS5000_240 */ + +static void +kn02ba_errintr() +{ + register int mer, adr, siz; + static int errintr_cnt = 0; + + siz = *(volatile int *)MACH_PHYS_TO_UNCACHED(KMIN_REG_MSR); + mer = *(volatile int *)MACH_PHYS_TO_UNCACHED(KMIN_REG_MER); + adr = *(volatile int *)MACH_PHYS_TO_UNCACHED(KMIN_REG_AER); + + /* clear interrupt bit */ + *(unsigned int *)MACH_PHYS_TO_UNCACHED(KMIN_REG_TIMEOUT) = 0; + + errintr_cnt++; + printf("(%d)%s%x [%x %x %x]\n", errintr_cnt, + "Bad memory chip at phys ", + kn02ba_recover_erradr(adr, mer), + mer, siz, adr); +} + +static unsigned +kn02ba_recover_erradr(phys, mer) + register unsigned phys, mer; +{ + /* phys holds bits 28:2, mer knows which byte */ + switch (mer & KMIN_MER_LASTBYTE) { + case KMIN_LASTB31: + mer = 3; break; + case KMIN_LASTB23: + mer = 2; break; + case KMIN_LASTB15: + mer = 1; break; + case KMIN_LASTB07: + mer = 0; break; + } + return ((phys & KMIN_AER_ADDR_MASK) | mer); +} diff --git a/sys/arch/pmax/pmax/process_machdep.c b/sys/arch/pmax/pmax/process_machdep.c deleted file mode 100644 index 07e7334af0b..00000000000 --- a/sys/arch/pmax/pmax/process_machdep.c +++ /dev/null @@ -1,113 +0,0 @@ -/* $NetBSD: process_machdep.c,v 1.4 1995/12/20 02:00:34 jonathan Exp $ */ - -/* - * Copyright (c) 1994 Adam Glass - * Copyright (c) 1993 The Regents of the University of California. - * Copyright (c) 1993 Jan-Simon Pendry - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Jan-Simon Pendry. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * From: - * Id: procfs_i386.c,v 4.1 1993/12/17 10:47:45 jsp Rel - */ - -/* - * This file may seem a bit stylized, but that so that it's easier to port. - * Functions to be implemented here are: - * - * process_read_regs(proc, regs) - * Get the current user-visible register set from the process - * and copy it into the regs structure (). - * The process is stopped at the time read_regs is called. - * - * process_write_regs(proc, regs) - * Update the current register set from the passed in regs - * structure. Take care to avoid clobbering special CPU - * registers or privileged bits in the PSL. - * The process is stopped at the time write_regs is called. - * - * process_sstep(proc) - * Arrange for the process to trap after executing a single instruction. - * - * process_set_pc(proc) - * Set the process's program counter. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - - -int -process_read_regs(p, regs) - struct proc *p; - struct reg *regs; -{ - bcopy(p->p_md.md_regs, (caddr_t)regs, sizeof(struct reg)); - return (0); -} - -int -process_write_regs(p, regs) - struct proc *p; - struct reg *regs; -{ - bcopy((caddr_t)regs, p->p_md.md_regs, sizeof(struct reg)); - /* FIXME: is it safe to let users set system coprocessor regs? */ - /*p->p_md.md_tf->tf_psr = psr | (regs->r_psr & PSR_ICC);*/ - return (0); -} - -int -process_sstep(p, sstep) - struct proc *p; -{ - return (0); -} - -int -process_set_pc(p, addr) - struct proc *p; - caddr_t addr; -{ - return (0); -} - diff --git a/sys/arch/pmax/pmax/sys_machdep.c b/sys/arch/pmax/pmax/sys_machdep.c index 0f746c7f5a9..87d68f5f996 100644 --- a/sys/arch/pmax/pmax/sys_machdep.c +++ b/sys/arch/pmax/pmax/sys_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: sys_machdep.c,v 1.9 1995/11/30 00:59:11 jtc Exp $ */ +/* $NetBSD: sys_machdep.c,v 1.10 1996/04/10 17:38:28 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -115,10 +115,17 @@ sys_sysarch(p, v, retval) void *v; register_t *retval; { - struct sysarch_args /* { + struct sys_sysarch_args /* { syscallarg(int) op; syscallarg(char *) parms; } */ *uap = v; - return ENOSYS; + int error = 0; + + switch(SCARG(uap, op)) { + default: + error = ENOSYS; + break; + } + return(error); } diff --git a/sys/arch/pmax/pmax/trap.c b/sys/arch/pmax/pmax/trap.c index 50f6b029d72..14b8b134f1e 100644 --- a/sys/arch/pmax/pmax/trap.c +++ b/sys/arch/pmax/pmax/trap.c @@ -1,4 +1,4 @@ -/* $NetBSD: trap.c,v 1.24 1995/12/28 16:22:41 jonathan Exp $ */ +/* $NetBSD: trap.c,v 1.37.2.2 1996/09/09 20:39:56 thorpej Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -42,6 +42,10 @@ * @(#)trap.c 8.5 (Berkeley) 1/11/94 */ +#if #defined(CPU_R4000) && !defined(CPU_R3000) +#error Must define at least one of CPU_R3000 or CPU_R4000. +#endif + #include #include #include @@ -60,6 +64,7 @@ #include #include #include +#include #include #include @@ -67,78 +72,194 @@ #include #include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include - #include #include +#include -#include +/* all this to get prototypes for ipintr() and arpintr() */ +#include +#include +#include +#include +#include + +#include "ppp.h" struct proc *machFPCurProcPtr; /* pointer to last proc to use FP */ +/* + * Port-specific hardware interrupt handler + */ + +int (*mips_hardware_intr) __P((u_int mask, u_int pc, u_int status, + u_int cause)) = + ( int (*) __P((u_int, u_int, u_int, u_int)) ) 0; + /* * Exception-handling functions, called via machExceptionTable from locore */ -extern void MachKernGenException __P((void)); -extern void MachUserGenException __P((void)); -extern void MachKernIntr __P((void)); -extern void MachUserIntr __P((void)); extern void MachTLBModException __P((void)); extern void MachTLBMissException __P((void)); +extern void mips_r2000_KernGenException __P((void)); +extern void mips_r2000_UserGenException __P((void)); +extern void mips_r2000_KernIntr __P((void)); +extern void mips_r2000_UserIntr __P((void)); +extern void mips_r2000_TLBModException __P((void)); +extern void mips_r2000_TLBMissException __P((void)); + + +extern void mips_r4000_KernGenException __P((void)); +extern void mips_r4000_UserGenException __P((void)); +extern void mips_r4000_KernIntr __P((void)); +extern void mips_r4000_UserIntr __P((void)); +extern void mips_r4000_TLBModException __P((void)); +extern void mips_r4000_TLBMissException __P((void)); + +void (*mips_r2000_ExceptionTable[]) __P((void)) = { +/* + * The kernel exception handlers. + */ + mips_r2000_KernIntr, /* 0 external interrupt */ + mips_r2000_KernGenException, /* 1 TLB modification */ + mips_r2000_TLBMissException, /* 2 TLB miss (load or instr. fetch) */ + mips_r2000_TLBMissException, /* 3 TLB miss (store) */ + mips_r2000_KernGenException, /* 4 address error (load or I-fetch) */ + mips_r2000_KernGenException, /* 5 address error (store) */ + mips_r2000_KernGenException, /* 6 bus error (I-fetch) */ + mips_r2000_KernGenException, /* 7 bus error (load or store) */ + mips_r2000_KernGenException, /* 8 system call */ + mips_r2000_KernGenException, /* 9 breakpoint */ + mips_r2000_KernGenException, /* 10 reserved instruction */ + mips_r2000_KernGenException, /* 11 coprocessor unusable */ + mips_r2000_KernGenException, /* 12 arithmetic overflow */ + mips_r2000_KernGenException, /* 13 r4k trap excpt, r3k reserved */ + mips_r2000_KernGenException, /* 14 r4k virt coherence, r3k reserved */ + mips_r2000_KernGenException, /* 15 r4k FP exception, r3k reserved */ + mips_r2000_KernGenException, /* 16 reserved */ + mips_r2000_KernGenException, /* 17 reserved */ + mips_r2000_KernGenException, /* 18 reserved */ + mips_r2000_KernGenException, /* 19 reserved */ + mips_r2000_KernGenException, /* 20 reserved */ + mips_r2000_KernGenException, /* 21 reserved */ + mips_r2000_KernGenException, /* 22 reserved */ + mips_r2000_KernGenException, /* 23 watch exception */ + mips_r2000_KernGenException, /* 24 reserved */ + mips_r2000_KernGenException, /* 25 reserved */ + mips_r2000_KernGenException, /* 26 reserved */ + mips_r2000_KernGenException, /* 27 reserved */ + mips_r2000_KernGenException, /* 28 reserved */ + mips_r2000_KernGenException, /* 29 reserved */ + mips_r2000_KernGenException, /* 30 reserved */ + mips_r2000_KernGenException, /* 31 virt. coherence exception data */ +/* + * The user exception handlers. + */ + mips_r2000_UserIntr, /* 0 */ + mips_r2000_UserGenException, /* 1 */ + mips_r2000_UserGenException, /* 2 */ + mips_r2000_UserGenException, /* 3 */ + mips_r2000_UserGenException, /* 4 */ + mips_r2000_UserGenException, /* 5 */ + mips_r2000_UserGenException, /* 6 */ + mips_r2000_UserGenException, /* 7 */ + mips_r2000_UserGenException, /* 8 */ + mips_r2000_UserGenException, /* 9 */ + mips_r2000_UserGenException, /* 10 */ + mips_r2000_UserGenException, /* 11 */ + mips_r2000_UserGenException, /* 12 */ + mips_r2000_UserGenException, /* 13 */ + mips_r2000_UserGenException, /* 14 */ + mips_r2000_UserGenException, /* 15 */ + mips_r2000_UserGenException, /* 16 */ + mips_r2000_UserGenException, /* 17 */ + mips_r2000_UserGenException, /* 18 */ + mips_r2000_UserGenException, /* 19 */ + mips_r2000_UserGenException, /* 20 */ + mips_r2000_UserGenException, /* 21 */ + mips_r2000_UserGenException, /* 22 */ + mips_r2000_UserGenException, /* 23 */ + mips_r2000_UserGenException, /* 24 */ + mips_r2000_UserGenException, /* 25 */ + mips_r2000_UserGenException, /* 26 */ + mips_r2000_UserGenException, /* 27 */ + mips_r2000_UserGenException, /* 28 */ + mips_r2000_UserGenException, /* 29 */ + mips_r2000_UserGenException, /* 20 */ + mips_r2000_UserGenException, /* 31 */ +}; + void (*machExceptionTable[]) __P((void)) = { /* * The kernel exception handlers. */ - MachKernIntr, /* external interrupt */ - MachKernGenException, /* TLB modification */ - MachTLBMissException, /* TLB miss (load or instr. fetch) */ - MachTLBMissException, /* TLB miss (store) */ - MachKernGenException, /* address error (load or I-fetch) */ - MachKernGenException, /* address error (store) */ - MachKernGenException, /* bus error (I-fetch) */ - MachKernGenException, /* bus error (load or store) */ - MachKernGenException, /* system call */ - MachKernGenException, /* breakpoint */ - MachKernGenException, /* reserved instruction */ - MachKernGenException, /* coprocessor unusable */ - MachKernGenException, /* arithmetic overflow */ - MachKernGenException, /* reserved */ - MachKernGenException, /* reserved */ - MachKernGenException, /* reserved */ + mips_r2000_KernIntr, /* 0 external interrupt */ + mips_r2000_KernGenException, /* 1 TLB modification */ + mips_r2000_TLBMissException, /* 2 TLB miss (load or instr. fetch) */ + mips_r2000_TLBMissException, /* 3 TLB miss (store) */ + mips_r2000_KernGenException, /* 4 address error (load or I-fetch) */ + mips_r2000_KernGenException, /* 5 address error (store) */ + mips_r2000_KernGenException, /* 6 bus error (I-fetch) */ + mips_r2000_KernGenException, /* 7 bus error (load or store) */ + mips_r2000_KernGenException, /* 8 system call */ + mips_r2000_KernGenException, /* 9 breakpoint */ + mips_r2000_KernGenException, /* 10 reserved instruction */ + mips_r2000_KernGenException, /* 11 coprocessor unusable */ + mips_r2000_KernGenException, /* 12 arithmetic overflow */ + mips_r2000_KernGenException, /* 13 r4k trap excpt, r3k reserved */ + mips_r2000_KernGenException, /* 14 r4k virt coherence, r3k reserved */ + mips_r2000_KernGenException, /* 15 r4k FP exception, r3k reserved */ + mips_r2000_KernGenException, /* 16 reserved */ + mips_r2000_KernGenException, /* 17 reserved */ + mips_r2000_KernGenException, /* 18 reserved */ + mips_r2000_KernGenException, /* 19 reserved */ + mips_r2000_KernGenException, /* 20 reserved */ + mips_r2000_KernGenException, /* 21 reserved */ + mips_r2000_KernGenException, /* 22 reserved */ + mips_r2000_KernGenException, /* 23 watch exception */ + mips_r2000_KernGenException, /* 24 reserved */ + mips_r2000_KernGenException, /* 25 reserved */ + mips_r2000_KernGenException, /* 26 reserved */ + mips_r2000_KernGenException, /* 27 reserved */ + mips_r2000_KernGenException, /* 28 reserved */ + mips_r2000_KernGenException, /* 29 reserved */ + mips_r2000_KernGenException, /* 30 reserved */ + mips_r2000_KernGenException, /* 31 virt. coherence exception data */ /* * The user exception handlers. */ - MachUserIntr, - MachUserGenException, - MachUserGenException, - MachUserGenException, - MachUserGenException, - MachUserGenException, - MachUserGenException, - MachUserGenException, - MachUserGenException, - MachUserGenException, - MachUserGenException, - MachUserGenException, - MachUserGenException, - MachUserGenException, - MachUserGenException, - MachUserGenException, + mips_r2000_UserIntr, /* 0 */ + mips_r2000_UserGenException, /* 1 */ + mips_r2000_UserGenException, /* 2 */ + mips_r2000_UserGenException, /* 3 */ + mips_r2000_UserGenException, /* 4 */ + mips_r2000_UserGenException, /* 5 */ + mips_r2000_UserGenException, /* 6 */ + mips_r2000_UserGenException, /* 7 */ + mips_r2000_UserGenException, /* 8 */ + mips_r2000_UserGenException, /* 9 */ + mips_r2000_UserGenException, /* 10 */ + mips_r2000_UserGenException, /* 11 */ + mips_r2000_UserGenException, /* 12 */ + mips_r2000_UserGenException, /* 13 */ + mips_r2000_UserGenException, /* 14 */ + mips_r2000_UserGenException, /* 15 */ + mips_r2000_UserGenException, /* 16 */ + mips_r2000_UserGenException, /* 17 */ + mips_r2000_UserGenException, /* 18 */ + mips_r2000_UserGenException, /* 19 */ + mips_r2000_UserGenException, /* 20 */ + mips_r2000_UserGenException, /* 21 */ + mips_r2000_UserGenException, /* 22 */ + mips_r2000_UserGenException, /* 23 */ + mips_r2000_UserGenException, /* 24 */ + mips_r2000_UserGenException, /* 25 */ + mips_r2000_UserGenException, /* 26 */ + mips_r2000_UserGenException, /* 27 */ + mips_r2000_UserGenException, /* 28 */ + mips_r2000_UserGenException, /* 29 */ + mips_r2000_UserGenException, /* 20 */ + mips_r2000_UserGenException, /* 31 */ }; char *trap_type[] = { @@ -155,9 +276,25 @@ char *trap_type[] = { "reserved instruction", "coprocessor unusable", "arithmetic overflow", - "reserved 13", - "reserved 14", - "reserved 15", + "r4k trap/r3k reserved 13", + "r4k virtual coherency instruction/r3k reserved 14", + "r4k floating point/ r3k reserved 15", + "reserved 16", + "reserved 17", + "reserved 18", + "reserved 19", + "reserved 20", + "reserved 21", + "reserved 22", + "r4k watch", + "reserved 24", + "reserved 25", + "reserved 26", + "reserved 27", + "reserved 28", + "reserved 29", + "reserved 30", + "r4k virtual coherency data", }; #ifdef DEBUG @@ -168,6 +305,7 @@ struct trapdebug { /* trap history buffer for debugging */ u_int vadr; u_int pc; u_int ra; + u_int sp; u_int code; } trapdebug[TRAPSIZE], *trp = trapdebug; @@ -175,14 +313,20 @@ void trapDump __P((char * msg)); void cpu_getregs __P((int *regs)); #endif /* DEBUG */ +/* + * Other forward declarations. + */ +u_int MachEmulateBranch __P((unsigned *regsPtr, + unsigned instPC, + unsigned fpcCSR, + int allowNonBranch)); /* extern functions used but not declared elsewhere */ extern void MachFPInterrupt __P((u_int status, u_int cause, u_int pc)); extern void clearsoftclock __P((void)); extern void clearsoftnet __P((void)); -extern void splx __P((int)); +extern int splx __P((int)); extern int splhigh __P((void)); -extern void MachTLBUpdate __P((u_int, u_int)); extern void MachSwitchFPState __P((struct proc *from, struct user *to)); /* only called by locore */ @@ -200,41 +344,38 @@ extern void MachEmptyWriteBuffer __P((void)); extern void MachUTLBMiss __P((void)); extern void setsoftclock __P((void)); extern int main __P((void*)); +extern void am7990_meminit __P((void*)); /* XXX */ #endif /* DEBUG */ - -static void pmax_errintr __P((void)); -static void kn02_errintr __P((void)), kn02ba_errintr __P((void)); - -#ifdef DS5000_240 -static void kn03_errintr __P ((void)); -extern u_long kn03_tc3_imask; +extern volatile struct chiptime *Mach_clock_addr; +extern u_long kernelfaults; +u_long kernelfaults = 0; +extern u_long intrcnt[]; /* - * IOASIC 40ns bus-cycle counter, used as hi-resolution clock: - * may also be present on (some) XINE, 3min hardware, but not tested there. + * Index into intrcnt[], which is defined in locore */ -extern u_long asic_base; /* Base address of I/O asic */ -u_long latched_cycle_cnt; /* - * IOASIC cycle counter, latched on every - * interrupt from RTC chip (64Hz). - */ -#endif /*DS5000_240*/ - -static unsigned kn02ba_recover_erradr __P((u_int phys, u_int mer)); -extern tc_option_t tc_slot_info[TC_MAX_LOGICAL_SLOTS]; -extern u_long kmin_tc3_imask, xine_tc3_imask; -extern const struct callback *callv; - -int (*pmax_hardware_intr) __P((u_int mask, u_int pc, u_int status, - u_int cause)) = - ( int (*) __P((u_int, u_int, u_int, u_int)) ) 0; +typedef enum { + SOFTCLOCK_INTR =0, + SOFTNET_INTR =1, + SERIAL0_INTR=2, + SERIAL1_INTR = 3, + SERIAL2_INTR = 4, + LANCE_INTR =5, + SCSI_INTR = 6, + ERROR_INTR=7, + HARDCLOCK = 8, + FPU_INTR =9, + SLOT0_INTR =10, + SLOT1_INTR =11, + SLOT2_INTR =12, + DTOP_INTR = 13, /* XXX */ + ISDN_INTR = 14, /* XXX */ + FLOPPY_INTR = 15, + STRAY_INTR = 16 +} decstation_intr_t; -extern volatile struct chiptime *Mach_clock_addr; -extern u_long intrcnt[]; -extern u_long kernelfaults; -u_long kernelfaults = 0; /* * Handle an exception. @@ -264,13 +405,14 @@ trap(statusReg, causeReg, vadr, pc, args) trp->pc = pc; trp->ra = !USERMODE(statusReg) ? ((int *)&args)[19] : p->p_md.md_regs[RA]; + trp->sp = (int)&args; trp->code = 0; if (++trp == &trapdebug[TRAPSIZE]) trp = trapdebug; #endif cnt.v_trap++; - type = (causeReg & MACH_CR_EXC_CODE) >> MACH_CR_EXC_CODE_SHIFT; + type = (causeReg & MIPS_3K_CR_EXC_CODE) >> MACH_CR_EXC_CODE_SHIFT; if (USERMODE(statusReg)) { type |= T_USER; sticks = p->p_sticks; @@ -280,8 +422,8 @@ trap(statusReg, causeReg, vadr, pc, args) * Enable hardware interrupts if they were on before. * We only respond to software interrupts when returning to user mode. */ - if (statusReg & MACH_SR_INT_ENA_PREV) - splx((statusReg & MACH_HARD_INT_MASK) | MACH_SR_INT_ENA_CUR); + if (statusReg & MIPS_3K_SR_INT_ENA_PREV) + splx((statusReg & MACH_HARD_INT_MASK) | MIPS_SR_INT_IE); switch (type) { case T_TLB_MOD: @@ -330,8 +472,9 @@ trap(statusReg, causeReg, vadr, pc, args) pte += (vadr >> PGSHIFT) & (NPTEPG - 1); entry = pte->pt_entry; #ifdef DIAGNOSTIC - if (!(entry & PG_V) || (entry & PG_M)) + if (!(entry & PG_V) || (entry & PG_M)) { panic("trap: utlbmod: invalid pte"); + } #endif if (entry & PG_RO) { /* write to read only page */ @@ -347,8 +490,9 @@ trap(statusReg, causeReg, vadr, pc, args) #ifdef ATTR pmap_attributes[atop(pa)] |= PMAP_ATTR_MOD; #else - if (!IS_VM_PHYSADDR(pa)) + if (!IS_VM_PHYSADDR(pa)) { panic("trap: utlbmod: unmanaged page"); + } PHYS_TO_VM_PAGE(pa)->flags &= ~PG_CLEAN; #endif if (!USERMODE(statusReg)) @@ -370,7 +514,7 @@ trap(statusReg, causeReg, vadr, pc, args) rv = vm_fault(kernel_map, va, ftype, FALSE); if (rv == KERN_SUCCESS) return (pc); - if (i = ((struct pcb *)UADDR)->pcb_onfault) { + if ((i = ((struct pcb *)UADDR)->pcb_onfault) != 0) { ((struct pcb *)UADDR)->pcb_onfault = 0; return (onfault_table[i]); } @@ -431,14 +575,14 @@ trap(statusReg, causeReg, vadr, pc, args) goto out; } if (!USERMODE(statusReg)) { - if (i = ((struct pcb *)UADDR)->pcb_onfault) { + if ((i = ((struct pcb *)UADDR)->pcb_onfault) != 0) { ((struct pcb *)UADDR)->pcb_onfault = 0; return (onfault_table[i]); } goto err; } ucode = vadr; - i = SIGSEGV; + i = (rv == KERN_PROTECTION_FAILURE) ? SIGBUS : SIGSEGV; break; } @@ -446,7 +590,7 @@ trap(statusReg, causeReg, vadr, pc, args) case T_ADDR_ERR_ST+T_USER: /* misaligned or kseg access */ case T_BUS_ERR_IFETCH+T_USER: /* BERR asserted to cpu */ case T_BUS_ERR_LD_ST+T_USER: /* BERR asserted to cpu */ - i = SIGBUS; + i = SIGSEGV; break; case T_SYSCALL+T_USER: @@ -601,6 +745,7 @@ trap(statusReg, causeReg, vadr, pc, args) trp->vadr = locr0[SP]; trp->pc = locr0[PC]; trp->ra = locr0[RA]; + /*trp->sp = (int)&args;*/ trp->code = -code; if (++trp == &trapdebug[TRAPSIZE]) trp = trapdebug; @@ -631,7 +776,7 @@ trap(statusReg, causeReg, vadr, pc, args) #endif #ifdef KTRACE if (KTRPOINT(p, KTR_SYSRET)) - ktrsysret(p->p_tracep, code, i, rval); + ktrsysret(p->p_tracep, code, i, rval[0]); /*XXX*/ #endif goto out; } @@ -702,6 +847,19 @@ trap(statusReg, causeReg, vadr, pc, args) p->p_md.md_flags |= MDP_FPUSED; goto out; + case T_FPE: +#ifdef DEBUG + trapDump("fpintr"); +#else + printf("FPU Trap: PC %x CR %x SR %x\n", + pc, causeReg, statusReg); + goto err; +#endif + + case T_FPE+T_USER: + MachFPTrap(statusReg, causeReg, pc); + goto out; + case T_OVFLOW+T_USER: i = SIGFPE; break; @@ -709,7 +867,7 @@ trap(statusReg, causeReg, vadr, pc, args) case T_ADDR_ERR_LD: /* misaligned access */ case T_ADDR_ERR_ST: /* misaligned access */ case T_BUS_ERR_LD_ST: /* BERR asserted to cpu */ - if (i = ((struct pcb *)UADDR)->pcb_onfault) { + if ((i = ((struct pcb *)UADDR)->pcb_onfault) != 0) { ((struct pcb *)UADDR)->pcb_onfault = 0; return (onfault_table[i]); } @@ -812,13 +970,13 @@ out: * Note: curproc might be NULL. */ void -interrupt(statusReg, causeReg, pc) +interrupt(statusReg, causeReg, pc /* XXX what, args */ ) unsigned statusReg; /* status register at time of the exception */ unsigned causeReg; /* cause register at time of exception */ unsigned pc; /* program counter where to continue */ { register unsigned mask; - struct clockframe cf; + /*struct clockframe cf;*/ #ifdef DEBUG trp->status = statusReg; @@ -826,6 +984,7 @@ interrupt(statusReg, causeReg, pc) trp->vadr = 0; trp->pc = pc; trp->ra = 0; + trp->sp = /* (int)&args */ 0; /* XXX pass args in */ trp->code = 0; if (++trp == &trapdebug[TRAPSIZE]) trp = trapdebug; @@ -833,10 +992,10 @@ interrupt(statusReg, causeReg, pc) cnt.v_intr++; mask = causeReg & statusReg; /* pending interrupts & enable mask */ - if (pmax_hardware_intr) - splx((*pmax_hardware_intr)(mask, pc, statusReg, causeReg)); + if (mips_hardware_intr) + splx((*mips_hardware_intr)(mask, pc, statusReg, causeReg)); if (mask & MACH_INT_MASK_5) { - intrcnt[7]++; + intrcnt[FPU_INTR]++; if (!USERMODE(statusReg)) { #ifdef DEBUG trapDump("fpintr"); @@ -849,11 +1008,12 @@ interrupt(statusReg, causeReg, pc) } /* process network interrupt if we trapped or will very soon */ + /* XXX fixme: operator precedence botch? */ if ((mask & MACH_SOFT_INT_MASK_1) || netisr && (statusReg & MACH_SOFT_INT_MASK_1)) { clearsoftnet(); cnt.v_soft++; - intrcnt[1]++; + intrcnt[SOFTNET_INTR]++; #ifdef INET if (netisr & (1 << NETISR_ARP)) { netisr &= ~(1 << NETISR_ARP); @@ -876,7 +1036,6 @@ interrupt(statusReg, causeReg, pc) clnlintr(); } #endif -#include "ppp.h" #if NPPP > 0 if (netisr & (1 << NETISR_PPP)) { netisr &= ~(1 << NETISR_PPP); @@ -887,503 +1046,12 @@ interrupt(statusReg, causeReg, pc) if (mask & MACH_SOFT_INT_MASK_0) { clearsoftclock(); - intrcnt[0]++; + intrcnt[SOFTCLOCK_INTR]++; cnt.v_soft++; softclock(); - } + } } -/* - * Handle pmax (DECstation 2100/3100) interrupts. - */ -int -kn01_intr(mask, pc, statusReg, causeReg) - unsigned mask; - unsigned pc; - unsigned statusReg; - unsigned causeReg; -{ - register volatile struct chiptime *c = Mach_clock_addr; - struct clockframe cf; - int temp; - extern struct cfdriver siicd; - extern struct cfdriver lecd; - - /* handle clock interrupts ASAP */ - if (mask & MACH_INT_MASK_3) { - intrcnt[6]++; - temp = c->regc; /* XXX clear interrupt bits */ - cf.pc = pc; - cf.sr = statusReg; - hardclock(&cf); - - /* keep clock interrupts enabled */ - causeReg &= ~MACH_INT_MASK_3; - } - /* Re-enable clock interrupts */ - splx(MACH_INT_MASK_3 | MACH_SR_INT_ENA_CUR); -#if NSII > 0 - if (mask & MACH_INT_MASK_0) { - intrcnt[2]++; - siiintr(siicd.cd_devs[0]); - } -#endif -#if NLE > 0 - if (mask & MACH_INT_MASK_1) { - intrcnt[3]++; - leintr(lecd.cd_devs[0]); - } -#endif -#if NDC > 0 - if (mask & MACH_INT_MASK_2) { - intrcnt[4]++; - dcintr(0); - } -#endif - if (mask & MACH_INT_MASK_4) { - intrcnt[5]++; - pmax_errintr(); - } - return ((statusReg & ~causeReg & MACH_HARD_INT_MASK) | - MACH_SR_INT_ENA_CUR); -} - -/* - * Handle hardware interrupts for the KN02. (DECstation 5000/200) - * Returns spl value. - */ -int -kn02_intr(mask, pc, statusReg, causeReg) - unsigned mask; - unsigned pc; - unsigned statusReg; - unsigned causeReg; -{ - register unsigned i, m; - register volatile struct chiptime *c = Mach_clock_addr; - register unsigned csr; - int temp; - struct clockframe cf; - static int warned = 0; - - /* handle clock interrupts ASAP */ - if (mask & MACH_INT_MASK_1) { - csr = *(unsigned *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CSR); - if ((csr & KN02_CSR_PSWARN) && !warned) { - warned = 1; - printf("WARNING: power supply is overheating!\n"); - } else if (warned && !(csr & KN02_CSR_PSWARN)) { - warned = 0; - printf("WARNING: power supply is OK again\n"); - } - intrcnt[6]++; - - temp = c->regc; /* XXX clear interrupt bits */ - cf.pc = pc; - cf.sr = statusReg; - hardclock(&cf); - - /* keep clock interrupts enabled */ - causeReg &= ~MACH_INT_MASK_1; - } - /* Re-enable clock interrupts */ - splx(MACH_INT_MASK_1 | MACH_SR_INT_ENA_CUR); - if (mask & MACH_INT_MASK_0) { - static int intr_map[8] = { 8, 9, 10, 11, 12, 4, 3, 2 }; - - csr = *(unsigned *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CSR); - m = csr & (csr >> KN02_CSR_IOINTEN_SHIFT) & KN02_CSR_IOINT; -#if 0 - *(unsigned *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CSR) = - (csr & ~(KN02_CSR_WRESERVED | 0xFF)) | - (m << KN02_CSR_IOINTEN_SHIFT); -#endif - for (i = 0; m; i++, m >>= 1) { - if (!(m & 1)) - continue; - intrcnt[intr_map[i]]++; - if (tc_slot_info[i].intr) - (*tc_slot_info[i].intr)(tc_slot_info[i].sc); - else - printf("spurious interrupt %d\n", i); - } -#if 0 - *(unsigned *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CSR) = - csr & ~(KN02_CSR_WRESERVED | 0xFF); -#endif - } - if (mask & MACH_INT_MASK_3) { - intrcnt[5]++; - kn02_errintr(); - } - - return ((statusReg & ~causeReg & MACH_HARD_INT_MASK) | - MACH_SR_INT_ENA_CUR); -} - -/* - * 3min hardware interrupts. (DECstation 5000/1xx) - */ -int -kmin_intr(mask, pc, statusReg, causeReg) - unsigned mask; - unsigned pc; - unsigned statusReg; - unsigned causeReg; -{ - register u_int intr; - register volatile struct chiptime *c = Mach_clock_addr; - volatile u_int *imaskp = - (volatile u_int *)MACH_PHYS_TO_UNCACHED(KMIN_REG_IMSK); - volatile u_int *intrp = - (volatile u_int *)MACH_PHYS_TO_UNCACHED(KMIN_REG_INTR); - unsigned int old_mask; - struct clockframe cf; - int temp; - static int user_warned = 0; - - old_mask = *imaskp & kmin_tc3_imask; - *imaskp = kmin_tc3_imask | - (KMIN_IM0 & ~(KN03_INTR_TC_0|KN03_INTR_TC_1|KN03_INTR_TC_2)); - - if (mask & MACH_INT_MASK_4) - (*callv->_halt)((int *)0, 0); - if (mask & MACH_INT_MASK_3) { - intr = *intrp; - - /* masked interrupts are still observable */ - intr &= old_mask; - - if (intr & KMIN_INTR_SCSI_PTR_LOAD) { - *intrp &= ~KMIN_INTR_SCSI_PTR_LOAD; -#ifdef notdef - asc_dma_intr(); -#endif - } - - if (intr & (KMIN_INTR_SCSI_OVRUN | KMIN_INTR_SCSI_READ_E)) - *intrp &= ~(KMIN_INTR_SCSI_OVRUN | KMIN_INTR_SCSI_READ_E); - - if (intr & KMIN_INTR_LANCE_READ_E) - *intrp &= ~KMIN_INTR_LANCE_READ_E; - - if (intr & KMIN_INTR_TIMEOUT) - kn02ba_errintr(); - - if (intr & KMIN_INTR_CLOCK) { - temp = c->regc; /* XXX clear interrupt bits */ - cf.pc = pc; - cf.sr = statusReg; - hardclock(&cf); - } - - if ((intr & KMIN_INTR_SCC_0) && - tc_slot_info[KMIN_SCC0_SLOT].intr) - (*(tc_slot_info[KMIN_SCC0_SLOT].intr)) - (tc_slot_info[KMIN_SCC0_SLOT].sc); - - if ((intr & KMIN_INTR_SCC_1) && - tc_slot_info[KMIN_SCC1_SLOT].intr) - (*(tc_slot_info[KMIN_SCC1_SLOT].intr)) - (tc_slot_info[KMIN_SCC1_SLOT].sc); - - if ((intr & KMIN_INTR_SCSI) && - tc_slot_info[KMIN_SCSI_SLOT].intr) - (*(tc_slot_info[KMIN_SCSI_SLOT].intr)) - (tc_slot_info[KMIN_SCSI_SLOT].sc); - - if ((intr & KMIN_INTR_LANCE) && - tc_slot_info[KMIN_LANCE_SLOT].intr) - (*(tc_slot_info[KMIN_LANCE_SLOT].intr)) - (tc_slot_info[KMIN_LANCE_SLOT].sc); - - if (user_warned && ((intr & KMIN_INTR_PSWARN) == 0)) { - printf("%s\n", "Power supply ok now."); - user_warned = 0; - } - if ((intr & KMIN_INTR_PSWARN) && (user_warned < 3)) { - user_warned++; - printf("%s\n", "Power supply overheating"); - } - } - if ((mask & MACH_INT_MASK_0) && tc_slot_info[0].intr) - (*tc_slot_info[0].intr)(tc_slot_info[0].sc); - if ((mask & MACH_INT_MASK_1) && tc_slot_info[1].intr) - (*tc_slot_info[1].intr)(tc_slot_info[1].sc); - if ((mask & MACH_INT_MASK_2) && tc_slot_info[2].intr) - (*tc_slot_info[2].intr)(tc_slot_info[2].sc); - -#if 0 /*XXX*/ - if (mask & (MACH_INT_MASK_2|MACH_INT_MASK_1|MACH_INT_MASK_0)) - printf("kmin: slot intr, mask 0x%x\n", - mask & - (MACH_INT_MASK_2|MACH_INT_MASK_1|MACH_INT_MASK_0)); -#endif - - return ((statusReg & ~causeReg & MACH_HARD_INT_MASK) | - MACH_SR_INT_ENA_CUR); -} - -/* - * Maxine hardware interrupts. (Personal DECstation 5000/xx) - */ -int -xine_intr(mask, pc, statusReg, causeReg) - unsigned mask; - unsigned pc; - unsigned statusReg; - unsigned causeReg; -{ - register u_int intr; - register volatile struct chiptime *c = Mach_clock_addr; - volatile u_int *imaskp = (volatile u_int *) - MACH_PHYS_TO_UNCACHED(XINE_REG_IMSK); - volatile u_int *intrp = (volatile u_int *) - MACH_PHYS_TO_UNCACHED(XINE_REG_INTR); - u_int old_mask; - struct clockframe cf; - int temp; - - old_mask = *imaskp & xine_tc3_imask; - *imaskp = xine_tc3_imask; - - if (mask & MACH_INT_MASK_4) - (*callv->_halt)((int *)0, 0); - - /* handle clock interrupts ASAP */ - if (mask & MACH_INT_MASK_1) { - temp = c->regc; /* XXX clear interrupt bits */ - cf.pc = pc; - cf.sr = statusReg; - hardclock(&cf); - causeReg &= ~MACH_INT_MASK_1; - /* reenable clock interrupts */ - splx(MACH_INT_MASK_1 | MACH_SR_INT_ENA_CUR); - } - if (mask & MACH_INT_MASK_3) { - intr = *intrp; - /* masked interrupts are still observable */ - intr &= old_mask; - - if ((intr & XINE_INTR_SCC_0)) { - if (tc_slot_info[XINE_SCC0_SLOT].intr) - (*(tc_slot_info[XINE_SCC0_SLOT].intr)) - (tc_slot_info[XINE_SCC0_SLOT].sc); - else - printf ("can't handle scc interrupt\n"); - } - - if (intr & XINE_INTR_SCSI_PTR_LOAD) { - *intrp &= ~XINE_INTR_SCSI_PTR_LOAD; -#ifdef notdef - asc_dma_intr(); -#endif - } - - if (intr & (XINE_INTR_SCSI_OVRUN | XINE_INTR_SCSI_READ_E)) - *intrp &= ~(XINE_INTR_SCSI_OVRUN | XINE_INTR_SCSI_READ_E); - - if (intr & XINE_INTR_LANCE_READ_E) - *intrp &= ~XINE_INTR_LANCE_READ_E; - - if (intr & XINE_INTR_DTOP_RX) { - if (tc_slot_info[XINE_DTOP_SLOT].intr) - (*(tc_slot_info[XINE_DTOP_SLOT].intr)) - (tc_slot_info[XINE_DTOP_SLOT].sc); - else - printf ("can't handle dtop interrupt\n"); - } - - if (intr & XINE_INTR_FLOPPY) { - if (tc_slot_info[XINE_FLOPPY_SLOT].intr) - (*(tc_slot_info[XINE_FLOPPY_SLOT].intr)) - (tc_slot_info[XINE_FLOPPY_SLOT].sc); - else - printf ("can't handle floppy interrupt\n"); - } - - if (intr & XINE_INTR_TC_0) { - if (tc_slot_info[0].intr) - (*(tc_slot_info[0].intr)) - (tc_slot_info[0].sc); - else - printf ("can't handle tc0 interrupt\n"); - } - - if (intr & XINE_INTR_TC_1) { - if (tc_slot_info[1].intr) - (*(tc_slot_info[1].intr)) - (tc_slot_info[1].sc); - else - printf ("can't handle tc1 interrupt\n"); - } - - if (intr & XINE_INTR_ISDN) { - if (tc_slot_info[XINE_ISDN_SLOT].intr) - (*(tc_slot_info[XINE_ISDN_SLOT].intr)) - (tc_slot_info[XINE_ISDN_SLOT].sc); - else - printf ("can't handle isdn interrupt\n"); - } - - if (intr & XINE_INTR_SCSI) { - if (tc_slot_info[XINE_SCSI_SLOT].intr) - (*(tc_slot_info[XINE_SCSI_SLOT].intr)) - (tc_slot_info[XINE_SCSI_SLOT].sc); - else - printf ("can't handle scsi interrupt\n"); - } - - if (intr & XINE_INTR_LANCE) { - if (tc_slot_info[XINE_LANCE_SLOT].intr) - (*(tc_slot_info[XINE_LANCE_SLOT].intr)) - (tc_slot_info[XINE_LANCE_SLOT].sc); - else - printf ("can't handle lance interrupt\n"); - - } - } - if (mask & MACH_INT_MASK_2) - kn02ba_errintr(); - return ((statusReg & ~causeReg & MACH_HARD_INT_MASK) | - MACH_SR_INT_ENA_CUR); -} - -#ifdef DS5000_240 -/* - * 3Max+ hardware interrupts. (DECstation 5000/240) UNTESTED!! - */ -int -kn03_intr(mask, pc, statusReg, causeReg) - unsigned mask; - unsigned pc; - unsigned statusReg; - unsigned causeReg; -{ - register u_int intr; - register volatile struct chiptime *c = Mach_clock_addr; - volatile u_int *imaskp = (volatile u_int *) - MACH_PHYS_TO_UNCACHED(KN03_REG_IMSK); - volatile u_int *intrp = (volatile u_int *) - MACH_PHYS_TO_UNCACHED(KN03_REG_INTR); - u_int old_mask; - struct clockframe cf; - int temp; - static int user_warned = 0; - - old_mask = *imaskp & kn03_tc3_imask; - *imaskp = kn03_tc3_imask; - - if (mask & MACH_INT_MASK_4) - (*callv->_halt)((int *)0, 0); - - /* handle clock interrupts ASAP */ - if (mask & MACH_INT_MASK_1) { - temp = c->regc; /* XXX clear interrupt bits */ - cf.pc = pc; - cf.sr = statusReg; - intrcnt[6]++; - hardclock(&cf); - latched_cycle_cnt = *(u_long*)(ASIC_REG_CTR(asic_base)); - causeReg &= ~MACH_INT_MASK_1; - /* reenable clock interrupts */ - splx(MACH_INT_MASK_1 | MACH_SR_INT_ENA_CUR); - } - - if (mask & MACH_INT_MASK_0) { - intr = *intrp; - /* masked interrupts are still observable */ - intr &= old_mask; - - if (intr & KN03_INTR_SCSI_PTR_LOAD) { - *intrp &= ~KN03_INTR_SCSI_PTR_LOAD; -#ifdef notdef - asc_dma_intr(); -#endif - } - - if (intr & (KN03_INTR_SCSI_OVRUN | KN03_INTR_SCSI_READ_E)) - *intrp &= ~(KN03_INTR_SCSI_OVRUN | KN03_INTR_SCSI_READ_E); - - if (intr & KN03_INTR_LANCE_READ_E) - *intrp &= ~KN03_INTR_LANCE_READ_E; - - if ((intr & KN03_INTR_SCC_0) && - tc_slot_info[KN03_SCC0_SLOT].intr) { - (*(tc_slot_info[KN03_SCC0_SLOT].intr)) - (tc_slot_info[KN03_SCC0_SLOT].sc); - intrcnt[2]++; - } - - if ((intr & KN03_INTR_SCC_1) && - tc_slot_info[KN03_SCC1_SLOT].intr) { - (*(tc_slot_info[KN03_SCC1_SLOT].intr)) - (tc_slot_info[KN03_SCC1_SLOT].sc); - intrcnt[2]++; - } - - if ((intr & KN03_INTR_TC_0) && - tc_slot_info[0].intr) { - (*(tc_slot_info[0].intr)) - (tc_slot_info[0].sc); - intrcnt[8]++; - } -#ifdef DIAGNOSTIC - else if (intr & KN03_INTR_TC_0) - printf ("can't handle tc0 interrupt\n"); -#endif /*DIAGNOSTIC*/ - - if ((intr & KN03_INTR_TC_1) && - tc_slot_info[1].intr) { - (*(tc_slot_info[1].intr)) - (tc_slot_info[1].sc); - intrcnt[9]++; - } -#ifdef DIAGNOSTIC - else if (intr & KN03_INTR_TC_1) - printf ("can't handle tc1 interrupt\n"); -#endif /*DIAGNOSTIC*/ - - if ((intr & KN03_INTR_TC_2) && - tc_slot_info[2].intr) { - (*(tc_slot_info[2].intr)) - (tc_slot_info[2].sc); - intrcnt[10]++; - } -#ifdef DIAGNOSTIC - else if (intr & KN03_INTR_TC_2) - printf ("can't handle tc2 interrupt\n"); -#endif /*DIAGNOSTIC*/ - - if ((intr & KN03_INTR_SCSI) && - tc_slot_info[KN03_SCSI_SLOT].intr) { - (*(tc_slot_info[KN03_SCSI_SLOT].intr)) - (tc_slot_info[KN03_SCSI_SLOT].sc); - intrcnt[4]++; - } - - if ((intr & KN03_INTR_LANCE) && - tc_slot_info[KN03_LANCE_SLOT].intr) { - (*(tc_slot_info[KN03_LANCE_SLOT].intr)) - (tc_slot_info[KN03_LANCE_SLOT].sc); - intrcnt[3]++; - } - - if (user_warned && ((intr & KN03_INTR_PSWARN) == 0)) { - printf("%s\n", "Power supply ok now."); - user_warned = 0; - } - if ((intr & KN03_INTR_PSWARN) && (user_warned < 3)) { - user_warned++; - printf("%s\n", "Power supply overheating"); - } - } - if (mask & MACH_INT_MASK_3) - kn03_errintr(); - return ((statusReg & ~causeReg & MACH_HARD_INT_MASK) | - MACH_SR_INT_ENA_CUR); -} -#endif /* DS5000_240 */ /* * This is called from MachUserIntr() if astpending is set. @@ -1447,10 +1115,10 @@ trapDump(msg) if (trp->cause == 0) break; printf("%s: ADR %x PC %x CR %x SR %x\n", - trap_type[(trp->cause & MACH_CR_EXC_CODE) >> + trap_type[(trp->cause & MIPS_3K_CR_EXC_CODE) >> MACH_CR_EXC_CODE_SHIFT], trp->vadr, trp->pc, trp->cause, trp->status); - printf(" RA %x code %d\n", trp-> ra, trp->code); + printf(" RA %x SP %x code %d\n", trp->ra, trp->sp, trp->code); } bzero(trapdebug, sizeof(trapdebug)); trp = trapdebug; @@ -1458,135 +1126,6 @@ trapDump(msg) } #endif -/* - *---------------------------------------------------------------------- - * - * MemErrorInterrupts -- - * pmax_errintr - for the DS2100/DS3100 - * kn02_errintr - for the DS5000/200 - * kn02ba_errintr - for the DS5000/1xx and DS5000/xx - * - * Handler an interrupt for the control register. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------- - */ -static void -pmax_errintr() -{ - volatile u_short *sysCSRPtr = - (u_short *)MACH_PHYS_TO_UNCACHED(KN01_SYS_CSR); - u_short csr; - - csr = *sysCSRPtr; - - if (csr & KN01_CSR_MERR) { - printf("Memory error at 0x%x\n", - *(unsigned *)MACH_PHYS_TO_UNCACHED(KN01_SYS_ERRADR)); - panic("Mem error interrupt"); - } - *sysCSRPtr = (csr & ~KN01_CSR_MBZ) | 0xff; -} - -static void -kn02_errintr() -{ - u_int erradr, chksyn, physadr; - int i; - - erradr = *(u_int *)MACH_PHYS_TO_UNCACHED(KN02_SYS_ERRADR); - chksyn = *(u_int *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CHKSYN); - *(u_int *)MACH_PHYS_TO_UNCACHED(KN02_SYS_ERRADR) = 0; - MachEmptyWriteBuffer(); - - if (!(erradr & KN02_ERR_VALID)) - return; - /* extract the physical word address and compensate for pipelining */ - physadr = erradr & KN02_ERR_ADDRESS; - if (!(erradr & KN02_ERR_WRITE)) - physadr = (physadr & ~0xfff) | ((physadr & 0xfff) - 5); - physadr <<= 2; - printf("%s memory %s %s error at 0x%x\n", - (erradr & KN02_ERR_CPU) ? "CPU" : "DMA", - (erradr & KN02_ERR_WRITE) ? "write" : "read", - (erradr & KN02_ERR_ECCERR) ? "ECC" : "timeout", - physadr); - if (erradr & KN02_ERR_ECCERR) { - *(u_int *)MACH_PHYS_TO_UNCACHED(KN02_SYS_CHKSYN) = 0; - MachEmptyWriteBuffer(); - printf("ECC 0x%x\n", chksyn); - - /* check for a corrected, single bit, read error */ - if (!(erradr & KN02_ERR_WRITE)) { - if (physadr & 0x4) { - /* check high word */ - if (chksyn & KN02_ECC_SNGHI) - return; - } else { - /* check low word */ - if (chksyn & KN02_ECC_SNGLO) - return; - } - } - } - panic("Mem error interrupt"); -} - -#ifdef DS5000_240 -static void -kn03_errintr() -{ - - printf("erradr %x\n", *(unsigned *)MACH_PHYS_TO_UNCACHED(KN03_SYS_ERRADR)); - *(unsigned *)MACH_PHYS_TO_UNCACHED(KN03_SYS_ERRADR) = 0; - MachEmptyWriteBuffer(); -} -#endif /* DS5000_240 */ - -static void -kn02ba_errintr() -{ - register int mer, adr, siz; - static int errintr_cnt = 0; - - siz = *(volatile int *)MACH_PHYS_TO_UNCACHED(KMIN_REG_MSR); - mer = *(volatile int *)MACH_PHYS_TO_UNCACHED(KMIN_REG_MER); - adr = *(volatile int *)MACH_PHYS_TO_UNCACHED(KMIN_REG_AER); - - /* clear interrupt bit */ - *(unsigned int *)MACH_PHYS_TO_UNCACHED(KMIN_REG_TIMEOUT) = 0; - - errintr_cnt++; - printf("(%d)%s%x [%x %x %x]\n", errintr_cnt, - "Bad memory chip at phys ", - kn02ba_recover_erradr(adr, mer), - mer, siz, adr); -} - -static unsigned -kn02ba_recover_erradr(phys, mer) - register unsigned phys, mer; -{ - /* phys holds bits 28:2, mer knows which byte */ - switch (mer & KMIN_MER_LASTBYTE) { - case KMIN_LASTB31: - mer = 3; break; - case KMIN_LASTB23: - mer = 2; break; - case KMIN_LASTB15: - mer = 1; break; - case KMIN_LASTB07: - mer = 0; break; - } - return ((phys & KMIN_AER_ADDR_MASK) | mer); -} - - /* * forward declaration */ @@ -1595,7 +1134,7 @@ static unsigned GetBranchDest __P((InstFmt *InstPtr)); /* * Return the resulting PC as if the branch was executed. */ -u_int +unsigned MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch) unsigned *regsPtr; unsigned instPC; @@ -1606,9 +1145,13 @@ MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch) unsigned retAddr; int condition; +#ifdef notyet /* Compute desination of r4000 squashed branches */ +#define GetBranchDest(InstPtr, inst) \ + ((unsigned)InstPtr + 4 + ((short)inst.IType.imm << 2)) + inst.word = (instPC < MACH_CACHED_MEMORY_ADDR) ? fuiword((caddr_t)instPC) : *(unsigned*)instPC; - +#endif #if 0 printf("regsPtr=%x PC=%x Inst=%x fpcCsr=%x\n", regsPtr, instPC, inst.word, fpcCSR); /* XXX */ @@ -1633,14 +1176,20 @@ MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch) switch ((int)inst.IType.rt) { case OP_BLTZ: case OP_BLTZAL: + case OP_BLTZL: /* squashed */ + case OP_BLTZALL: /* squashed */ + if ((int)(regsPtr[inst.RType.rs]) < 0) retAddr = GetBranchDest((InstFmt *)instPC); else retAddr = instPC + 8; break; - case OP_BGEZAL: case OP_BGEZ: + case OP_BGEZAL: + case OP_BGEZL: /* squashed */ + case OP_BGEZALL: /* squashed */ + if ((int)(regsPtr[inst.RType.rs]) >= 0) retAddr = GetBranchDest((InstFmt *)instPC); else @@ -1659,6 +1208,8 @@ MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch) break; case OP_BEQ: + case OP_BEQL: /* squashed */ + if (regsPtr[inst.RType.rs] == regsPtr[inst.RType.rt]) retAddr = GetBranchDest((InstFmt *)instPC); else @@ -1666,6 +1217,8 @@ MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch) break; case OP_BNE: + case OP_BNEL: /* squashed */ + if (regsPtr[inst.RType.rs] != regsPtr[inst.RType.rt]) retAddr = GetBranchDest((InstFmt *)instPC); else @@ -1673,6 +1226,8 @@ MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch) break; case OP_BLEZ: + case OP_BLEZL: /* squashed */ + if ((int)(regsPtr[inst.RType.rs]) <= 0) retAddr = GetBranchDest((InstFmt *)instPC); else @@ -1680,6 +1235,8 @@ MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch) break; case OP_BGTZ: + case OP_BGTZL: /* squashed */ + if ((int)(regsPtr[inst.RType.rs]) > 0) retAddr = GetBranchDest((InstFmt *)instPC); else @@ -1725,8 +1282,6 @@ GetBranchDest(InstPtr) return ((unsigned)InstPtr + 4 + ((short)InstPtr->IType.imm << 2)); } -#ifdef DEBUG - /* * This routine is called by procxmt() to single step one instruction. * We do this by storing a break instruction after the current instruction, @@ -1740,6 +1295,7 @@ cpu_singlestep(p) register int *locr0 = p->p_md.md_regs; int i; +#if notanymore /* compute next address after current location */ va = MachEmulateBranch(locr0, locr0[PC], locr0[FSR], 1); if (p->p_md.md_ss_addr || p->p_md.md_ss_addr == va || @@ -1765,6 +1321,69 @@ cpu_singlestep(p) sa, ea, VM_PROT_READ|VM_PROT_EXECUTE, FALSE); } } +#endif + int bpinstr = MACH_BREAK_SSTEP; + int curinstr; + struct uio uio; + struct iovec iov; + + /* + * Fetch what's at the current location. + */ + iov.iov_base = (caddr_t)&curinstr; + iov.iov_len = sizeof(int); + uio.uio_iov = &iov; + uio.uio_iovcnt = 1; + uio.uio_offset = (off_t)locr0[PC]; + uio.uio_resid = sizeof(int); + uio.uio_segflg = UIO_SYSSPACE; + uio.uio_rw = UIO_READ; + uio.uio_procp = curproc; + procfs_domem(curproc, p, NULL, &uio); + + /* compute next address after current location */ + if(curinstr != 0) { + va = MachEmulateBranch(locr0, locr0[PC], locr0[FSR], curinstr); + } + else { + va = locr0[PC] + 4; + } + if (p->p_md.md_ss_addr) { + printf("SS %s (%d): breakpoint already set at %x (va %x)\n", + p->p_comm, p->p_pid, p->p_md.md_ss_addr, va); /* XXX */ + return (EFAULT); + } + p->p_md.md_ss_addr = va; + + /* + * Fetch what's at the current location. + */ + iov.iov_base = (caddr_t)&p->p_md.md_ss_instr; + iov.iov_len = sizeof(int); + uio.uio_iov = &iov; + uio.uio_iovcnt = 1; + uio.uio_offset = (off_t)va; + uio.uio_resid = sizeof(int); + uio.uio_segflg = UIO_SYSSPACE; + uio.uio_rw = UIO_READ; + uio.uio_procp = curproc; + procfs_domem(curproc, p, NULL, &uio); + + /* + * Store breakpoint instruction at the "next" location now. + */ + iov.iov_base = (caddr_t)&bpinstr; + iov.iov_len = sizeof(int); + uio.uio_iov = &iov; + uio.uio_iovcnt = 1; + uio.uio_offset = (off_t)va; + uio.uio_resid = sizeof(int); + uio.uio_segflg = UIO_SYSSPACE; + uio.uio_rw = UIO_WRITE; + uio.uio_procp = curproc; + i = procfs_domem(curproc, p, NULL, &uio); + MachFlushCache(); /* XXX memory barrier followed by flush icache? */ + if (i < 0) return (EFAULT); #if 0 @@ -1775,6 +1394,7 @@ cpu_singlestep(p) return (0); } +#ifdef DEBUG int kdbpeek(addr) { @@ -1853,11 +1473,21 @@ specialframe: goto done; } +/* + * check for PC between two entry points + */ +# define Between(x, y, z) \ + ( ((x) <= (y)) && ((y) < (z)) ) +# define pcBetween(a,b) \ + Between((unsigned)a, pc, (unsigned)b) + + /* Backtraces should contine through interrupts from kernel mode */ - if (pc >= (unsigned)MachKernIntr && pc < (unsigned)MachUserIntr) { +#ifdef CPU_R3000 + if (pcBetween(mips_r2000_KernIntr, mips_r2000_UserIntr)) { /* NOTE: the offsets depend on the code in locore.s */ - (*printfn)("MachKernIntr+%x: (%x, %x ,%x) -------\n", - pc-(unsigned)MachKernIntr, a0, a1, a2); + (*printfn)("r3000 KernIntr+%x: (%x, %x ,%x) -------\n", + pc-(unsigned)mips_r2000_KernIntr, a0, a1, a2); a0 = kdbpeek(sp + 36); a1 = kdbpeek(sp + 40); a2 = kdbpeek(sp + 44); @@ -1868,26 +1498,63 @@ specialframe: sp = sp + 108; goto specialframe; } +#endif /* CPU_R3000 */ + +#ifdef CPU_R4000 + if (pcBetween(mips_r4000_KernIntr, mips_r4000_UserIntr) { + /* NOTE: the offsets depend on the code in locore.s */ + (*printfn)("R4000 KernIntr+%x: (%x, %x ,%x) -------\n", + pc-(unsigned)mips_r4000_KernIntr, a0, a1, a2); + a0 = kdbpeek(sp + 36); + a1 = kdbpeek(sp + 40); + a2 = kdbpeek(sp + 44); + a3 = kdbpeek(sp + 48); + + pc = kdbpeek(sp + 20); /* exc_pc - pc at time of exception */ + ra = kdbpeek(sp + 92); /* ra at time of exception */ + sp = sp + 108; + goto specialframe; + } +#endif /* cpu_r4000 */ -# define Between(x, y, z) \ - ( ((x) <= (y)) && ((y) < (z)) ) -# define pcBetween(a,b) \ - Between((unsigned)a, pc, (unsigned)b) /* * Check for current PC in exception handler code that don't * have a preceding "j ra" at the tail of the preceding function. * Depends on relative ordering of functions in locore. */ - if (pcBetween(MachKernGenException, MachUserGenException)) - subr = (unsigned) MachKernGenException; - else if (pcBetween(MachUserGenException,MachKernIntr)) - subr = (unsigned) MachUserGenException; - else if (pcBetween(MachKernIntr, MachUserIntr)) - subr = (unsigned) MachKernIntr; - else if (pcBetween(MachUserIntr, MachTLBMissException)) - subr = (unsigned) MachUserIntr; + + /* XXX fixup tests after cutting and pasting in locore.S */ + /* R4000 exception handlers */ + + if (pcBetween(mips_r2000_KernGenException, mips_r2000_UserGenException)) + subr = (unsigned) mips_r2000_KernGenException; + else if (pcBetween(mips_r2000_UserGenException,mips_r2000_KernIntr)) + subr = (unsigned) mips_r2000_UserGenException; + else if (pcBetween(mips_r2000_KernIntr, mips_r2000_UserIntr)) + subr = (unsigned) mips_r2000_KernIntr; + else if (pcBetween(mips_r2000_UserIntr, mips_r2000_TLBMissException)) + subr = (unsigned) mips_r2000_UserIntr; + + else if (pcBetween(mips_r2000_UserIntr, mips_r2000_TLBMissException)) + subr = (unsigned) mips_r2000_UserIntr; + + /* R4000 exception handlers */ +#ifdef CPU_R4000 + else if (pcBetween(mips_r4000_KernGenException, mips_r4000_UserGenException)) + subr = (unsigned) mips_r4000_KernGenException; + else if (pcBetween(mips_r4000_UserGenException,mips_r4000_KernIntr)) + subr = (unsigned) mips_r4000_UserGenException; + else if (pcBetween(mips_r4000_KernIntr, mips_r4000_UserIntr)) + subr = (unsigned) mips_r4000_KernIntr; + + + else if (pcBetween(mips_r4000_UserIntr, mips_r4000_TLBMissException)) + subr = (unsigned) mips_r4000_UserIntr; +#endif /* CPU_R4000 */ + + else if (pcBetween(splx, MachEmptyWriteBuffer)) subr = (unsigned) splx; else if (pcBetween(cpu_switch, fuword)) @@ -1904,7 +1571,12 @@ specialframe: /* check for bad PC */ if (pc & 3 || pc < 0x80000000 || pc >= (unsigned)edata) { - (*printfn)("PC 0x%x: not in kernel\n", pc); + (*printfn)("PC 0x%x: not in kernel space\n", pc); + ra = 0; + goto done; + } + if (!pcBetween(start, (unsigned) edata)) { + (*printfn)("PC 0x%x: not in kernel text\n", pc); ra = 0; goto done; } @@ -1928,7 +1600,9 @@ specialframe: * Jump here for locore entry pointsn for which the preceding * function doesn't end in "j ra" */ +#if 0 stackscan: +#endif /* scan forwards to find stack size and any saved registers */ stksize = 0; more = 3; @@ -2054,10 +1728,23 @@ static struct { void *addr; char *name;} names[] = { Name(main), Name(interrupt), Name(trap), - Name(MachKernGenException), - Name(MachUserGenException), - Name(MachKernIntr), - Name(MachUserIntr), +#ifdef pmax + Name(am7990_meminit), +#endif +#ifdef CPU_R3000 + Name(mips_r2000_KernGenException), + Name(mips_r2000_UserGenException), + Name(mips_r2000_KernIntr), + Name(mips_r2000_UserIntr), +#endif /* CPU_R3000 */ + +#ifdef CPU_R4000 + Name(mips_r4000_KernGenException), + Name(mips_r4000_UserGenException), + Name(mips_r4000_KernIntr), + Name(mips_r4000_UserIntr), +#endif /* CPU_R4000 */ + Name(splx), Name(idle), Name(cpu_switch), diff --git a/sys/arch/pmax/pmax/turbochannel.h b/sys/arch/pmax/pmax/turbochannel.h index bff979064a1..0f95982607c 100644 --- a/sys/arch/pmax/pmax/turbochannel.h +++ b/sys/arch/pmax/pmax/turbochannel.h @@ -1,4 +1,4 @@ -/* $NetBSD: turbochannel.h,v 1.7 1995/09/12 07:32:31 jonathan Exp $ */ +/* $NetBSD: turbochannel.h,v 1.8 1996/05/19 01:44:45 jonathan Exp $ */ /*- @@ -108,9 +108,10 @@ typedef struct { tc_padded_char_t slot_size; /* legal: 1-128, unit: 4Mb */ unsigned char test_data[TC_ROM_TEST_DATA_SIZE]; /* must always contain: - /* x55 x00 xaa xff - /* (each byte is repeated - /* rom_stride times) */ + * x55 x00 xaa xff + * (each byte is repeated + * rom_stride times) + */ tc_padded_char_t firmware_rev[TC_ROM_LLEN]; tc_padded_char_t vendor_name[TC_ROM_LLEN]; tc_padded_char_t module_name[TC_ROM_LLEN]; diff --git a/sys/arch/pmax/pmax/vm_machdep.c b/sys/arch/pmax/pmax/vm_machdep.c index 56b0b7a5383..face91cc537 100644 --- a/sys/arch/pmax/pmax/vm_machdep.c +++ b/sys/arch/pmax/pmax/vm_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: vm_machdep.c,v 1.7 1995/09/25 20:36:23 jonathan Exp $ */ +/* $NetBSD: vm_machdep.c,v 1.11 1996/05/19 15:55:31 jonathan Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -58,8 +58,15 @@ #include #include +#include #include +#include + +extern int copykstack __P((struct user *up)); +extern void MachSaveCurFPState __P((struct proc *p)); +extern int switch_exit __P((void)); /* XXX never returns? */ + /* * Finish a fork operation, with process p2 nearly set up. * Copy and update the kernel stack and pcb, making the child @@ -69,6 +76,7 @@ * address in each process; in the future we will probably relocate * the frame pointers on the stack after copying. */ +int cpu_fork(p1, p2) register struct proc *p1, *p2; { @@ -185,7 +193,7 @@ cpu_coredump(p, vp, cred, chdr) struct core *chdr; { int error; - register struct user *up = p->p_addr; + /*register struct user *up = p->p_addr;*/ struct coreseg cseg; extern struct proc *machFPCurProcPtr; @@ -229,9 +237,10 @@ cpu_coredump(p, vp, cred, chdr) * Both addresses are assumed to reside in the Sysmap, * and size must be a multiple of CLSIZE. */ +void pagemove(from, to, size) register caddr_t from, to; - int size; + size_t size; { register pt_entry_t *fpte, *tpte; @@ -240,8 +249,9 @@ pagemove(from, to, size) fpte = kvtopte(from); tpte = kvtopte(to); while (size > 0) { - MachTLBFlushAddr(from); - MachTLBUpdate(to, *fpte); + MachTLBFlushAddr((vm_offset_t)from); + MachTLBUpdate( (u_int)to, + (u_int) (*fpte).pt_entry); /* XXX casts? */ *tpte++ = *fpte; fpte->pt_entry = 0; fpte++; @@ -270,34 +280,32 @@ extern vm_map_t phys_map; * * All requests are (re)mapped into kernel VA space via the phys_map */ -vmapbuf(bp) +/*ARGSUSED*/ +void +vmapbuf(bp, len) register struct buf *bp; + vm_size_t len; { - register caddr_t addr; - register vm_size_t sz; + register vm_offset_t faddr, taddr, off, pa; struct proc *p; - int off; - vm_offset_t kva; - register vm_offset_t pa; if ((bp->b_flags & B_PHYS) == 0) panic("vmapbuf"); - addr = bp->b_saveaddr = bp->b_un.b_addr; - off = (int)addr & PGOFSET; p = bp->b_proc; - sz = round_page(bp->b_bcount + off); - kva = kmem_alloc_wait(phys_map, sz); - bp->b_un.b_addr = (caddr_t) (kva + off); - sz = atop(sz); - while (sz--) { - pa = pmap_extract(vm_map_pmap(&p->p_vmspace->vm_map), - (vm_offset_t)addr); + faddr = trunc_page(bp->b_saveaddr = bp->b_data); + off = (vm_offset_t)bp->b_data - faddr; + len = round_page(off + len); + taddr = kmem_alloc_wait(phys_map, len); + bp->b_data = (caddr_t) (taddr + off); + len = atop(len); + while (len--) { + pa = pmap_extract(vm_map_pmap(&p->p_vmspace->vm_map), faddr); if (pa == 0) panic("vmapbuf: null page frame"); - pmap_enter(vm_map_pmap(phys_map), kva, trunc_page(pa), + pmap_enter(vm_map_pmap(phys_map), taddr, trunc_page(pa), VM_PROT_READ|VM_PROT_WRITE, TRUE); - addr += PAGE_SIZE; - kva += PAGE_SIZE; + faddr += PAGE_SIZE; + taddr += PAGE_SIZE; } } @@ -305,19 +313,21 @@ vmapbuf(bp) * Free the io map PTEs associated with this IO operation. * We also invalidate the TLB entries and restore the original b_addr. */ -vunmapbuf(bp) +/*ARGSUSED*/ +void +vunmapbuf(bp, len) register struct buf *bp; + vm_size_t len; { - register caddr_t addr = bp->b_un.b_addr; - register vm_size_t sz; - vm_offset_t kva; + register vm_offset_t addr, off; if ((bp->b_flags & B_PHYS) == 0) panic("vunmapbuf"); - sz = round_page(bp->b_bcount + ((int)addr & PGOFSET)); - kva = (vm_offset_t)((int)addr & ~PGOFSET); - kmem_free_wakeup(phys_map, kva, sz); - bp->b_un.b_addr = bp->b_saveaddr; + addr = trunc_page(bp->b_data); + off = (vm_offset_t)bp->b_data - addr; + len = round_page(off + len); + kmem_free_wakeup(phys_map, addr, len); + bp->b_data = bp->b_saveaddr; bp->b_saveaddr = NULL; } @@ -365,18 +375,17 @@ kvtophys(vm_offset_t kva) printf("oops: Sysmap overrun, max %d index %d\n", Sysmapsize, pte - Sysmap); } -kernelmapped: if ((pte->pt_entry & PG_V) == 0) { - printf("kvtophys: pte not valid for %x\n", kva); + printf("kvtophys: pte not valid for %lx\n", kva); } phys = (pte->pt_entry & PG_FRAME) | (kva & PGOFSET); #ifdef DEBUG_VIRTUAL_TO_PHYSICAL - printf("kvtophys: kv %x, phys %x", kva, phys); + printf("kvtophys: kv %p, phys %x", kva, phys); #endif } else { - printf("Virtual address %x: cannot map to physical\n", + printf("Virtual address %lx: cannot map to physical\n", kva); phys = 0; /*panic("non-kernel address to kvtophys\n");*/ diff --git a/sys/arch/pmax/stand/Makefile b/sys/arch/pmax/stand/Makefile index 8870fa3f7e1..19e6b1e8709 100644 --- a/sys/arch/pmax/stand/Makefile +++ b/sys/arch/pmax/stand/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.6 1996/01/15 01:44:52 thorpej Exp $ +# $NetBSD: Makefile,v 1.7 1996/02/01 22:32:19 mycroft Exp $ # @(#)Makefile 8.3 (Berkeley) 2/16/94 DESTDIR= @@ -12,7 +12,7 @@ S= ${.CURDIR}/../../.. DEFS= -DSTANDALONE -DSMALL CFLAGS= -O2 ${INCPATH} ${DEFS} -AFLAGS= -O2 ${INCPATH} ${DEFS} -DLOCORE +AFLAGS= -O2 ${INCPATH} ${DEFS} -D_LOCORE .PATH: ${S}/arch/${MACHINE_ARCH}/${MACHINE_ARCH} .PATH: ${S}/stand ${S}/lib/libsa @@ -72,7 +72,7 @@ boot: start.o boot.o bootconf.o filesystem.o ${LIBS} start.o: ${.CURDIR}/start.S -# ${CPP} -E ${CFLAGS:M-[ID]*} -DLOCORE ${AINC} ${.IMPSRC} | \ +# ${CPP} -E ${CFLAGS:M-[ID]*} -D_LOCORE ${AINC} ${.IMPSRC} | \ # ${AS} -o ${.TARGET} mkboot: ${.CURDIR}/mkboot.c diff --git a/sys/arch/pmax/stand/dec_prom.h b/sys/arch/pmax/stand/dec_prom.h index afe45e7cf17..f46e99ebb9b 100644 --- a/sys/arch/pmax/stand/dec_prom.h +++ b/sys/arch/pmax/stand/dec_prom.h @@ -1,4 +1,4 @@ -/* $NetBSD: dec_prom.h,v 1.6 1995/03/28 18:19:41 jtc Exp $ */ +/* $NetBSD: dec_prom.h,v 1.8 1996/04/08 00:52:10 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -62,7 +62,7 @@ * by Digital Equipment Corporation. */ -#ifndef LOCORE +#ifndef _LOCORE #include #include @@ -85,7 +85,7 @@ typedef struct { int revision; /* hardware revision level */ int clk_period; /* clock period in nano seconds */ int slot_size; /* slot size in magabytes */ - int io_timeout; /* I/O timeout in cycles + int io_timeout; /* I/O timeout in cycles */ int dma_range; /* DMA address range in megabytes */ int max_dma_burst; /* maximum DMA burst length */ int parity; /* true if system module supports T.C. parity */ @@ -200,7 +200,7 @@ typedef struct { int num; /* Number of strings used. */ } MachStringTable; -#endif /* LOCORE */ +#endif /* _LOCORE */ /* * The prom has a jump table at the beginning of it to get to its diff --git a/sys/arch/pmax/stand/filesystem.c b/sys/arch/pmax/stand/filesystem.c index 5277d83c9e8..c8462717812 100644 --- a/sys/arch/pmax/stand/filesystem.c +++ b/sys/arch/pmax/stand/filesystem.c @@ -30,7 +30,7 @@ * * filesystem.c * - * $Id: filesystem.c,v 1.1 1995/12/14 05:26:27 deraadt Exp $ + * $Id: filesystem.c,v 1.2 1996/09/15 21:13:22 deraadt Exp $ */ #include diff --git a/sys/arch/pmax/tc/asic.c b/sys/arch/pmax/tc/asic.c index 6e453741ec5..35322ff97ab 100644 --- a/sys/arch/pmax/tc/asic.c +++ b/sys/arch/pmax/tc/asic.c @@ -1,4 +1,4 @@ -/* $NetBSD: asic.c,v 1.6 1995/09/25 20:33:28 jonathan Exp $ */ +/* $NetBSD: asic.c,v 1.9.4.2 1996/09/09 20:19:11 thorpej Exp $ */ /* * Copyright (c) 1994, 1995 Carnegie-Mellon University. @@ -31,6 +31,8 @@ #include #include #include +#include +#include #include #include @@ -61,22 +63,31 @@ extern int cputype; struct asic_softc { struct device sc_dv; - struct abus sc_bus; - caddr_t sc_base; + tc_addr_t sc_base; }; /* Definition of the driver for autoconfig. */ int asicmatch __P((struct device *, void *, void *)); void asicattach __P((struct device *, struct device *, void *)); int asicprint(void *, char *); -struct cfdriver ioasiccd = - { NULL, "asic", asicmatch, asicattach, DV_DULL, sizeof(struct asic_softc) }; + +/* Device locators. */ +#define ioasiccf_offset cf_loc[0] /* offset */ + +#define IOASIC_OFFSET_UNKNOWN -1 + +struct cfattach ioasic_ca = { + sizeof(struct asic_softc), asicmatch, asicattach +}; + +struct cfdriver ioasic_cd = { + NULL, "asic", DV_DULL +}; void asic_intr_establish __P((struct confargs *, intr_handler_t, intr_arg_t)); void asic_intr_disestablish __P((struct confargs *)); -caddr_t asic_cvtaddr __P((struct confargs *)); -int asic_matchname __P((struct confargs *, char *)); +caddr_t ioasic_cvtaddr __P((struct confargs *)); #ifndef pmax int asic_intr __P((void *)); @@ -92,30 +103,18 @@ struct asic_slot { }; #ifdef pmax -struct asic_slot *asic_slots; +/*#define IOASIC_DEBUG*/ +struct asic_slot *asic_slots; #include "ds-asic-conf.c" +#endif /*pmax*/ -#endif - -#ifdef alpha -struct asic_slot asic_slots[ASIC_MAX_NSLOTS] = -{ - { { "lance", /* XXX */ 0, 0x000c0000, }, - ASIC_INTR_LANCE, asic_intrnull, (void *)(long)ASIC_SLOT_LANCE, }, - { { "scc", /* XXX */ 1, 0x00100000, }, - ASIC_INTR_SCC_0, asic_intrnull, (void *)(long)ASIC_SLOT_SCC0, }, - { { "scc", /* XXX */ 2, 0x00180000, }, - ASIC_INTR_SCC_1, asic_intrnull, (void *)(long)ASIC_SLOT_SCC1, }, - { { "dallas_rtc", /* XXX */ 3, 0x00200000, }, - 0, asic_intrnull, (void *)(long)ASIC_SLOT_RTC, }, - { { "AMD79c30", /* XXX */ 4, 0x00240000, }, - 0 /* XXX */, asic_intrnull, (void *)(long)ASIC_SLOT_ISDN, }, -}; -#endif /*alpha*/ - -caddr_t asic_base; /* XXX XXX XXX */ +#ifdef IOASIC_DEBUG +#define IOASIC_DPRINTF(x) printf x +#else +#define IOASIC_DPRINTF(x) (void) x +#endif int asicmatch(parent, cfdata, aux) @@ -124,20 +123,25 @@ asicmatch(parent, cfdata, aux) void *aux; { struct cfdata *cf = cfdata; - struct confargs *ca = aux; + struct tc_attach_args *ta = aux; - /* It can only occur on the turbochannel, anyway. */ - if (ca->ca_bus->ab_type != BUS_TC) + IOASIC_DPRINTF(("asicmatch: %s slot %d offset 0x%x pri %d\n", + ta->ta_modname, ta->ta_slot, ta->ta_offset, (int)ta->ta_cookie)); + + /* An IOCTL asic can only occur on the turbochannel, anyway. */ +#ifdef notyet + if (parent != &tccd) return (0); +#endif /* The 3MAX (kn02) is special. */ - if (BUS_MATCHNAME(ca, KN02_ASIC_NAME)) { + if (TC_BUS_MATCHNAME(ta, KN02_ASIC_NAME)) { printf("(configuring KN02 system slot as asic)\n"); goto gotasic; } /* Make sure that we're looking for this type of device. */ - if (!BUS_MATCHNAME(ca, "IOCTL ")) + if (!TC_BUS_MATCHNAME(ta, "IOCTL ")) return (0); gotasic: @@ -177,31 +181,28 @@ asicattach(parent, self, aux) void *aux; { struct asic_softc *sc = (struct asic_softc *)self; - struct confargs *ca = aux; + struct tc_attach_args *ta = aux; struct confargs *nca; + struct ioasicdev_attach_args ioasicdev; int i; extern int cputype; if (asic_slots == NULL) panic("asicattach: no asic_slot map\n"); - sc->sc_base = BUS_CVTADDR(ca); - asic_base = sc->sc_base; /* XXX XXX XXX */ + IOASIC_DPRINTF(("asicattach: %s\n", sc->sc_dv.dv_xname)); + + sc->sc_base = ta->ta_addr; - sc->sc_bus.ab_dv = (struct device *)sc; - sc->sc_bus.ab_type = BUS_ASIC; - sc->sc_bus.ab_intr_establish = asic_intr_establish; - sc->sc_bus.ab_intr_disestablish = asic_intr_disestablish; - sc->sc_bus.ab_cvtaddr = asic_cvtaddr; - sc->sc_bus.ab_matchname = asic_matchname; + ioasic_base = sc->sc_base; /* XXX XXX XXX */ #ifdef pmax printf("\n"); #else /* Alpha AXP: select ASIC speed */ #ifdef DEC_3000_300 if (cputype == ST_DEC_3000_300) { - *(volatile u_int *)ASIC_REG_CSR(sc->sc_base) |= - ASIC_CSR_FASTMODE; + *(volatile u_int *)IOASIC_REG_CSR(sc->sc_base) |= + IOASIC_CSR_FASTMODE; MB(); printf(": slow mode\n"); } else @@ -209,7 +210,7 @@ asicattach(parent, self, aux) printf(": fast mode\n"); /* Decstations use hand-craft code to enable asic interrupts */ - BUS_INTR_ESTABLISH(ca, asic_intr, sc); + BUS_INTR_ESTABLISH(ta, asic_intr, sc); #endif /* Alpha AXP: select ASIC speed */ @@ -220,25 +221,28 @@ asicattach(parent, self, aux) /* Try to configure each CPU-internal device */ for (i = 0; i < ASIC_MAX_NSLOTS; i++) { -#ifdef DEBUG_ASIC - printf("asicattach: entry %d\n", i); /*XXX*/ -#endif + IOASIC_DPRINTF(("asicattach: entry %d, base addr %x\n", + i, sc->sc_base)); nca = &asic_slots[i].as_ca; if (nca == NULL) panic ("bad asic table\n"); - if (nca->ca_name == NULL && nca->ca_bus == NULL) + if (nca->ca_name == NULL || nca->ca_name[0] == 0) break; - nca->ca_bus = &sc->sc_bus; + nca->ca_addr = ((u_int)sc->sc_base) + nca->ca_offset; -#ifdef DEBUG_ASIC - printf(" adding %s subslot %d offset %x\n", /*XXX*/ - nca->ca_name, nca->ca_slot, nca->ca_offset); -#endif + IOASIC_DPRINTF((" adding %s subslot %d offset %x addr %x\n", + nca->ca_name, nca->ca_slot, nca->ca_offset, + nca->ca_addr)); + strncpy(ioasicdev.iada_modname, nca->ca_name, TC_ROM_LLEN); + ioasicdev.iada_modname[TC_ROM_LLEN] = '\0'; + ioasicdev.iada_offset = nca->ca_offset; + ioasicdev.iada_addr = nca->ca_addr; + ioasicdev.iada_cookie = (void *)nca->ca_slotpri; /* Tell the autoconfig machinery we've found the hardware. */ - config_found(self, nca, asicprint); + config_found(self, &ioasicdev, asicprint); } - + IOASIC_DPRINTF(("asicattach: done\n")); } int @@ -246,18 +250,28 @@ asicprint(aux, pnp) void *aux; char *pnp; { - struct confargs *ca = aux; + struct ioasicdev_attach_args *d = aux; if (pnp) - printf("%s at %s", ca->ca_name, pnp); - printf(" offset 0x%lx", ca->ca_offset); - printf(" priority %d", ca->ca_slotpri); + printf("%s at %s", d->iada_modname, pnp); + printf(" offset 0x%x", d->iada_offset); + printf(" priority %d", (int)d->iada_cookie); return (UNCONF); } +int +ioasic_submatch(match, d) + struct cfdata *match; + struct ioasicdev_attach_args *d; +{ + + return ((match->ioasiccf_offset == d->iada_offset) || + (match->ioasiccf_offset == IOASIC_OFFSET_UNKNOWN)); +} + /* * Save interrupt slotname and enable mask (??) - * On decstaitons this isn't useful, as the turbochannel + * On decstations this isn't useful, as the turbochannel * decstations all have incompatible ways of mapping interrupts * to IO ASIC or r3000 interrupt bits. * Instead of writing "as_bits" directly into an IOASIC interrupt-enable @@ -273,12 +287,10 @@ asic_intr_establish(ca, handler, val) intr_arg_t val; { -#ifdef DIAGNOSTIC -#ifdef alpha /*XXX*/ - if (ca->ca_slot == ASIC_SLOT_RTC) +#if defined(DIAGNOSTIC) && defined(alpha) + if (ca->ca_slot == IOASIC_SLOT_RTC) panic("setting clock interrupt incorrectly"); -#endif /*alpha*/ -#endif /*DIAGNOSTIC*/ +#endif /*defined(DIAGNOSTIC) && defined(alpha)*/ /* XXX SHOULD NOT BE THIS LITERAL */ if (asic_slots[ca->ca_slot].as_handler != asic_intrnull) @@ -288,14 +300,15 @@ asic_intr_establish(ca, handler, val) * XXX We need to invent a better interface to machine-dependent * interrupt-enable code, or redo the Decstation configuration * tables with unused entries, so that slot is always equal - * to "priority" (software pseudo-slot number). + * to "priority" (software pseudo-slot number). FIXME. */ +#if defined(IOASIC_DEBUG) && 0 + printf("asic: %s: intr for entry %d slot %d pri %d\n", + ca->ca_name, ca->ca_slot, ca->ca_slotpri, + (int)asic_slots[ca->ca_slot].as_val); +#endif /*IOASIC_DEBUG*/ + #ifdef pmax -#ifdef DEBUG_ASIC - printf("asic:%s%d: intr for entry %d(%d) slot %d\n", - ca->ca_name, val, ca->ca_slot, ca->ca_slotpri, - asic_slots[ca->ca_slot].as_val); -#endif /*DEBUG*/ tc_enable_interrupt(ca->ca_slotpri, handler, val, 1); #else /* Alpha AXP */ @@ -314,7 +327,7 @@ asic_intr_disestablish(ca) #ifdef pmax panic("asic_intr_disestablish: shouldn't ever be called\n"); #else - if (ca->ca_slot == ASIC_SLOT_RTC) + if (ca->ca_slot == IOASIC_SLOT_RTC) panic("asic_intr_disestablish: can't do clock interrupt"); /* XXX SHOULD NOT BE THIS LITERAL */ @@ -327,25 +340,20 @@ asic_intr_disestablish(ca) #endif } -caddr_t -asic_cvtaddr(ca) - struct confargs *ca; -{ - return - (((struct asic_softc *)ca->ca_bus->ab_dv)->sc_base + ca->ca_offset); -} - -int -asic_matchname(ca, name) - struct confargs *ca; - char *name; +void +ioasic_intr_establish(dev, cookie, level, handler, val) + struct device *dev; + void *cookie; + tc_intrlevel_t level; + intr_handler_t handler; + void *val; { - return (strcmp(name, ca->ca_name) == 0); + (*tc_enable_interrupt)((int)cookie, handler, val, 1); } -#ifndef pmax +#ifdef alpha /* * asic_intr -- * ASIC interrupt handler. @@ -360,7 +368,7 @@ asic_intr(val) u_int32_t sir, junk; volatile u_int32_t *sirp, *junkp; - sirp = (volatile u_int32_t *)ASIC_REG_INTR(sc->sc_base); + sirp = (volatile u_int32_t *)IOASIC_REG_INTR(sc->sc_base); gifound = 0; do { @@ -390,3 +398,30 @@ asic_intrnull(val) panic("uncaught IOCTL ASIC intr for slot %ld\n", (long)val); } + + +/* XXX */ +char * +ioasic_lance_ether_address() +{ + + return (u_char *)IOASIC_SYS_ETHER_ADDRESS(ioasic_base); +} + +void +ioasic_lance_dma_setup(v) + void *v; +{ + volatile u_int32_t *ldp; + tc_addr_t tca; + + tca = (tc_addr_t)v; + + ldp = (volatile u_int *)IOASIC_REG_LANCE_DMAPTR(ioasic_base); + *ldp = ((tca << 3) & ~(tc_addr_t)0x1f) | ((tca >> 29) & 0x1f); + tc_wmb(); + + *(volatile u_int32_t *)IOASIC_REG_CSR(ioasic_base) |= + IOASIC_CSR_DMAEN_LANCE; + tc_mb(); +} diff --git a/sys/arch/pmax/tc/ds-asic-conf.c b/sys/arch/pmax/tc/ds-asic-conf.c index 6215fec2010..c9d0f3bb1c8 100644 --- a/sys/arch/pmax/tc/ds-asic-conf.c +++ b/sys/arch/pmax/tc/ds-asic-conf.c @@ -1,4 +1,4 @@ -/* $NetBSD: ds-asic-conf.c,v 1.4 1996/01/03 20:39:14 jonathan Exp $ */ +/* $NetBSD: ds-asic-conf.c,v 1.5.4.1 1996/05/30 04:13:22 mhitch Exp $ */ /* * Copyright (c) 1995 Jonathan Stone @@ -20,20 +20,20 @@ struct asic_slot { struct asic_slot kn03_asic_slots[] = { - /* name slot offset intpri */ - { { "lance", 0, (u_int) (3 * 0x40000), KN03_LANCE_SLOT, }, + /* name slot offset addr intpri */ + { { "lance", 0, (u_int) (3 * 0x40000), 0,KN03_LANCE_SLOT }, KN03_INTR_LANCE, asic_intrnull, (void*) KN03_LANCE_SLOT, }, - { { "scc", 1, (u_int) (4 * 0x40000), KN03_SCC0_SLOT, }, + { { "scc", 1, (u_int) (4 * 0x40000), 0, KN03_SCC0_SLOT }, KN03_INTR_SCC_0, asic_intrnull, (void *)KN03_SCC0_SLOT, }, - { { "scc", 2, (u_int) (6 * 0x40000), KN03_SCC1_SLOT, }, + { { "scc", 2, (u_int) (6 * 0x40000), 0, KN03_SCC1_SLOT }, KN03_INTR_SCC_1, asic_intrnull, (void *)KN03_SCC1_SLOT, }, - { { "dallas_rtc", 3, (u_int) (8* 0x40000), 0 /*XXX*/, }, + { { "mc146818", 3, (u_int) (8* 0x40000), 0 /*XXX*/, 0 /*XXX*/}, 0, asic_intrnull, (void *)(long) 16 /*XXX*/, }, - { { "asc", 4, (u_int) (12* 0x40000), KN03_SCSI_SLOT, }, + { { "asc", 4, (u_int) (12* 0x40000), 0, KN03_SCSI_SLOT, }, 0, asic_intrnull, (void *)KN03_SCSI_SLOT, }, { { NULL, 0, 0, 0 }, 0, NULL, NULL } @@ -42,28 +42,28 @@ struct asic_slot kn03_asic_slots[] = struct asic_slot xine_asic_slots[] = { - { { "lance", 0, (u_int) (3 * 0x40000), KN03_LANCE_SLOT, }, - KN03_INTR_LANCE, asic_intrnull, (void*) KN03_LANCE_SLOT, }, + { { "lance", 0, (u_int) (3 * 0x40000), 0, XINE_LANCE_SLOT }, + XINE_INTR_LANCE, asic_intrnull, (void*) XINE_LANCE_SLOT, }, - { { "scc", 1, (u_int) (4 * 0x40000), KN03_SCC0_SLOT, }, - KN03_INTR_SCC_0, asic_intrnull, (void *)KN03_SCC0_SLOT, }, + { { "scc", 1, (u_int) (4 * 0x40000), 0, XINE_SCC0_SLOT }, + XINE_INTR_SCC_0, asic_intrnull, (void *) XINE_SCC0_SLOT, }, - { { "dallas_rtc", 2, 0, (u_int) (8* 0x40000), }, + { { "mc146818", 2, (u_int) (8* 0x40000), 0, 0}, 0, asic_intrnull, (void *)(long) 16 /*XXX*/, }, - { { "isdn", 3, (u_int) (9 * 0x40000), XINE_ISDN_SLOT, }, + { { "isdn", 3, (u_int) (9 * 0x40000), 0, XINE_ISDN_SLOT }, 0, asic_intrnull, (void *)(long) XINE_ISDN_SLOT, }, - { { "dtop", 4, (u_int) (10* 0x40000), XINE_DTOP_SLOT, }, + { { "dtop", 4, (u_int) (10* 0x40000), 0, XINE_DTOP_SLOT }, 0, asic_intrnull, (void *)(long) XINE_DTOP_SLOT, }, - { { "fdc", 5, (u_int) (11* 0x40000), XINE_FLOPPY_SLOT, }, + { { "fdc", 5, (u_int) (11* 0x40000), 0, XINE_FLOPPY_SLOT }, 0, asic_intrnull, (void *) (long)XINE_FLOPPY_SLOT, }, - { { "asc", 6, (u_int) (12* 0x40000), XINE_SCSI_SLOT, }, + { { "asc", 6, (u_int) (12* 0x40000), 0, XINE_SCSI_SLOT }, 0 /*XINE_INTR_SCSI*/, asic_intrnull, (void*)XINE_SCSI_SLOT, }, #if 0 - { { "frc", 3, (u_int) (15* 0x40000), XINE_SLOT_FRC, }, + { { "frc", 3, (u_int) (15* 0x40000), 0, XINE_SLOT_FRC }, 0, asic_intrnull, (void *)(long) XINE_SLOT_FRC, }, #endif { { NULL, 0, 0, }, 0, NULL, NULL } @@ -80,10 +80,11 @@ struct asic_slot xine_asic_slots[] = */ struct asic_slot kn02_asic_slots[] = { - { { "dc", 0, (u_int) (4 * 0x80000), 7 }, + /* name slot offset addr intpri */ + { { "dc", 0, (u_int) (4 * 0x80000), 0, 7 }, KN03_INTR_SCC_0, asic_intrnull, (void *) 7, }, - { { "dallas_rtc", 0, (u_int) (5 * 0x80000), 0, }, + { { "mc146818", 0, (u_int) (5 * 0x80000), 0, 0 }, 0, asic_intrnull, (void *) 16 /*XXX*/, }, { { NULL, 0, 0 }, 0, NULL, NULL } diff --git a/sys/arch/pmax/tc/ds-tc-conf.c b/sys/arch/pmax/tc/ds-tc-conf.c deleted file mode 100644 index c3418d6d071..00000000000 --- a/sys/arch/pmax/tc/ds-tc-conf.c +++ /dev/null @@ -1,179 +0,0 @@ -/* $NetBSD: ds-tc-conf.c,v 1.6 1996/01/11 05:59:23 jonathan Exp $ */ - -/* - * Copyright (c) 1995 Jonathan Stone - * All rights reserved. - */ - -/* - * 3MIN and 3MAXPLUS turbochannel slots. - * The kmin (3MIN) and kn03 (3MAXPLUS) have the same number of slots. - * We can share one configuration-struct table and use two slot-address - * tables to handle the fact that the turbochannel slot size and base - * addresses are different on the two machines. - * (thankfully, the IOCTL ASIC subslots are all the same size on all - * DECstations with IOASICs.) The devices are listed in the order in which - * we should probe and attach them. - */ - -#define C(x) ((void *)(u_long)x) -#if 0 -#define TC_SCSI "PMAZ-AA " -#define TC_ETHER "PMAD-AA " -#else -#define TC_SCSI NULL -#define TC_ETHER NULL -#endif - -struct confargs tc3_devs[4] = { - /* name slot offset intpri */ - { "IOCTL ", 3, 0x0, -1, }, /* IOCTL asic, builtin */ - { NULL, 2, 0x0, 2, }, /* option slot 2 */ - { NULL, 1, 0x0, 1, }, /* option slot 1 */ - { NULL, 0, 0x0, 0, } /* option slot 0 */ - -}; - -/* - * The only builtin Turbonchannel device on the kn03 and kmin - * is the IOCTL asic, which is mapped into TC slot 3. - */ -struct tc_builtin tc_kn03_builtins[] = { - { "IOCTL ", 3, 0x0, C(3), /*C(3)*/ } -}; - -/* 3MAXPLUS TC slot addresses */ -static struct tc_slotdesc tc_kn03_slots [4] = { - { KV(KN03_PHYS_TC_0_START), C(0) }, /* slot0 - tc option slot 0 */ - { KV(KN03_PHYS_TC_1_START), C(1) }, /* slot1 - tc option slot 1 */ - { KV(KN03_PHYS_TC_2_START), C(2) }, /* slot2 - tc option slot 2 */ - { KV(KN03_PHYS_TC_3_START), C(3) } /* slot3 - IO asic on b'board */ -}; -int tc_kn03_nslots = - sizeof(tc_kn03_slots) / sizeof(tc_kn03_slots[0]); - - -/* 3MAXPLUS turbochannel autoconfiguration table */ -struct tc_cpu_desc kn03_tc_desc = -{ - tc_kn03_slots, KN03_TC_NSLOTS, - tc3_devs, KN03_TC_NSLOTS, /*XXX*/ - tc_ds_ioasic_intr_setup, - tc_ds_ioasic_intr_establish, - tc_ds_ioasic_intr_disestablish, - (void*)-1 -}; - -/************************************************************************/ - -/* 3MIN slot addreseses */ -static struct tc_slotdesc tc_kmin_slots [] = { - { KV(KMIN_PHYS_TC_0_START), C(0) }, /* slot0 - tc option slot 0 */ - { KV(KMIN_PHYS_TC_1_START), C(1) }, /* slot1 - tc option slot 1 */ - { KV(KMIN_PHYS_TC_2_START), C(2) }, /* slot2 - tc option slot 2 */ - { KV(KMIN_PHYS_TC_3_START), C(3) } /* slot3 - IO asic on b'board */ -}; - -int tc_kmin_nslots = - sizeof(tc_kmin_slots) / sizeof(tc_kmin_slots[0]); - -/* 3MIN turbochannel autoconfiguration table */ -struct tc_cpu_desc kmin_tc_desc = -{ - tc_kmin_slots, KMIN_TC_NSLOTS, - tc3_devs, KMIN_TC_NSLOTS, /*XXX*/ - tc_ds_ioasic_intr_setup, - tc_ds_ioasic_intr_establish, - tc_ds_ioasic_intr_disestablish, - /*kmin_intr*/ (void*) -1 -}; - -/************************************************************************/ - -/* MAXINE turbochannel slots */ -struct confargs xine_devs[4] = { - /* name slot offset intpri */ - { "PMAG-DV ", 3, 0x0, 3, }, /* xcfb */ - { "IOCTL ", 2, 0x0, -1, }, - { NULL, 1, 0x0, 1, }, - { NULL, 0, 0x0, 0, } -}; - -/* MAXINE slot addreseses */ -static struct tc_slotdesc tc_xine_slots [4] = { - { KV(XINE_PHYS_TC_0_START), C(0) }, /* slot 0 - tc option slot 0 */ - { KV(XINE_PHYS_TC_1_START), C(1) }, /* slot 1 - tc option slot 1 */ - /* physical space for ``slot 2'' is reserved */ - { KV(XINE_PHYS_TC_3_START), C(8) }, /* slot 2 - IO asic on b'board */ - { KV(XINE_PHYS_CFB_START), C(-1) } /* slot 3 - fb on b'board */ -}; - -int tc_xine_nslots = - sizeof(tc_xine_slots) / sizeof(tc_xine_slots[0]); - -struct tc_cpu_desc xine_tc_desc = -{ - tc_xine_slots, XINE_TC_NSLOTS, - xine_devs, 4, /*XXX*/ - tc_ds_ioasic_intr_setup, - tc_ds_ioasic_intr_establish, - tc_ds_ioasic_intr_disestablish, - /*xine_intr*/ (void *) -1 -}; - - -/************************************************************************/ - -/* 3MAX (kn02) turbochannel slots */ -struct confargs kn02_devs[8] = { - /* The 3max supposedly has "KN02 " at 0xbffc0410 */ - - /* name slot offset intpri */ - { KN02_ASIC_NAME, 7, 0x0, -1, }, /* System CSR and subslots */ - { TC_ETHER, 6, 0x0, 6, }, /* slot 6: Ether on cpu board*/ - { TC_SCSI, 5, 0x0, 5, }, /* slot 5: SCSI on cpu board */ -/*XXX*/ { NULL, 4, -1, 0, }, /* slot 4 reserved */ -/*XXX*/ { NULL, 3, -1, 0, }, /* slot 3 reserved */ - { NULL, 2, 0x0, 2, }, /* slot 2 - TC option slot 2 */ - { NULL, 1, 0x0, 1, }, /* slot 1 - TC option slot 1 */ - { NULL, 0, 0x0, 0, } /* slot 0 - TC option slot 0 */ -}; - -/* slot addreseses */ -static struct tc_slotdesc tc_kn02_slots [8] = { - { KV(KN02_PHYS_TC_0_START), C(0)}, /* slot 0 - tc option slot 0 */ - { KV(KN02_PHYS_TC_1_START), C(1), }, /* slot 1 - tc option slot 1 */ - { KV(KN02_PHYS_TC_2_START), C(2), }, /* slot 2 - tc option slot 2 */ - { KV(KN02_PHYS_TC_3_START), C(3), }, /* slot 3 - reserved */ - { KV(KN02_PHYS_TC_4_START), C(4), }, /* slot 4 - reserved */ - { KV(KN02_PHYS_TC_5_START), C(5), }, /* slot 5 - SCSI on b`board */ - { KV(KN02_PHYS_TC_6_START), C(6), }, /* slot 6 - b'board Ether */ - { KV(KN02_PHYS_TC_7_START), C(7), } /* slot 7 - system devices */ - -}; - -int tc_kn02_nslots = - sizeof(tc_kn02_slots) / sizeof(tc_kn02_slots[0]); - -#define KN02_ROM_NAME KN02_ASIC_NAME - -#define TC_KN02_DEV_IOASIC -1 -#define TC_KN02_DEV_ETHER 6 -#define TC_KN02_DEV_SCSI 5 - -struct tc_builtin tc_kn02_builtins[] = { - { KN02_ROM_NAME,7, 0x0, C(TC_KN02_DEV_IOASIC) /* C(7)*/ }, - { TC_ETHER, 6, 0x0, C(TC_KN02_DEV_ETHER) /* C(6)*/ }, - { TC_SCSI, 5, 0x0, C(TC_KN02_DEV_SCSI) /* C(5)*/ }, -}; - - -struct tc_cpu_desc kn02_tc_desc = -{ - tc_kn02_slots, KN02_TC_NSLOTS, - kn02_devs, 8, /*XXX*/ - tc_ds_ioasic_intr_setup, - tc_ds_ioasic_intr_establish, - tc_ds_ioasic_intr_disestablish, - /*kn02_intr*/ (void*) -1 -}; diff --git a/sys/arch/pmax/tc/if_le.c b/sys/arch/pmax/tc/if_le.c index 31390a02b18..f843302b18a 100644 --- a/sys/arch/pmax/tc/if_le.c +++ b/sys/arch/pmax/tc/if_le.c @@ -1,4 +1,4 @@ -/* $NetBSD: if_le.c,v 1.7 1995/12/28 08:42:15 jonathan Exp $ */ +/* $NetBSD: if_le.c,v 1.13 1996/05/07 01:23:31 thorpej Exp $ */ /*- * Copyright (c) 1995 Charles M. Hannum. All rights reserved. @@ -57,6 +57,9 @@ #include +#include +#include + #include #include #include @@ -64,9 +67,8 @@ #ifdef pmax #define wbflush() MachEmptyWriteBuffer() -/* These should be in a header file, but where? */ -extern u_long asic_base; -extern struct cfdriver mainbuscd; /* XXX really 3100/5100 b'board */ +/* This should be in a header file, but where? */ +extern struct cfdriver mainbus_cd; /* XXX really 3100/5100 b'board */ #include #include @@ -76,13 +78,6 @@ extern struct cfdriver mainbuscd; /* XXX really 3100/5100 b'board */ #include #endif /* Alpha */ - -#include -#define LE_NEED_BUF_CONTIG -#define LE_NEED_BUF_GAP2 -#define LE_NEED_BUF_GAP16 -#include - /* access LANCE registers */ void lewritereg(); #define LERDWR(cntl, src, dst) { (dst) = (src); wbflush(); } @@ -94,36 +89,44 @@ void lewritereg(); extern caddr_t le_iomem; -#define LE_SOFTC(unit) lecd.cd_devs[unit] -#define LE_DELAY(x) DELAY(x) +int le_pmax_match __P((struct device *, void *, void *)); +void le_pmax_attach __P((struct device *, struct device *, void *)); -int lematch __P((struct device *, void *, void *)); -void leattach __P((struct device *, struct device *, void *)); +hide void le_pmax_copytobuf_gap2 __P((struct am7990_softc *, void *, + int, int)); +hide void le_pmax_copyfrombuf_gap2 __P((struct am7990_softc *, void *, + int, int)); -int leintr __P((void *sc)); +hide void le_pmax_copytobuf_gap16 __P((struct am7990_softc *, void *, + int, int)); +hide void le_pmax_copyfrombuf_gap16 __P((struct am7990_softc *, void *, + int, int)); +hide void le_pmax_zerobuf_gap16 __P((struct am7990_softc *, int, int)); - -struct cfdriver lecd = { - NULL, "le", lematch, leattach, DV_IFNET, sizeof (struct le_softc) +struct cfattach le_pmax_ca = { + sizeof(struct le_softc), le_pmax_match, le_pmax_attach }; -integrate void -lewrcsr(sc, port, val) - struct le_softc *sc; +hide void le_pmax_wrcsr __P((struct am7990_softc *, u_int16_t, u_int16_t)); +hide u_int16_t le_pmax_rdcsr __P((struct am7990_softc *, u_int16_t)); + +hide void +le_pmax_wrcsr(sc, port, val) + struct am7990_softc *sc; u_int16_t port, val; { - struct lereg1 *ler1 = sc->sc_r1; + struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1; LEWREG(port, ler1->ler1_rap); LERDWR(port, val, ler1->ler1_rdp); } -integrate u_int16_t -lerdcsr(sc, port) - struct le_softc *sc; +hide u_int16_t +le_pmax_rdcsr(sc, port) + struct am7990_softc *sc; u_int16_t port; { - struct lereg1 *ler1 = sc->sc_r1; + struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1; u_int16_t val; LEWREG(port, ler1->ler1_rap); @@ -132,7 +135,7 @@ lerdcsr(sc, port) } int -lematch(parent, match, aux) +le_pmax_match(parent, match, aux) struct device *parent; void *match, *aux; { @@ -149,9 +152,9 @@ lematch(parent, match, aux) /* XXX CHECK BUS */ /* make sure that we're looking for this type of device. */ - if (!BUS_MATCHNAME(ca, "PMAD-BA ") && /* untested alpha TC option */ - !BUS_MATCHNAME(ca, "PMAD-AA ") && /* KN02 baseboard, old option */ - !BUS_MATCHNAME(ca, "lance")) /* NetBSD name for b'board */ + if (!TC_BUS_MATCHNAME(ca, "PMAD-BA ") && /* untested alpha TC option */ + !TC_BUS_MATCHNAME(ca, "PMAD-AA ") && /* KN02 b'board, old option */ + !TC_BUS_MATCHNAME(ca, "lance")) /* NetBSD name for b'board */ return (0); #ifdef notdef /* XXX */ @@ -169,38 +172,39 @@ lematch(parent, match, aux) } void -leattach(parent, self, aux) +le_pmax_attach(parent, self, aux) struct device *parent, *self; void *aux; { - register struct le_softc *sc = (void *)self; + register struct le_softc *lesc = (void *)self; + register struct am7990_softc *sc = &lesc->sc_am7990; struct confargs *ca = aux; u_char *cp; /* pointer to MAC address */ int i; - if (parent->dv_cfdata->cf_driver == &ioasiccd) { + if (parent->dv_cfdata->cf_driver == &ioasic_cd) { /* It's on the system IOCTL ASIC */ volatile u_int *ldp; tc_addr_t dma_mask; - sc->sc_r1 = (struct lereg1 *) - MACH_PHYS_TO_UNCACHED(BUS_CVTADDR(ca)); + lesc->sc_r1 = (struct lereg1 *) + MACH_PHYS_TO_UNCACHED(ca->ca_addr); #ifdef alpha - sc->sc_r1 = TC_DENSE_TO_SPARSE(sc->sc_r1); + lesc->sc_r1 = TC_DENSE_TO_SPARSE(sc->sc_r1); #endif sc->sc_mem = (void *)MACH_PHYS_TO_UNCACHED(le_iomem); -/* XXX */ cp = (u_char *)ASIC_SYS_ETHER_ADDRESS(asic_base); +/* XXX */ cp = (u_char *)IOASIC_SYS_ETHER_ADDRESS(ioasic_base); - sc->sc_copytodesc = copytobuf_gap2; - sc->sc_copyfromdesc = copyfrombuf_gap2; - sc->sc_copytobuf = copytobuf_gap16; - sc->sc_copyfrombuf = copyfrombuf_gap16; - sc->sc_zerobuf = zerobuf_gap16; + sc->sc_copytodesc = le_pmax_copytobuf_gap2; + sc->sc_copyfromdesc = le_pmax_copyfrombuf_gap2; + sc->sc_copytobuf = le_pmax_copytobuf_gap16; + sc->sc_copyfrombuf = le_pmax_copyfrombuf_gap16; + sc->sc_zerobuf = le_pmax_zerobuf_gap16; /* * And enable Lance dma through the asic. */ - ldp = (volatile u_int *) (ASIC_REG_LANCE_DMAPTR(asic_base)); + ldp = (volatile u_int *) (IOASIC_REG_LANCE_DMAPTR(ioasic_base)); dma_mask = ((tc_addr_t)le_iomem << 3); #ifdef alpha /* Set upper 64 bits of DMA mask */ @@ -208,40 +212,44 @@ leattach(parent, self, aux) (((tc_addr_t)le_iomem >> 29) & 0x1f); #endif /*alpha*/ *ldp = dma_mask; - *(volatile u_int *)ASIC_REG_CSR(asic_base) |= - ASIC_CSR_DMAEN_LANCE; + *(volatile u_int *)IOASIC_REG_CSR(ioasic_base) |= + IOASIC_CSR_DMAEN_LANCE; wbflush(); } + else + if (parent->dv_cfdata->cf_driver == &tc_cd) { + /* It's on the turbochannel proper, or on KN02 baseboard. */ + lesc->sc_r1 = (struct lereg1 *) + (ca->ca_addr + LE_OFFSET_LANCE); + sc->sc_mem = (void *) + (ca->ca_addr + LE_OFFSET_RAM); + cp = (u_char *)(ca->ca_addr + LE_OFFSET_ROM + 2); + + sc->sc_copytodesc = am7990_copytobuf_contig; + sc->sc_copyfromdesc = am7990_copyfrombuf_contig; + sc->sc_copytobuf = am7990_copytobuf_contig; + sc->sc_copyfrombuf = am7990_copyfrombuf_contig; + sc->sc_zerobuf = am7990_zerobuf_contig; + } #ifdef pmax - else if (parent->dv_cfdata->cf_driver == &mainbuscd) { + else if (parent->dv_cfdata->cf_driver == &mainbus_cd) { /* It's on the baseboard, attached directly to mainbus. */ - sc->sc_r1 = (struct lereg1 *)BUS_CVTADDR(ca); + lesc->sc_r1 = (struct lereg1 *)(ca->ca_addr); /*XXX*/ sc->sc_mem = (void *)MACH_PHYS_TO_UNCACHED(0x19000000); /*XXX*/ cp = (u_char *)(MACH_PHYS_TO_UNCACHED(KN01_SYS_CLOCK) + 1); - sc->sc_copytodesc = copytobuf_gap2; - sc->sc_copyfromdesc = copyfrombuf_gap2; - sc->sc_copytobuf = copytobuf_gap2; - sc->sc_copyfrombuf = copyfrombuf_gap2; - sc->sc_zerobuf = zerobuf_gap2; + sc->sc_copytodesc = le_pmax_copytobuf_gap2; + sc->sc_copyfromdesc = le_pmax_copyfrombuf_gap2; + sc->sc_copytobuf = le_pmax_copytobuf_gap2; + sc->sc_copyfrombuf = le_pmax_copyfrombuf_gap2; + sc->sc_zerobuf = le_pmax_zerobuf_gap2; } #endif - else - if (parent->dv_cfdata->cf_driver == &tccd) { - /* It's on the turbochannel proper, or on KN02 baseboard. */ - sc->sc_r1 = (struct lereg1 *) - (BUS_CVTADDR(ca) + LE_OFFSET_LANCE); - sc->sc_mem = (void *) - (BUS_CVTADDR(ca) + LE_OFFSET_RAM); - cp = (u_char *)(BUS_CVTADDR(ca) + LE_OFFSET_ROM + 2); - - sc->sc_copytodesc = copytobuf_contig; - sc->sc_copyfromdesc = copyfrombuf_contig; - sc->sc_copytobuf = copytobuf_contig; - sc->sc_copyfrombuf = copyfrombuf_contig; - sc->sc_zerobuf = zerobuf_contig; - } + + sc->sc_rdcsr = le_pmax_rdcsr; + sc->sc_wrcsr = le_pmax_wrcsr; + sc->sc_hwinit = NULL; sc->sc_conf3 = 0; sc->sc_addr = 0; @@ -255,15 +263,14 @@ leattach(parent, self, aux) cp += 4; } - sc->sc_arpcom.ac_if.if_name = lecd.cd_name; - leconfig(sc); - + am7990_config(sc); - BUS_INTR_ESTABLISH(ca, leintr, sc); + BUS_INTR_ESTABLISH(ca, am7990_intr, sc); - if (parent->dv_cfdata->cf_driver == &ioasiccd) { + if (parent->dv_cfdata->cf_driver == &ioasic_cd) { /* XXX YEECH!!! */ - *(volatile u_int *)ASIC_REG_IMSK(asic_base) |= ASIC_INTR_LANCE; + *(volatile u_int *)IOASIC_REG_IMSK(ioasic_base) |= + IOASIC_INTR_LANCE; wbflush(); } } @@ -305,4 +312,144 @@ lewritereg(regptr, val) * The buffer offset is the logical byte offset, assuming contiguous storage. */ -#include +/* + * gap2: two bytes of data followed by two bytes of pad. + * + * Buffers must be 4-byte aligned. The code doesn't worry about + * doing an extra byte. + */ + +void +le_pmax_copytobuf_gap2(sc, fromv, boff, len) + struct am7990_softc *sc; + void *fromv; + int boff; + register int len; +{ + volatile caddr_t buf = sc->sc_mem; + register caddr_t from = fromv; + register volatile u_int16_t *bptr; + + if (boff & 0x1) { + /* handle unaligned first byte */ + bptr = ((volatile u_int16_t *)buf) + (boff - 1); + *bptr = (*from++ << 8) | (*bptr & 0xff); + bptr += 2; + len--; + } else + bptr = ((volatile u_int16_t *)buf) + boff; + while (len > 1) { + *bptr = (from[1] << 8) | (from[0] & 0xff); + bptr += 2; + from += 2; + len -= 2; + } + if (len == 1) + *bptr = (u_int16_t)*from; +} + +void +le_pmax_copyfrombuf_gap2(sc, tov, boff, len) + struct am7990_softc *sc; + void *tov; + int boff, len; +{ + volatile caddr_t buf = sc->sc_mem; + register caddr_t to = tov; + register volatile u_int16_t *bptr; + register u_int16_t tmp; + + if (boff & 0x1) { + /* handle unaligned first byte */ + bptr = ((volatile u_int16_t *)buf) + (boff - 1); + *to++ = (*bptr >> 8) & 0xff; + bptr += 2; + len--; + } else + bptr = ((volatile u_int16_t *)buf) + boff; + while (len > 1) { + tmp = *bptr; + *to++ = tmp & 0xff; + *to++ = (tmp >> 8) & 0xff; + bptr += 2; + len -= 2; + } + if (len == 1) + *to = *bptr & 0xff; +} + +/* + * gap16: 16 bytes of data followed by 16 bytes of pad. + * + * Buffers must be 32-byte aligned. + */ + +void +le_pmax_copytobuf_gap16(sc, fromv, boff, len) + struct am7990_softc *sc; + void *fromv; + int boff; + register int len; +{ + volatile caddr_t buf = sc->sc_mem; + register caddr_t from = fromv; + register caddr_t bptr; + register int xfer; + + bptr = buf + ((boff << 1) & ~0x1f); + boff &= 0xf; + xfer = min(len, 16 - boff); + while (len > 0) { + bcopy(from, bptr + boff, xfer); + from += xfer; + bptr += 32; + boff = 0; + len -= xfer; + xfer = min(len, 16); + } +} + +void +le_pmax_copyfrombuf_gap16(sc, tov, boff, len) + struct am7990_softc *sc; + void *tov; + int boff, len; +{ + volatile caddr_t buf = sc->sc_mem; + register caddr_t to = tov; + register caddr_t bptr; + register int xfer; + + bptr = buf + ((boff << 1) & ~0x1f); + boff &= 0xf; + xfer = min(len, 16 - boff); + while (len > 0) { + bcopy(bptr + boff, to, xfer); + to += xfer; + bptr += 32; + boff = 0; + len -= xfer; + xfer = min(len, 16); + } +} + +void +le_pmax_zerobuf_gap16(sc, boff, len) + struct am7990_softc *sc; + int boff, len; +{ + volatile caddr_t buf = sc->sc_mem; + register caddr_t bptr; + register int xfer; + + bptr = buf + ((boff << 1) & ~0x1f); + boff &= 0xf; + xfer = min(len, 16 - boff); + while (len > 0) { + bzero(bptr + boff, xfer); + bptr += 32; + boff = 0; + len -= xfer; + xfer = min(len, 16); + } +} diff --git a/sys/arch/pmax/tc/if_levar.h b/sys/arch/pmax/tc/if_levar.h index 20cabc95559..4cbd9bf83ac 100644 --- a/sys/arch/pmax/tc/if_levar.h +++ b/sys/arch/pmax/tc/if_levar.h @@ -1,4 +1,4 @@ -/* $NetBSD: if_levar.h,v 1.2 1995/08/17 22:28:27 jonathan Exp $ */ +/* $NetBSD: if_levar.h,v 1.3 1996/05/07 01:23:36 thorpej Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -60,41 +60,7 @@ struct lereg1 { * This structure contains the output queue for the interface, its address, ... */ struct le_softc { - struct device sc_dev; /* base structure */ - struct arpcom sc_arpcom; /* Ethernet common part */ - - void (*sc_copytodesc) /* Copy to descriptor */ - __P((struct le_softc *, void *, int, int)); - void (*sc_copyfromdesc) /* Copy from descriptor */ - __P((struct le_softc *, void *, int, int)); - - void (*sc_copytobuf) /* Copy to buffer */ - __P((struct le_softc *, void *, int, int)); - void (*sc_copyfrombuf) /* Copy from buffer */ - __P((struct le_softc *, void *, int, int)); - void (*sc_zerobuf) /* and Zero bytes in buffer */ - __P((struct le_softc *, int, int)); - - u_int16_t sc_conf3; /* CSR3 value */ - - void *sc_mem; /* base addr of RAM -- CPU's view */ - u_long sc_addr; /* base addr of RAM -- LANCE's view */ - u_long sc_memsize; /* size of RAM */ - - int sc_nrbuf; /* number of receive buffers */ - int sc_ntbuf; /* number of transmit buffers */ - int sc_last_rd; - int sc_first_td, sc_last_td, sc_no_td; - - int sc_initaddr; - int sc_rmdaddr; - int sc_tmdaddr; - int sc_rbufaddr; - int sc_tbufaddr; - -#ifdef LEDEBUG - int sc_debug; -#endif + struct am7990_softc sc_am7990; /* glue to MI code */ struct lereg1 *sc_r1; /* LANCE registers */ }; diff --git a/sys/arch/pmax/tc/ioasicvar.h b/sys/arch/pmax/tc/ioasicvar.h new file mode 100644 index 00000000000..66ab900be4b --- /dev/null +++ b/sys/arch/pmax/tc/ioasicvar.h @@ -0,0 +1,9 @@ +/* + * Copyright 1995, 1996 Jonathan Stone + * All rights reserved + */ +#ifndef __IOASICVAR_H__ +#define __IOASICVAR_H__ +extern struct cfdriver ioasiccd; /* FIXME: in header file */ +extern caddr_t ioasic_cvtaddr __P((struct confargs *ca)); +#endif /*__IOASICVAR_H__*/ diff --git a/sys/arch/pmax/tc/scc.c b/sys/arch/pmax/tc/scc.c index cdfb312bd6c..22fc8c3c562 100644 --- a/sys/arch/pmax/tc/scc.c +++ b/sys/arch/pmax/tc/scc.c @@ -1,4 +1,4 @@ -/* $NetBSD: scc.c,v 1.5 1995/09/29 21:55:19 jonathan Exp $ */ +/* $NetBSD: scc.c,v 1.11.4.2 1996/06/16 17:13:16 mhitch Exp $ */ /* * Copyright (c) 1991,1990,1989,1994,1995 Carnegie Mellon University @@ -65,14 +65,8 @@ * from: @(#)scc.c 8.2 (Berkeley) 11/30/93 */ -/* - * Old, non-rcons Pmax console-redirection won't compile on Alphas. - */ -#ifdef pmax -#define TK_NOTYET -#endif -#include +#include "scc.h" #if NSCC > 0 /* * Intel 82530 dual usart chip driver. Supports the serial port(s) on the @@ -106,8 +100,6 @@ #include #include -#include - #ifdef pmax #include #include @@ -115,18 +107,20 @@ #include #include #include -#include /* XXX */ +#include /* XXX */ #endif - #ifdef alpha #include #include #include -#include -#include +#include #endif +#include +#include +#include + extern void ttrstrt __P((void *)); #ifdef alpha @@ -135,11 +129,12 @@ extern void ttrstrt __P((void *)); #endif /* - * Support old-style pmax console redirection, with - * macros that also work on Alphas with serial consoles. - * (Should be replaced with rcons?) + * rcons glass-tty console (as used on pmax and sparc) won't compile on Alphas. */ - +#ifdef pmax +#define HAVE_RCONS +extern int pending_remcons; +#endif /* * True iff the console unit is diverted throught this SCC device. @@ -261,9 +256,14 @@ struct speedtab sccspeedtab[] = { /* Definition of the driver for autoconfig. */ int sccmatch __P((struct device * parent, void *cfdata, void *aux)); void sccattach __P((struct device *parent, struct device *self, void *aux)); -extern struct cfdriver scccd; -struct cfdriver scccd = { - NULL, "scc", sccmatch, sccattach, DV_TTY, sizeof (struct scc_softc) +extern struct cfdriver scc_cd; + +struct cfattach scc_ca = { + sizeof (struct scc_softc), sccmatch, sccattach +}; + +struct cfdriver scc_cd = { + NULL, "scc", DV_TTY }; int sccGetc __P((dev_t)); @@ -278,6 +278,10 @@ static void scc_modem_intr __P((dev_t)); static void sccreset __P((struct scc_softc *)); int sccintr __P((void *)); + +void scc_consinit __P((struct scc_softc *sc)); + + #ifdef alpha void scc_alphaintr __P((int)); #endif @@ -293,15 +297,12 @@ sccmatch(parent, match, aux) void *aux; { struct cfdata *cf = match; - struct confargs *ca = aux; + struct ioasicdev_attach_args *d = aux; void *sccaddr; - extern struct cfdriver ioasiccd; - - - if (parent->dv_cfdata->cf_driver == &ioasiccd) { + if (parent->dv_cfdata->cf_driver == &ioasic_cd) { /* Make sure that we're looking for this type of device. */ - if (!BUS_MATCHNAME(ca, "scc")) + if (strncmp(d->iada_modname, "scc", TC_ROM_LLEN)) return (0); } else { @@ -317,7 +318,7 @@ sccmatch(parent, match, aux) return (0); /* Get the address, and check it for validity. */ - sccaddr = BUS_CVTADDR(ca); + sccaddr = (caddr_t)d->iada_addr; #ifdef alpha sccaddr = TC_DENSE_TO_SPARSE(sccaddr); #endif /*alpha*/ @@ -334,20 +335,20 @@ scc_alphaintr(onoff) int onoff; { if (onoff) { - *(volatile u_int *)ASIC_REG_IMSK(asic_base) |= - ASIC_INTR_SCC_1 | ASIC_INTR_SCC_0; + *(volatile u_int *)IOASIC_REG_IMSK(ioasic_base) |= + IOASIC_INTR_SCC_1 | IOASIC_INTR_SCC_0; #if !defined(DEC_3000_300) && defined(SCC_DMA) - *(volatile u_int *)ASIC_REG_CSR(asic_base) |= - ASIC_CSR_DMAEN_T1 | ASIC_CSR_DMAEN_R1 | - ASIC_CSR_DMAEN_T2 | ASIC_CSR_DMAEN_R2; + *(volatile u_int *)IOASIC_REG_CSR(ioasic_base) |= + IOASIC_CSR_DMAEN_T1 | IOASIC_CSR_DMAEN_R1 | + IOASIC_CSR_DMAEN_T2 | IOASIC_CSR_DMAEN_R2; #endif } else { - *(volatile u_int *)ASIC_REG_IMSK(asic_base) &= - ~(ASIC_INTR_SCC_1 | ASIC_INTR_SCC_0); + *(volatile u_int *)IOASIC_REG_IMSK(ioasic_base) &= + ~(IOASIC_INTR_SCC_1 | IOASIC_INTR_SCC_0); #if !defined(DEC_3000_300) && defined(SCC_DMA) - *(volatile u_int *)ASIC_REG_CSR(asic_base) &= - ~(ASIC_CSR_DMAEN_T1 | ASIC_CSR_DMAEN_R1 | - ASIC_CSR_DMAEN_T2 | ASIC_CSR_DMAEN_R2); + *(volatile u_int *)IOASIC_REG_CSR(ioasic_base) &= + ~(IOASIC_CSR_DMAEN_T1 | IOASIC_CSR_DMAEN_R1 | + IOASIC_CSR_DMAEN_T2 | IOASIC_CSR_DMAEN_R2); #endif } wbflush(); @@ -361,7 +362,7 @@ sccattach(parent, self, aux) void *aux; { struct scc_softc *sc = (struct scc_softc *)self; - struct confargs *ca = aux; + struct ioasicdev_attach_args *d = aux; struct pdma *pdp; struct tty *tp; void *sccaddr; @@ -369,27 +370,40 @@ sccattach(parent, self, aux) struct termios cterm; struct tty ctty; int s; -#ifdef alpha extern int cputype; -#endif int unit, flags; unit = sc->sc_dv.dv_unit; flags = sc->sc_dv.dv_cfdata->cf_flags; - sccaddr = (void*)MACH_PHYS_TO_UNCACHED(BUS_CVTADDR(ca)); + /* serial console debugging */ +#if defined(DEBUG) && defined(HAVE_RCONS) && 0 + if (CONSOLE_ON_UNIT(unit) && (cn_tab->cn_pri == CN_REMOTE)) + printf("\nattaching scc%d, currently PROM console\n", unit); +#endif /* defined(DEBUG) && defined(HAVE_RCONS)*/ + + sccaddr = (void*)MACH_PHYS_TO_UNCACHED(d->iada_addr); #ifdef alpha sccaddr = TC_DENSE_TO_SPARSE(sccaddr); #endif /*alpha*/ /* Register the interrupt handler. */ - BUS_INTR_ESTABLISH(ca, sccintr, (void *)sc); + ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_TTY, + sccintr, (void *)sc); + + /* serial console debugging */ +#if defined(DEBUG) && defined(HAVE_RCONS) && 0 /*XXX*/ + if (CONSOLE_ON_UNIT(unit) && (cn_tab->cn_pri == CN_REMOTE)) { + DELAY(10000); + printf("(attached interrupt, delaying)\n"); + } +#endif /* defined(DEBUG) && defined(HAVE_RCONS)*/ /* * For a remote console, wait a while for previous output to * complete. */ -#ifdef TK_NOTYET +#ifdef HAVE_RCONS if (CONSOLE_ON_UNIT(unit) && (cn_tab->cn_pri == CN_REMOTE)) DELAY(10000); #else @@ -404,6 +418,8 @@ sccattach(parent, self, aux) for (cntr = 0; cntr < 2; cntr++) { pdp->p_addr = (void *)sccaddr; tp = scc_tty[unit * 2 + cntr] = ttymalloc(); + if (cputype == DS_MAXINE || cntr == 0) + tty_attach(tp); /* XXX */ pdp->p_arg = (long)tp; pdp->p_fcn = (void (*)())0; tp->t_dev = (dev_t)((unit << 1) | cntr); @@ -418,11 +434,55 @@ sccattach(parent, self, aux) /* * Special handling for consoles. */ -#ifdef TK_NOTYET +#ifdef pmax + if (pending_remcons) { + /* + * We were using PROM callbacks for console I/O, + * and we just reset the chip under the console. + * wire up this driver as console ASAP. + */ + + static struct consdev scccons = { + NULL, NULL, sccGetc, sccPutc, sccPollc, NODEV, 0 + }; + + + /*XXX*/ /* test for correct unit */ + DELAY(10000); + + /* + * XXX PROM and NetBSD unit numbers swapped + * on kn03, maybe kmin? + */ + if (cn_tab->cn_dev == unit) + return; + + /* + * If we are using the PROM serial-console routines + * as console, now is the time to set up the scc + * driver as console. + */ + scc_consinit(sc); + cn_tab = &scccons; + cn_tab->cn_dev = makedev(SCCDEV, + sc->sc_dv.dv_unit == 0 ? SCCCOMM2_PORT : SCCCOMM3_PORT); + printf(" (In sccattach: cn_dev = 0x%x)", cn_tab->cn_dev); + printf(" (Unit = %d)", unit); + printf(": console"); + pending_remcons = 0; + /* + * XXX We should support configurations where the PROM + * console device is a serial console, and a + * framebuffer, keyboard, and mouse are present. + */ + return; + } +#endif /* pmax */ +#ifdef HAVE_RCONS if ((cn_tab->cn_getc == LKgetc)) { /* XXX test below may be too inclusive ? */ - if (1 /*CONSOLE_ON_UNIT(unit)*/ ) { - + /*(1)*/ /*(CONSOLE_ON_UNIT(unit))*/ + if (major(cn_tab->cn_dev) == SCCDEV) { if (unit == 1) { s = spltty(); ctty.t_dev = makedev(SCCDEV, SCCKBD_PORT); @@ -430,7 +490,7 @@ sccattach(parent, self, aux) #ifdef pmax /* XXX -- why on pmax, not on Alpha? */ cterm.c_cflag |= CLOCAL; -#endif +#endif /* pmax */ cterm.c_ospeed = cterm.c_ispeed = 4800; (void) sccparam(&ctty, &cterm); DELAY(10000); @@ -441,7 +501,7 @@ sccattach(parent, self, aux) * works ok without it. */ KBDReset(ctty.t_dev, sccPutc); -#endif +#endif /* notyet */ DELAY(10000); splx(s); } else if (unit == 0) { @@ -450,7 +510,7 @@ sccattach(parent, self, aux) cterm.c_cflag = CS8 | PARENB | PARODD; cterm.c_ospeed = cterm.c_ispeed = 4800; (void) sccparam(&ctty, &cterm); -#ifdef TK_NOTYET +#ifdef HAVE_RCONS DELAY(10000); MouseInit(ctty.t_dev, sccPutc, sccGetc); DELAY(10000); @@ -459,29 +519,10 @@ sccattach(parent, self, aux) } } } else -#endif /* TK_NOTYET */ - if (SCCUNIT(cn_tab->cn_dev) == unit) - { - s = spltty(); -#ifdef pmax - printf("wiring unit %d as console\n", SCCUNIT(cn_tab->cn_dev)); - ctty.t_dev = cn_tab->cn_dev; -#else - ctty.t_dev = makedev(SCCDEV, - sc->sc_dv.dv_unit == 0 ? SCCCOMM2_PORT : SCCCOMM3_PORT); -#endif - cterm.c_cflag = CS8; -#ifdef pmax - /* XXX -- why on pmax, not on Alpha? */ - cterm.c_cflag |= CLOCAL; -#endif - cterm.c_ospeed = cterm.c_ispeed = 9600; - (void) sccparam(&ctty, &cterm); - DELAY(1000); -#ifdef TK_NOTYET - /*cn_tab.cn_disabled = 0;*/ /* FIXME */ -#endif - splx(s); +#endif /* HAVE_RCONS */ + if (SCCUNIT(cn_tab->cn_dev) == unit) + { + /*XXX console initialization used to go here */ } #ifdef alpha @@ -491,9 +532,6 @@ sccattach(parent, self, aux) */ if ((cputype == ST_DEC_3000_500 && sc->sc_dv.dv_unit == 1) || (cputype == ST_DEC_3000_300 && sc->sc_dv.dv_unit == 0)) -#else /* !alpha */ - if (cn_tab->cn_dev == NODEV) /*XXX*/ -#endif /* !alpha */ { static struct consdev scccons = { NULL, NULL, sccGetc, sccPutc, sccPollc, NODEV, 0 @@ -507,6 +545,37 @@ sccattach(parent, self, aux) sc->scc_softCAR |= SCCLINE(cn_tab->cn_dev); } else printf("\n"); +#endif /* !alpha */ + printf("\n"); +} + +/* + * Set up a given unit as a serial console device. + * XXX + * As most DECstations only bring out one rs-232 lead from an SCC + * to the bulkhead, and use the other for mouse and keyboard, we + * only allow one unit per SCC to be console. + */ +void +scc_consinit(sc) + struct scc_softc *sc; +{ + struct termios cterm; + struct tty ctty; + int s; + + s = spltty(); + ctty.t_dev = makedev(SCCDEV, + sc->sc_dv.dv_unit == 0 ? SCCCOMM2_PORT : SCCCOMM3_PORT); + cterm.c_cflag = CS8; +#ifdef pmax + /* XXX -- why on pmax, not on Alpha? */ + cterm.c_cflag |= CLOCAL; +#endif + cterm.c_ospeed = cterm.c_ispeed = 9600; + (void) sccparam(&ctty, &cterm); + DELAY(1000); + splx(s); } /* @@ -592,9 +661,9 @@ sccopen(dev, flag, mode, p) int s, error = 0; unit = SCCUNIT(dev); - if (unit >= scccd.cd_ndevs) + if (unit >= scc_cd.cd_ndevs) return (ENXIO); - sc = scccd.cd_devs[unit]; + sc = scc_cd.cd_devs[unit]; if (!sc) return (ENXIO); @@ -603,8 +672,10 @@ sccopen(dev, flag, mode, p) return (ENXIO); tp = scc_tty[minor(dev)]; - if (tp == NULL) + if (tp == NULL) { tp = scc_tty[minor(dev)] = ttymalloc(); + tty_attach(tp); + } tp->t_oproc = sccstart; tp->t_param = sccparam; tp->t_dev = dev; @@ -650,9 +721,9 @@ sccclose(dev, flag, mode, p) int flag, mode; struct proc *p; { - register struct scc_softc *sc = scccd.cd_devs[SCCUNIT(dev)]; + register struct scc_softc *sc = scc_cd.cd_devs[SCCUNIT(dev)]; register struct tty *tp; - register int bit, line; + register int line; tp = scc_tty[minor(dev)]; line = SCCLINE(dev); @@ -723,7 +794,7 @@ sccioctl(dev, cmd, data, flag, p) return (error); line = SCCLINE(dev); - sc = scccd.cd_devs[SCCUNIT(dev)]; + sc = scc_cd.cd_devs[SCCUNIT(dev)]; switch (cmd) { case TIOCSBRK: @@ -791,7 +862,7 @@ sccparam(tp, t) /* * Handle console specially. */ -#ifdef TK_NOTYET +#ifdef HAVE_RCONS if (cn_tab->cn_getc == LKgetc) { if (minor(tp->t_dev) == SCCKBD_PORT) { cflag = CS8; @@ -801,7 +872,7 @@ sccparam(tp, t) ospeed = ttspeedtab(4800, sccspeedtab); } } else if (tp->t_dev == cn_tab->cn_dev) -#endif /*TK_NOTYET*/ +#endif /*HAVE_RCONS*/ { cflag = CS8; ospeed = ttspeedtab(9600, sccspeedtab); @@ -811,7 +882,7 @@ sccparam(tp, t) return (0); } - sc = scccd.cd_devs[SCCUNIT(tp->t_dev)]; + sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)]; line = SCCLINE(tp->t_dev); regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr; @@ -1028,7 +1099,7 @@ sccintr(xxxsc) (*sccDivertXInput)(cc); continue; } -#ifdef TK_NOTYET +#ifdef HAVE_RCONS if ((cc = kbdMapChar(cc)) < 0) continue; #endif @@ -1075,7 +1146,7 @@ sccstart(tp) u_char temp; int s, sendone; - sc = scccd.cd_devs[SCCUNIT(tp->t_dev)]; + sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)]; dp = &sc->scc_pdma[SCCLINE(tp->t_dev)]; regs = (scc_regmap_t *)dp->p_addr; s = spltty(); @@ -1156,7 +1227,7 @@ sccstop(tp, flag) register struct scc_softc *sc; register int s; - sc = scccd.cd_devs[SCCUNIT(tp->t_dev)]; + sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)]; dp = &sc->scc_pdma[SCCLINE(tp->t_dev)]; s = spltty(); if (tp->t_state & TS_BUSY) { @@ -1180,7 +1251,7 @@ sccmctl(dev, bits, how) register u_char value; int s; - sc = scccd.cd_devs[SCCUNIT(dev)]; + sc = scc_cd.cd_devs[SCCUNIT(dev)]; line = SCCLINE(dev); regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr; s = spltty(); @@ -1244,7 +1315,7 @@ scc_modem_intr(dev) register u_char value; int s; - sc = scccd.cd_devs[SCCUNIT(dev)]; + sc = scc_cd.cd_devs[SCCUNIT(dev)]; tp = scc_tty[minor(dev)]; chan = SCCLINE(dev); regs = (scc_regmap_t *)sc->scc_pdma[chan].p_addr; @@ -1290,7 +1361,7 @@ sccGetc(dev) int s; line = SCCLINE(dev); - sc = scccd.cd_devs[SCCUNIT(dev)]; + sc = scc_cd.cd_devs[SCCUNIT(dev)]; regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr; if (!regs) return (0); @@ -1341,7 +1412,7 @@ sccPutc(dev, c) s = splhigh(); #endif line = SCCLINE(dev); - sc = scccd.cd_devs[SCCUNIT(dev)]; + sc = scc_cd.cd_devs[SCCUNIT(dev)]; regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr; /* diff --git a/sys/arch/pmax/tc/sccvar.h b/sys/arch/pmax/tc/sccvar.h new file mode 100644 index 00000000000..7b9c948ed66 --- /dev/null +++ b/sys/arch/pmax/tc/sccvar.h @@ -0,0 +1,26 @@ +/* $NetBSD: sccvar.h,v 1.2 1996/05/19 18:24:33 jonathan Exp $ */ + +/* + * + */ +extern int sccGetc __P((dev_t)); +extern void sccPutc __P((dev_t, int)); +extern int sccparam __P((struct tty *, struct termios *)); + +/* + * Minor device numbers for scc. Weird because B channel comes + * first and the A channels are wired for keyboard/mouse and the + * B channels for the comm port(s). + * + * XXX + * + * Even that is not true on the Personal Decstation, which has + * a "desktop bus" for keyboard/mouse, and brings A and B channels + * out to the bulkhead. XXX more thought. + */ + +#define SCCCOMM2_PORT 0x0 +#define SCCMOUSE_PORT 0x1 +#define SCCCOMM3_PORT 0x2 +#define SCCKBD_PORT 0x3 + diff --git a/sys/arch/pmax/tc/tc.c b/sys/arch/pmax/tc/tc.c index f98d1783bc6..5286817d781 100644 --- a/sys/arch/pmax/tc/tc.c +++ b/sys/arch/pmax/tc/tc.c @@ -1,10 +1,10 @@ -/* $NetBSD: tc.c,v 1.7 1996/01/03 20:39:10 jonathan Exp $ */ +/* $NetBSD: tc.c,v 1.9 1996/02/02 18:08:06 mycroft Exp $ */ /* * Copyright (c) 1994, 1995 Carnegie-Mellon University. * All rights reserved. * - * Author: Chris G. Demetriou + * Author: Jonathan Stone * * Permission to use, copy, modify and distribute this software and * its documentation is hereby granted, provided that both the copyright @@ -27,70 +27,53 @@ * rights to redistribute these changes. */ +#define TC_DEBUG /* until decstatn autoconfig works with dev/tc/tc.c*/ + #include #include #include #include #include -#ifdef alpha -#include -#endif /* Which TC framebuffers have drivers, for configuring a console device. */ -#include -#include -#include +#include "cfb.h" +#include "mfb.h" +#include "sfb.h" extern int pmax_boardtype; -struct tc_softc { - struct device sc_dv; - int sc_nslots; - struct tc_slotdesc *sc_slots; - - void (*sc_intr_establish) __P((struct device *, void *, - tc_intrlevel_t, int (*)(void *), void *)); - void (*sc_intr_disestablish) __P((struct device *, void *)); -#ifndef goneverysoon - struct abus sc_bus; - struct tc_cpu_desc *sc_desc; -#endif /* goneverysoon */ -}; - /* * Old-style model-specific autoconfiguration description. */ -struct tc_cpu_desc { - struct tc_slotdesc *tcd_slots; - long tcd_nslots; - struct confargs *tcd_devs; - long tcd_ndevs; - void (*tc_intr_setup) __P((void)); - void (*tc_intr_establish) __P((struct device *dev, void *cookie, - int level, intr_handler_t handler, void *arg)); - void (*tc_intr_disestablish) __P((struct device *, void *)); - int (*tc_iointr) __P((u_int mask, u_int pc, - u_int statusReg, u_int causeReg)); +struct tcbus_attach_args { + u_int tca_nslots; + struct tc_slotdesc *tca_slots; + + u_int tca_nbuiltins; + const struct tc_builtin *tca_builtins; + + void (*tca_intr_establish) __P((struct device *dev, void *cookie, + tc_intrlevel_t level, + intr_handler_t handler, + void *arg)); + void (*tca_intr_disestablish) __P((struct device *, void *)); }; -/* Return the appropriate tc_cpu_desc for a given cputype */ -extern struct tc_cpu_desc * cpu_tcdesc __P ((int cputype)); +/* Return the appropriate tc_attach_args for a given cputype */ +extern struct tc_attach_args * cpu_tcdesc __P ((int cputype)); /* Definition of the driver for autoconfig. */ int tcmatch(struct device *, void *, void *); void tcattach(struct device *, struct device *, void *); int tcprint(void *, char *); -struct cfdriver tccd = - { NULL, "tc", tcmatch, tcattach, DV_DULL, sizeof (struct tc_softc) }; -void tc_intr_establish __P((struct device *, void *, tc_intrlevel_t, +void tc_ds_intr_establish __P((struct device *, void *, tc_intrlevel_t, intr_handler_t handler, intr_arg_t arg)); void tc_intr_disestablish __P((struct device *dev, void *cookie)); caddr_t tc_cvtaddr __P((struct confargs *)); -int tc_matchname __P((struct confargs *, char *)); extern int cputype; extern int tc_findconsole __P((int prom_slot)); @@ -99,12 +82,8 @@ extern int tc_findconsole __P((int prom_slot)); int consprobeslot __P((int slot)); -/*XXX*/ /* should be in separate source file */ - /* - * tc config structures for DECstations. - * Since there will never be new decstations, we just - * bash it in here, for now. + * TurboChannel autoconfiguration declarations and tables for DECstations. */ #include @@ -125,7 +104,9 @@ int consprobeslot __P((int slot)); void tc_ds_ioasic_intr_setup __P((void)); void tc_ds_ioasic_intr_establish __P((struct device *dev, void *cookie, - int level, intr_handler_t handler, void *arg)); + tc_intrlevel_t level, + intr_handler_t handler, + void *arg)); void tc_ds_ioasic_intr_disestablish __P((struct device *, void *)); void tc_ds_ioasic_iointr __P((void *, int)); int tc_ds_ioasic_getdev __P((struct confargs *)); @@ -157,11 +138,11 @@ extern void xine_enable_intr __P ((u_int slot, tc_handler_t, /* - * Function to map from a CPU code to a tc_cpu_desc. - * This hould really be in machine-dependent code, where + * Function to map from a CPU code to a tcbus tc_attach_args struct. + * This should really be in machine-dependent code, where * it could even be a macro. */ -struct tc_cpu_desc * +struct tc_attach_args * cpu_tcdesc(cpu) int cpu; { @@ -175,9 +156,6 @@ cpu_tcdesc(cpu) tc_enable_interrupt = kmin_enable_intr; return &kmin_tc_desc; } else if (cpu == DS_MAXINE) { -#ifdef DEBUG - printf("MAXINE turbochannel\n"); -#endif tc_enable_interrupt = xine_enable_intr; return &xine_tc_desc; } else if (cpu == DS_PMAX) { @@ -189,267 +167,38 @@ cpu_tcdesc(cpu) printf("tcattach: Mipsfair (5100), no turbochannel\n"); return NULL; } else { - panic("tcattach: Unrecognized bus type 0x%x\n", cpu); + panic("cpu_tc: Unrecognized bus type 0x%x\n", cpu); } } - -/* - * Temporary glue: - * present the old-style signatures as used by BUS_INTR_ESTABLISH(), - * but using the new NetBSD machine-independent TC infrastructure. - */ - -void -confglue_tc_intr_establish(ca, handler, arg) - struct confargs *ca; - intr_handler_t handler; - intr_arg_t arg; -{ - struct tc_softc *sc = tccd.cd_devs[0]; /* XXX */ - /* XXX guess at level */ - (*sc->sc_desc->tc_intr_establish) - ((struct device*)sc, (void*)ca->ca_slotpri, 0, handler, arg); -} - -void -confglue_tc_intr_disestablish(ca) - struct confargs *ca; -{ - struct tc_softc *sc = tccd.cd_devs[0]; /* XXX */ - - (*sc->sc_desc->tc_intr_disestablish)( - (struct device*)sc, (void*)ca->ca_slotpri); -} -/* - * End of temporary glue. - */ - - -int -tcmatch(parent, cfdata, aux) - struct device *parent; - void *cfdata; - void *aux; -{ - struct cfdata *cf = cfdata; - struct confargs *ca = aux; - - - /* Make sure that we're looking for a TC. */ - if (strcmp(ca->ca_name, tccd.cd_name) != 0) - return (0); - - /* Make sure that unit exists. */ - if (cf->cf_unit != 0 || -#ifdef pmax - 0 -#else - cputype > ntc_cpu_devs || tc_cpu_devs[cputype] == NULL -#endif - ) - return (0); - - return (1); -} - /* - * Attach a turbochannel bus. Once the turbochannel is attached, - * search recursively for a system slot (which contains registers - * for baseboard devices in "subslots"), and for "real" on-board or - * option turbochannel slots (that have their own turbochannel ROM - * signature. + * We have a TurboChannel bus. Configure it. */ void -tcattach(parent, self, aux) - struct device *parent; - struct device *self; - void *aux; -{ - struct tc_softc *sc = (struct tc_softc *)self; - struct confargs *nca; - char namebuf[TC_ROM_LLEN+1]; - int i; - - printf("\n"); - - /* keep our CPU description handy */ - sc->sc_desc = cpu_tcdesc(cputype); - -#ifndef pmax /*XXX*/ - /* set up interrupt handlers */ - (*sc->sc_desc->tc_intr_setup)(); - set_iointr(sc->sc_desc->tc_iointr); -#endif /*!PMAX*/ - - sc->sc_bus.ab_dv = (struct device *)sc; - sc->sc_bus.ab_type = BUS_TC; - sc->sc_bus.ab_intr_establish = confglue_tc_intr_establish; - sc->sc_bus.ab_intr_disestablish = confglue_tc_intr_disestablish; - sc->sc_bus.ab_cvtaddr = tc_cvtaddr; - sc->sc_bus.ab_matchname = tc_matchname; - - if (sc->sc_desc == NULL) - return; - - /* Try to configure each turbochannel (or CPU-internal) device */ - for (i = 0; i < sc->sc_desc->tcd_ndevs; i++) { - - nca = &sc->sc_desc->tcd_devs[i]; - if (nca == NULL) { - printf("tcattach: bad config for slot %d\n", i); - break; - } - nca->ca_bus = &sc->sc_bus; - -#if defined(DIAGNOSTIC) || defined(DEBUG) - if (nca->ca_slot > sc->sc_desc->tcd_nslots) - panic("tcattach: dev slot > number of slots for %s", - nca->ca_name); -#endif - - if (tc_checkdevmem(BUS_CVTADDR(nca)) == 0) - continue; - - /* If no name, we have to see what might be there. */ - if (nca->ca_name == NULL) { - if (tc_checkslot(BUS_CVTADDR(nca), namebuf) == 0) - continue; - nca->ca_name = namebuf; - } - /* Tell the autoconfig machinery we've found the hardware. */ - config_found(self, nca, tcprint); - } -} - -int -tcprint(aux, pnp) - void *aux; - char *pnp; -{ - struct confargs *ca = aux; - - if (pnp) - printf("%s at %s", ca->ca_name, pnp); - printf(" slot %ld offset 0x%lx", ca->ca_slot, ca->ca_offset); - return (UNCONF); -} - -caddr_t -tc_cvtaddr(ca) - struct confargs *ca; -{ - struct tc_softc *sc = tccd.cd_devs[0]; - - return ((caddr_t)sc->sc_desc->tcd_slots[ca->ca_slot].tcs_addr + - ca->ca_offset); - -} - -void -tc_intr_establish(dev, cookie, level, handler, arg) - /*struct confargs *ca;*/ - struct device *dev; - void *cookie; - tc_intrlevel_t level; - intr_handler_t handler; - intr_arg_t arg; -{ - struct tc_softc *sc = (struct tc_softc *)dev; - -#ifdef DEBUG - printf("tc_intr_establish: %s parent intrcode %d\n", - dev->dv_xname, dev->dv_parent->dv_xname, (int) cookie); -#endif - - /* XXX pmax interrupt-enable interface */ - (*sc->sc_desc->tc_intr_establish)(sc->sc_dv.dv_parent, cookie, - level, handler, arg); -} - -void -tc_intr_disestablish(dev, cookie) - struct device *dev; - void *cookie; -{ - struct tc_softc *sc = (struct tc_softc *)dev; +config_tcbus(parent, cputype, printfn) + struct device *parent; + int cputype; + int printfn __P((void *, char *)); - (*sc->sc_intr_disestablish)(sc->sc_dv.dv_parent, cookie); -} - -int -tc_matchname(ca, name) - struct confargs *ca; - char *name; { + struct tc_attach_args tc; - return (bcmp(name, ca->ca_name, TC_ROM_LLEN) == 0); -} - -int -tc_checkdevmem(addr) - caddr_t addr; -{ - u_int32_t *datap = (u_int32_t *) addr; + struct tc_attach_args * tcbus = cpu_tcdesc(pmax_boardtype); - /* Return non-zero if memory was there (i.e. address wasn't bad). */ - return (!badaddr(datap, sizeof (u_int32_t))); -} - -u_int tc_slot_romoffs[] = { TC_SLOT_ROM, TC_SLOT_PROTOROM }; -int ntc_slot_romoffs = sizeof tc_slot_romoffs / sizeof tc_slot_romoffs[0]; - -int -tc_checkslot(addr, namep) - caddr_t addr; - char *namep; -{ - struct tc_rommap *romp; - int i, j; - - for (i = 0; i < ntc_slot_romoffs; i++) { - romp = (struct tc_rommap *) - (addr + tc_slot_romoffs[i]); - - switch (romp->tcr_width.v) { - case 1: - case 2: - case 4: - break; - - default: - continue; - } - - if (romp->tcr_stride.v != 4) - continue; - - for (j = 0; j < 4; j++) - if (romp->tcr_test[j+0*romp->tcr_stride.v] != 0x55 || - romp->tcr_test[j+1*romp->tcr_stride.v] != 0x00 || - romp->tcr_test[j+2*romp->tcr_stride.v] != 0xaa || - romp->tcr_test[j+3*romp->tcr_stride.v] != 0xff) - continue; - - for (j = 0; j < TC_ROM_LLEN; j++) - namep[j] = romp->tcr_modname[j].v; - namep[TC_ROM_LLEN] = '\0'; - return (1); - } - return (0); -} + /* + * Set up important CPU/chipset information. + */ + tc.tca_nslots = tcbus->tca_nslots; + tc.tca_slots = tcbus->tca_slots; -int -tc_intrnull(val) - void *val; -{ + tc.tca_nbuiltins = tcbus->tca_nbuiltins; + tc.tca_builtins = tcbus->tca_builtins; + tc.tca_intr_establish = tc_ds_intr_establish; /*XXX*/ + tc.tca_intr_disestablish = tc_ds_ioasic_intr_disestablish; /*XXX*/ - panic("uncaught TC intr for slot %ld\n", (long)val); + config_found(parent, (struct confargs*)&tc, printfn); } - - - /* * Probe the turbochannel for a framebuffer option card, starting * at the preferred slot and then scanning all slots. Configure the first @@ -463,7 +212,7 @@ tc_findconsole(preferred_slot) { int slot; - struct tc_cpu_desc * sc_desc; + struct tc_attach_args * sc_desc; /* First, try the slot configured as console in NVRAM. */ /* if (consprobeslot(preferred_slot)) return (1); */ @@ -475,7 +224,7 @@ tc_findconsole(preferred_slot) */ if ((sc_desc = cpu_tcdesc(pmax_boardtype)) == NULL) return 0; - for (slot = 0; slot < sc_desc->tcd_ndevs; slot++) { + for (slot = 0; slot < sc_desc->tca_nslots; slot++) { if (tc_consprobeslot(slot)) return (1); @@ -495,13 +244,13 @@ tc_consprobeslot(slot) { void *slotaddr; char name[20]; - struct tc_cpu_desc * sc_desc; + struct tc_attach_args * sc_desc; if (slot < 0 || ((sc_desc = cpu_tcdesc(pmax_boardtype)) == NULL)) return 0; - slotaddr = (void *)(sc_desc->tcd_slots[slot].tcs_addr); + slotaddr = (void *)(sc_desc->tca_slots[slot].tcs_addr); - if (tc_checkdevmem(slotaddr) == 0) + if (tc_badaddr(slotaddr)) return (0); if (tc_checkslot(slotaddr, name) == 0) @@ -541,41 +290,18 @@ tc_consprobeslot(slot) return (0); } - -/* hack for kn03 ioasic */ - -void -tc_ds_ioasic_intr_setup () -{ - printf("not setting up TC intrs\n"); -} - /* * Estabish an interrupt handler, but on what bus -- TC or ioctl asic? */ void -tc_ds_ioasic_intr_establish(dev, cookie, level, handler, val) +tc_ds_intr_establish(dev, cookie, level, handler, val) struct device *dev; void *cookie; - int level; + tc_intrlevel_t level; intr_handler_t handler; void *val; { -#ifdef notanymore - if (BUS_MATCHNAME(ca, "IOCTL ")) { - printf("(no interrupt for asic"); - return; - } - - /* The kn02 doesn't really have an ASIC */ - if (BUS_MATCHNAME(ca, KN02_ASIC_NAME)) { - printf("(no interrupt for proto-asic)\n"); - return; - } -#endif - - /* Never tested on these processors */ if (cputype == DS_3MIN || cputype == DS_MAXINE) printf("tc_enable %s sc %x slot %d\n", @@ -586,17 +312,53 @@ tc_ds_ioasic_intr_establish(dev, cookie, level, handler, val) panic("tc_intr_establish: tc_enable not set\n"); #endif - /* Enable interrupt number "cookie" on this CPU */ +#ifdef DEBUG + printf("tc_intr_establish: slot %d level %d handler %p sc %p on\n", + (int) cookie, (int) level, handler, val); +#endif + + /* + * Enable the interrupt from tc (or ioctl asic) slot with NetBSD/pmax + * sw-convention name ``cookie'' on this CPU. + * XXX store the level somewhere for selective enabling of + * interrupts from TC option slots. + */ (*tc_enable_interrupt) ((int)cookie, handler, val, 1); } + +/* hack for kn03 ioasic */ + +void +tc_ds_ioasic_intr_setup () +{ + printf("not setting up TC intrs\n"); +} + + +/* + * establish an interrupt handler for an ioasic device. + * On NetBSD/pmax, there is currently a single, merged interrupt handler for + * both TC and ioasic. Just use the tc interrupt-establish function. +*/ +void +tc_ds_ioasic_intr_establish(dev, cookie, level, handler, val) + struct device *dev; + void *cookie; + tc_intrlevel_t level; + intr_handler_t handler; + void *val; +{ + tc_intr_establish(dev, cookie, level, handler, val); +} + void tc_ds_ioasic_intr_disestablish(dev, arg) struct device *dev; void *arg; { /*(*tc_enable_interrupt) (ca->ca_slot, handler, 0);*/ - printf("cannot dis-establish TC intrs\n"); + printf("cannot dis-establish IOASIC interrupts\n"); } void @@ -606,3 +368,6 @@ tc_ds_ioasic_iointr (framep, vec) { printf("bogus interrupt handler fp %x vec %d\n", framep, vec); } + +/* XXX */ +#include diff --git a/sys/arch/pmax/tc/tc_subr.c b/sys/arch/pmax/tc/tc_subr.c new file mode 100644 index 00000000000..e566b739d5e --- /dev/null +++ b/sys/arch/pmax/tc/tc_subr.c @@ -0,0 +1,511 @@ +/* $NetBSD: tc_subr.c,v 1.1.4.4 1996/09/09 20:12:58 thorpej Exp $ */ + +/* + * Copyright 1996 The Board of Trustees of The Leland Stanford + * Junior University. All Rights Reserved. + * + * Permission to use, copy, modify, and distribute this + * software and its documentation for any purpose and without + * fee is hereby granted, provided that the above copyright + * notice appear in all copies. Stanford University + * makes no representations about the suitability of this + * software for any purpose. It is provided "as is" without + * express or implied warranty. + */ + +#include +#include +#include +#include +#include + + +/* Which TC framebuffers have drivers, for configuring a console device. */ +#include +#include +#include + +extern int pmax_boardtype; + + +/* Return the appropriate tcbus_attach_args for a given cputype */ +extern struct tcbus_attach_args * cpu_tcdesc __P ((int cputype)); + + +/* Definition of the driver for autoconfig. */ +int tcmatch(struct device *, void *, void *); +void tcattach(struct device *, struct device *, void *); +int tcprint(void *, char *); + +void tc_ds_intr_establish __P((struct device *, void *, tc_intrlevel_t, + intr_handler_t handler, intr_arg_t arg)); +void tc_intr_disestablish __P((struct device *dev, void *cookie)); +caddr_t tc_cvtaddr __P((struct confargs *)); + +extern int cputype; +extern int tc_findconsole __P((int prom_slot)); + +/* Forward declarations */ +static int tc_consprobeslot __P((tc_addr_t slotaddr)); + + +/* + * TurboChannel autoconfiguration declarations and tables for DECstations. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +/*#include */ +#define KV(x) ((tc_addr_t)MACH_PHYS_TO_UNCACHED(x)) + + + +void tc_ds_ioasic_intr_setup __P((void)); +void tc_ds_ioasic_intr_establish __P((struct device *dev, void *cookie, + tc_intrlevel_t level, + intr_handler_t handler, + void *arg)); +void tc_ds_ioasic_intr_disestablish __P((struct device *, void *)); +void tc_ds_ioasic_iointr __P((void *, int)); +int tc_ds_ioasic_getdev __P((struct confargs *)); + + +/* XXX*/ +/* should be handled elsewhere? */ +typedef void (*tc_enable_t) __P ((u_int slotno, intr_handler_t, + void *intr_arg, int on)); +typedef int (*tc_handler_t) __P((void *intr_arg)); + +extern void (*tc_enable_interrupt) __P ((u_int slotno, tc_handler_t, + void *intr_arg, int on)); +extern void kn03_enable_intr __P((u_int slot, tc_handler_t, + void *intr_arg, int on)); +extern void kn02_enable_intr __P ((u_int slot, tc_handler_t, + void *intr_arg, int on)); +extern void kmin_enable_intr __P ((u_int slot, tc_handler_t, + void *intr_arg, int on)); +extern void xine_enable_intr __P ((u_int slot, tc_handler_t, + void *intr_arg, int on)); + +/* + * Configuration tables for the four models of + * Decstation that have turbochannels. + * None of the four are the same. + */ + +#define C(x) ((void *)(u_long)x) + +#define TC_SCSI "PMAZ-AA " +#define TC_ETHER "PMAD-AA " + +/* + * 3MIN and 3MAXPLUS turbochannel slots. + * The kmin (3MIN) and kn03 (3MAXPLUS) have the same number of slots. + * We can share one configuration-struct table and use two slot-address + * tables to handle the fact that the turbochannel slot size and base + * addresses are different on the two machines. + * (thankfully, the IOCTL ASIC subslots are all the same size on all + * DECstations with IOASICs.) The devices are listed in the order in which + * we should probe and attach them. + */ + +/* + * The only builtin Turbochannel device on the kn03 and kmin + * is the IOCTL asic, which is mapped into TC slot 3. + */ +const struct tc_builtin tc_kn03_builtins[] = { + { "IOCTL ", 3, 0x0, C(3), /*C(3)*/ } +}; + +/* 3MAXPLUS TC slot addresses */ +static struct tc_slotdesc tc_kn03_slots [4] = { + { KV(KN03_PHYS_TC_0_START), C(0) }, /* slot0 - tc option slot 0 */ + { KV(KN03_PHYS_TC_1_START), C(1) }, /* slot1 - tc option slot 1 */ + { KV(KN03_PHYS_TC_2_START), C(2) }, /* slot2 - tc option slot 2 */ + { KV(KN03_PHYS_TC_3_START), C(3) } /* slot3 - IO asic on b'board */ +}; +int tc_kn03_nslots = + sizeof(tc_kn03_slots) / sizeof(tc_kn03_slots[0]); + + +/* 3MAXPLUS turbochannel autoconfiguration table */ +struct tcbus_attach_args kn03_tc_desc = +{ + "tc", /* XXX common substructure */ + 1, + KN03_TC_NSLOTS, tc_kn03_slots, + 1, tc_kn03_builtins, + tc_ds_ioasic_intr_establish, + tc_ds_ioasic_intr_disestablish +}; + +/************************************************************************/ + +/* 3MIN slot addreseses */ +static struct tc_slotdesc tc_kmin_slots [] = { + { KV(KMIN_PHYS_TC_0_START), C(0) }, /* slot0 - tc option slot 0 */ + { KV(KMIN_PHYS_TC_1_START), C(1) }, /* slot1 - tc option slot 1 */ + { KV(KMIN_PHYS_TC_2_START), C(2) }, /* slot2 - tc option slot 2 */ + { KV(KMIN_PHYS_TC_3_START), C(3) } /* slot3 - IO asic on b'board */ +}; + +int tc_kmin_nslots = + sizeof(tc_kmin_slots) / sizeof(tc_kmin_slots[0]); + +/* 3MIN turbochannel autoconfiguration table */ +struct tcbus_attach_args kmin_tc_desc = +{ + "tc", /* XXX common substructure */ + 0, + KMIN_TC_NSLOTS, tc_kmin_slots, + 1, tc_kn03_builtins, /*XXX*/ + tc_ds_ioasic_intr_establish, + tc_ds_ioasic_intr_disestablish, +}; + +/************************************************************************/ + +/* + * The builtin Turbonchannel devices on the MAXINE + * is the IOCTL asic, which is mapped into TC slot 3, and the PMAG-DV + * xcfb framebuffer, which is built into the baseboard. + */ +const struct tc_builtin tc_xine_builtins[] = { + { "IOCTL ", 3, 0x0, C(3), /*C(3)*/ }, + { "PMAG-DV ", 2, 0x0, C(2), /*C(4)*/ } +}; + +/* MAXINE slot addreseses */ +static struct tc_slotdesc tc_xine_slots [4] = { + { KV(XINE_PHYS_TC_0_START), C(0) }, /* slot 0 - tc option slot 0 */ + { KV(XINE_PHYS_TC_1_START), C(1) }, /* slot 1 - tc option slot 1 */ + /*{ KV(-1), C(-1) },*/ /* physical space for ``slot 2'' is reserved */ + { KV(XINE_PHYS_CFB_START), C(2) }, /* slot 2 - fb on b'board */ + { KV(XINE_PHYS_TC_3_START), C(3) } /* slot 3 - IO asic on b'board */ +}; + +int tc_xine_nslots = + sizeof(tc_xine_slots) / sizeof(tc_xine_slots[0]); + +struct tcbus_attach_args xine_tc_desc = +{ + "tc", /* XXX common substructure */ + 0, /* number of slots */ + XINE_TC_NSLOTS, tc_xine_slots, + 2, tc_xine_builtins, + tc_ds_ioasic_intr_establish, + tc_ds_ioasic_intr_disestablish +}; + + +/************************************************************************/ + +/* 3MAX (kn02) turbochannel slots */ +/* slot addreseses */ +static struct tc_slotdesc tc_kn02_slots [8] = { + { KV(KN02_PHYS_TC_0_START), C(0)}, /* slot 0 - tc option slot 0 */ + { KV(KN02_PHYS_TC_1_START), C(1), }, /* slot 1 - tc option slot 1 */ + { KV(KN02_PHYS_TC_2_START), C(2), }, /* slot 2 - tc option slot 2 */ + { KV(KN02_PHYS_TC_3_START), C(3), }, /* slot 3 - reserved */ + { KV(KN02_PHYS_TC_4_START), C(4), }, /* slot 4 - reserved */ + { KV(KN02_PHYS_TC_5_START), C(5), }, /* slot 5 - SCSI on b`board */ + { KV(KN02_PHYS_TC_6_START), C(6), }, /* slot 6 - b'board Ether */ + { KV(KN02_PHYS_TC_7_START), C(7), } /* slot 7 - system CSR, etc. */ +}; + +int tc_kn02_nslots = + sizeof(tc_kn02_slots) / sizeof(tc_kn02_slots[0]); + +#define KN02_ROM_NAME KN02_ASIC_NAME + +#define TC_KN02_DEV_IOASIC -1 +#define TC_KN02_DEV_ETHER 6 +#define TC_KN02_DEV_SCSI 5 + +const struct tc_builtin tc_kn02_builtins[] = { + { KN02_ROM_NAME,7, 0x0, C(TC_KN02_DEV_IOASIC) /* C(7)*/ }, + { TC_ETHER, 6, 0x0, C(TC_KN02_DEV_ETHER) /* C(6)*/ }, + { TC_SCSI, 5, 0x0, C(TC_KN02_DEV_SCSI) /* C(5)*/ } +}; + + +struct tcbus_attach_args kn02_tc_desc = +{ + "tc", /* XXX common substructure */ + 1, + 8, tc_kn02_slots, + 3, tc_kn02_builtins, /*XXX*/ + tc_ds_ioasic_intr_establish, + tc_ds_ioasic_intr_disestablish +}; + +/************************************************************************/ + + + +/* + * Function to map from a CPU code to a tcbus_attach_args struct. + * This should really be in machine-dependent code, where + * it could even be a macro. + */ +struct tcbus_attach_args * +cpu_tcdesc(cpu) + int cpu; +{ + if (cpu == DS_3MAXPLUS) { +#ifdef DS5000_240 + tc_enable_interrupt = kn03_enable_intr; + return &kn03_tc_desc; +#else + return (0); +#endif /* DS5000_240 */ + } else if (cpu == DS_3MAX) { +#ifdef DS5000_200 + tc_enable_interrupt = kn02_enable_intr; + return &kn02_tc_desc; +#else + return (0); +#endif /* DS5000_240 */ + } else if (cpu == DS_3MIN) { +#ifdef DS5000_100 + tc_enable_interrupt = kmin_enable_intr; + return &kmin_tc_desc; +#else + return (0); +#endif /*DS5000_100*/ + } else if (cpu == DS_MAXINE) { +#ifdef DS5000_25 + tc_enable_interrupt = xine_enable_intr; + return &xine_tc_desc; +#else + return (0); +#endif /*DS5000_25*/ + } else if (cpu == DS_PMAX) { +#ifdef DIAGNOSTIC + printf("tcattach: PMAX, no turbochannel\n"); +#endif /*DIAGNOSTIC*/ + return NULL; + } else if (cpu == DS_MIPSFAIR) { + printf("tcattach: Mipsfair (5100), no turbochannel\n"); + return NULL; + } else { + panic("cpu_tc: Unrecognized bus type 0x%x\n", cpu); + } +} + +/* + * We have a TurboChannel bus. Configure it. + */ +void +config_tcbus(parent, cputype, printfn) + struct device *parent; + int cputype; + int printfn __P((void *, char *)); + +{ + struct tcbus_attach_args tcb; + + struct tcbus_attach_args * tcbus = cpu_tcdesc(pmax_boardtype); + + if (tcbus == NULL) { + printf("no TurboChannel configuration info for this machine\n"); + return; + } + + /* + * Set up important CPU/chipset information. + */ + /*XXX*/ + tcb.tba_busname = tcbus->tba_busname; + + tcb.tba_speed = tcbus->tba_speed; + tcb.tba_nslots = tcbus->tba_nslots; + tcb.tba_slots = tcbus->tba_slots; + + tcb.tba_nbuiltins = tcbus->tba_nbuiltins; + tcb.tba_builtins = tcbus->tba_builtins; + tcb.tba_intr_establish = tc_ds_intr_establish; /*XXX*/ + tcb.tba_intr_disestablish = tc_ds_ioasic_intr_disestablish; /*XXX*/ + + config_found(parent, (struct confargs*)&tcb, printfn); +} + + +/* + * Called before autoconfiguration, to find a system console. + * + * Probe the turbochannel for a framebuffer option card, starting at + * the preferred slot and then scanning all slots. Configure the first + * supported framebuffer device found, if any, as the console, and + * return 1 if found. + */ +int +tc_findconsole(preferred_slot) + int preferred_slot; +{ + int slot; + + struct tcbus_attach_args * sc_desc; + + /* First, try the slot configured as console in NVRAM. */ + /* if (consprobeslot(preferred_slot)) return (1); */ + + /* + * Try to configure each turbochannel (or CPU-internal) device. + * Knows about gross internals of TurboChannel bus autoconfig + * descriptor, which needs to be fixed badly. + */ + if ((sc_desc = cpu_tcdesc(pmax_boardtype)) == NULL) + return 0; + for (slot = 0; slot < sc_desc->tba_nslots; slot++) { + + if (tc_consprobeslot(sc_desc->tba_slots[slot].tcs_addr)) + return (1); + } + return (0); +} + + +/* + * Look in a single TC option slot to see if it contains a possible + * framebuffer console device. + * Configure only the framebuffers for which driver are configured + * into the kernel. If a suitable framebuffer is found, initialize + * it, and set up glass-tty emulation. + */ +static int +tc_consprobeslot(tc_slotaddr) + tc_addr_t tc_slotaddr; +{ + + char name[20]; + void *slotaddr = (void *) tc_slotaddr; + struct tcbus_attach_args * sc_desc; + + if (tc_badaddr(slotaddr)) + return (0); + + if (tc_checkslot(tc_slotaddr, name) == 0) + return (0); + + /* + * We found an device in the given slot. Now see if it's a + * framebuffer for which we have a driver. + */ + + /*printf(", trying to init a \"%s\"", name);*/ + +#define DRIVER_FOR_SLOT(slotname, drivername) \ + (strcmp (slotname, drivername) == 0) + +#if NMFB > 0 + if (DRIVER_FOR_SLOT(name, "PMAG-AA ") && + mfbinit(NULL, slotaddr, 0, 1)) { + return (1); + } +#endif /* NMFB */ + +#if NSFB > 0 + if (DRIVER_FOR_SLOT(name, "PMAGB-BA") && + sfbinit(NULL, slotaddr, 0, 1)) { + return (1); + } +#endif /* NSFB */ + +#if NCFB > 0 + /*"cfb"*/ + if (DRIVER_FOR_SLOT(name, "PMAG-BA ") && + cfbinit(NULL, slotaddr, 0, 1)) { + return (1); + } +#endif /* NCFB */ + return (0); +} + +/* + * Estabish an interrupt handler, but on what bus -- TC or ioctl asic? + */ +void +tc_ds_intr_establish(dev, cookie, level, handler, val) + struct device *dev; + void *cookie; + tc_intrlevel_t level; + intr_handler_t handler; + void *val; +{ + + /* Never tested on these processors */ + if (cputype == DS_3MIN || cputype == DS_MAXINE) + printf("tc_enable %s sc %x slot %d\n", + dev->dv_xname, (int)val, cookie); + +#ifdef DIAGNOSTIC + if (tc_enable_interrupt == NULL) + panic("tc_intr_establish: tc_enable not set\n"); +#endif + +#ifdef DEBUG + printf("tc_intr_establish: slot %d level %d handler %p sc %p on\n", + (int) cookie, (int) level, handler, val); +#endif + + /* + * Enable the interrupt from tc (or ioctl asic) slot with NetBSD/pmax + * sw-convention name ``cookie'' on this CPU. + * XXX store the level somewhere for selective enabling of + * interrupts from TC option slots. + */ + (*tc_enable_interrupt) ((int)cookie, handler, val, 1); +} + + +/* hack for kn03 ioasic */ + +void +tc_ds_ioasic_intr_setup () +{ + printf("not setting up TC intrs\n"); +} + + +/* + * establish an interrupt handler for an ioasic device. + * On NetBSD/pmax, there is currently a single, merged interrupt handler for + * both TC and ioasic. Just use the tc interrupt-establish function. +*/ +void +tc_ds_ioasic_intr_establish(dev, cookie, level, handler, val) + struct device *dev; + void *cookie; + tc_intrlevel_t level; + intr_handler_t handler; + void *val; +{ + tc_intr_establish(dev, cookie, level, handler, val); +} + +void +tc_ds_ioasic_intr_disestablish(dev, arg) + struct device *dev; + void *arg; +{ + /*(*tc_enable_interrupt) (ca->ca_slot, handler, 0);*/ + printf("cannot dis-establish IOASIC interrupts\n"); +} + +void +tc_ds_ioasic_iointr (framep, vec) + void * framep; + int vec; +{ + printf("bogus interrupt handler fp %x vec %d\n", framep, vec); +} -- 2.20.1