From 88ae9ba27263c5f72b3b4bf13e9eb8c0f17c8eae Mon Sep 17 00:00:00 2001 From: jsg Date: Fri, 28 Jul 2023 06:32:14 +0000 Subject: [PATCH] drm/amdgpu/pm: make gfxclock consistent for sienna cichlid From Alex Deucher 0b4f3d9a5c8a21486f806fa6583a6a21e3922bab in linux-6.1.y/6.1.42 a4eb11824170d742531998f4ebd1c6a18b63db47 in mainline linux --- sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c index e381c289a23..9e56f7f874f 100644 --- a/sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c +++ b/sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c @@ -1927,12 +1927,16 @@ static int sienna_cichlid_read_sensor(struct smu_context *smu, *size = 4; break; case AMDGPU_PP_SENSOR_GFX_MCLK: - ret = sienna_cichlid_get_current_clk_freq_by_table(smu, SMU_UCLK, (uint32_t *)data); + ret = sienna_cichlid_get_smu_metrics_data(smu, + METRICS_CURR_UCLK, + (uint32_t *)data); *(uint32_t *)data *= 100; *size = 4; break; case AMDGPU_PP_SENSOR_GFX_SCLK: - ret = sienna_cichlid_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data); + ret = sienna_cichlid_get_smu_metrics_data(smu, + METRICS_AVERAGE_GFXCLK, + (uint32_t *)data); *(uint32_t *)data *= 100; *size = 4; break; -- 2.20.1