From 875e49c671f6c81d2355307c7642276f4ade3997 Mon Sep 17 00:00:00 2001 From: patrick Date: Wed, 28 Jul 2021 13:39:39 +0000 Subject: [PATCH] On some RK3399 boards the firmware disables some of the clocks. Allow some of those clocks to be enabled. Noticed on the NanoPi R4S, where the Ethernet controller clocks were surprisingly turned off. ok kettenis@ --- sys/dev/fdt/rkclock.c | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/sys/dev/fdt/rkclock.c b/sys/dev/fdt/rkclock.c index 72aa2dfc9c1..317f7680e46 100644 --- a/sys/dev/fdt/rkclock.c +++ b/sys/dev/fdt/rkclock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: rkclock.c,v 1.57 2021/07/28 13:10:28 patrick Exp $ */ +/* $OpenBSD: rkclock.c,v 1.58 2021/07/28 13:39:39 patrick Exp $ */ /* * Copyright (c) 2017, 2018 Mark Kettenis * @@ -2795,14 +2795,35 @@ rk3399_set_parent(void *cookie, uint32_t *cells, uint32_t *pcells) void rk3399_enable(void *cookie, uint32_t *cells, int on) { + struct rkclock_softc *sc = cookie; uint32_t idx = cells[0]; /* - * All clocks are enabled by default, so there is nothing for - * us to do until we start disabling clocks. + * All clocks are enabled upon hardware reset, but on some boards the + * firmware will disable some of them. Handle those here. */ - if (!on) + if (!on) { printf("%s: 0x%08x\n", __func__, idx); + return; + } + + switch (idx) { + case RK3399_ACLK_GMAC: + HWRITE4(sc, RK3399_CRU_CLKGATE_CON(32), (1 << 0) << 16); + break; + case RK3399_PCLK_GMAC: + HWRITE4(sc, RK3399_CRU_CLKGATE_CON(32), (1 << 2) << 16); + break; + case RK3399_CLK_MAC: + HWRITE4(sc, RK3399_CRU_CLKGATE_CON(5), (1 << 5) << 16); + break; + case RK3399_CLK_MAC_RX: + HWRITE4(sc, RK3399_CRU_CLKGATE_CON(5), (1 << 8) << 16); + break; + case RK3399_CLK_MAC_TX: + HWRITE4(sc, RK3399_CRU_CLKGATE_CON(5), (1 << 9) << 16); + break; + } } void -- 2.20.1