From 7ec34d6bcdc45a6e434e3d5af9c855b966cbf196 Mon Sep 17 00:00:00 2001 From: jsg Date: Thu, 27 Jan 2022 23:05:39 +0000 Subject: [PATCH] drm/amd/amdgpu: fix psp tmr bo pin count leak in SRIOV From Jingwen Chen 8662d0c6a36807093aed34b17b930484fd4bf22f in linux 5.15.y/5.15.17 85dfc1d692c9434c37842e610be37cd4ae4e0081 in mainline linux --- sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c b/sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c index bfbcdc8a349..fbd720bde43 100644 --- a/sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c +++ b/sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c @@ -2207,12 +2207,16 @@ static int psp_hw_start(struct psp_context *psp) return ret; } + if (amdgpu_sriov_vf(adev) && amdgpu_in_reset(adev)) + goto skip_pin_bo; + ret = psp_tmr_init(psp); if (ret) { DRM_ERROR("PSP tmr init failed!\n"); return ret; } +skip_pin_bo: /* * For ASICs with DF Cstate management centralized * to PMFW, TMR setup should be performed after PMFW -- 2.20.1