From 6dedd6ec16c54135e1f8707dc622f86865efc7b1 Mon Sep 17 00:00:00 2001 From: jsg Date: Fri, 21 Apr 2023 03:47:24 +0000 Subject: [PATCH] drm/amd/pm: correct SMU13.0.7 pstate profiling clock settings From Horatio Zhang 8464a01508f40a5a65db2036b7137618ee195307 in linux-6.1.y/6.1.25 f06b8887e3ef4f50098d3a949aef392c529c831a in mainline linux --- .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 22 +++++++++++++------ 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c index 7aac4106a4e..93ca6ad62ef 100644 --- a/sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c +++ b/sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c @@ -1330,9 +1330,17 @@ static int smu_v13_0_7_populate_umd_state_clk(struct smu_context *smu) &dpm_context->dpm_tables.fclk_table; struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; + struct smu_table_context *table_context = &smu->smu_table; + PPTable_t *pptable = table_context->driver_pptable; + DriverReportedClocks_t driver_clocks = + pptable->SkuTable.DriverReportedClocks; pstate_table->gfxclk_pstate.min = gfx_table->min; - pstate_table->gfxclk_pstate.peak = gfx_table->max; + if (driver_clocks.GameClockAc && + (driver_clocks.GameClockAc < gfx_table->max)) + pstate_table->gfxclk_pstate.peak = driver_clocks.GameClockAc; + else + pstate_table->gfxclk_pstate.peak = gfx_table->max; pstate_table->uclk_pstate.min = mem_table->min; pstate_table->uclk_pstate.peak = mem_table->max; @@ -1349,12 +1357,12 @@ static int smu_v13_0_7_populate_umd_state_clk(struct smu_context *smu) pstate_table->fclk_pstate.min = fclk_table->min; pstate_table->fclk_pstate.peak = fclk_table->max; - /* - * For now, just use the mininum clock frequency. - * TODO: update them when the real pstate settings available - */ - pstate_table->gfxclk_pstate.standard = gfx_table->min; - pstate_table->uclk_pstate.standard = mem_table->min; + if (driver_clocks.BaseClockAc && + driver_clocks.BaseClockAc < gfx_table->max) + pstate_table->gfxclk_pstate.standard = driver_clocks.BaseClockAc; + else + pstate_table->gfxclk_pstate.standard = gfx_table->max; + pstate_table->uclk_pstate.standard = mem_table->max; pstate_table->socclk_pstate.standard = soc_table->min; pstate_table->vclk_pstate.standard = vclk_table->min; pstate_table->dclk_pstate.standard = dclk_table->min; -- 2.20.1