From 668a5b4e2b25762e05d60f8e3a7572b302e31b07 Mon Sep 17 00:00:00 2001 From: miod Date: Thu, 19 May 2022 05:43:48 +0000 Subject: [PATCH] Not so recent evolution of the PowerPC and POWER architectures have defined exception addresses past EXC_LAST, making its definition wrong. Replace it with EXC_END, which points to the end of hardware exception addresses, and adjust logic accordingly. ok kettenis@ --- sys/arch/macppc/macppc/machdep.c | 8 ++++---- sys/arch/powerpc/include/trap.h | 4 ++-- sys/arch/powerpc64/include/trap.h | 3 ++- sys/arch/powerpc64/powerpc64/machdep.c | 8 ++++---- 4 files changed, 12 insertions(+), 11 deletions(-) diff --git a/sys/arch/macppc/macppc/machdep.c b/sys/arch/macppc/macppc/machdep.c index b436bf88fcb..c1b7891a465 100644 --- a/sys/arch/macppc/macppc/machdep.c +++ b/sys/arch/macppc/macppc/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.195 2021/12/07 17:50:44 guenther Exp $ */ +/* $OpenBSD: machdep.c,v 1.196 2022/05/19 05:43:48 miod Exp $ */ /* $NetBSD: machdep.c,v 1.4 1996/10/16 19:33:11 ws Exp $ */ /* @@ -169,7 +169,7 @@ initppc(u_int startkernel, u_int endkernel, char *args) /* * Set up trap vectors */ - for (exc = EXC_RSVD; exc <= EXC_LAST; exc += 0x100) { + for (exc = EXC_RSVD; exc < EXC_END; exc += 0x100) { switch (exc) { default: bcopy(&trapcode, (void *)exc, (size_t)&trapsize); @@ -212,7 +212,7 @@ initppc(u_int startkernel, u_int endkernel, char *args) } /* Grr, ALTIVEC_UNAVAIL is a vector not ~0xff aligned: 0x0f20 */ - bcopy(&trapcode, (void *)0xf20, (size_t)&trapsize); + bcopy(&trapcode, (void *)EXC_VEC, (size_t)&trapsize); /* * since trapsize is > 0x20, we just overwrote the EXC_PERF handler @@ -222,7 +222,7 @@ initppc(u_int startkernel, u_int endkernel, char *args) * do not generate EXC_PERF exceptions... */ - syncicache((void *)EXC_RST, EXC_LAST - EXC_RST + 0x100); + syncicache((void *)EXC_RST, EXC_END - EXC_RST); /* * Now enable translation (and machine checks/recoverable interrupts). diff --git a/sys/arch/powerpc/include/trap.h b/sys/arch/powerpc/include/trap.h index 56da4a8f861..420729a3ed5 100644 --- a/sys/arch/powerpc/include/trap.h +++ b/sys/arch/powerpc/include/trap.h @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.h,v 1.7 2007/04/26 21:36:32 kettenis Exp $ */ +/* $OpenBSD: trap.h,v 1.8 2022/05/19 05:43:48 miod Exp $ */ /* $NetBSD: trap.h,v 1.1 1996/09/30 16:34:35 ws Exp $ */ /* @@ -58,7 +58,7 @@ #define EXC_DLMISS 0x1100 /* Data load translation miss */ #define EXC_DSMISS 0x1200 /* Data store translation miss */ -#define EXC_LAST 0x2f00 /* Last possible exception vector */ +#define EXC_END 0x3000 /* End of exception vectors */ #define EXC_AST 0x3000 /* Fake AST vector */ diff --git a/sys/arch/powerpc64/include/trap.h b/sys/arch/powerpc64/include/trap.h index 13905df90a0..279dc0e209d 100644 --- a/sys/arch/powerpc64/include/trap.h +++ b/sys/arch/powerpc64/include/trap.h @@ -1,3 +1,4 @@ +/* $OpenBSD: trap.h,v 1.9 2022/05/19 05:43:48 miod Exp $ */ /*- * SPDX-License-Identifier: BSD-4-Clause * @@ -105,7 +106,7 @@ /* POWER8 */ #define EXC_SOFT_PATCH 0x1500 /* POWER8 Soft Patch Exception */ -#define EXC_LAST 0x2f00 /* Last possible exception vector */ +#define EXC_END 0x3000 /* End of exception vectors */ #define EXC_AST 0x3000 /* Fake AST vector */ diff --git a/sys/arch/powerpc64/powerpc64/machdep.c b/sys/arch/powerpc64/powerpc64/machdep.c index 36929b11d7b..37f482cdd96 100644 --- a/sys/arch/powerpc64/powerpc64/machdep.c +++ b/sys/arch/powerpc64/powerpc64/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.71 2021/12/06 21:21:10 guenther Exp $ */ +/* $OpenBSD: machdep.c,v 1.72 2022/05/19 05:43:48 miod Exp $ */ /* * Copyright (c) 2020 Mark Kettenis @@ -239,7 +239,7 @@ init_powernv(void *fdt, void *tocbase) * Initialize all traps with the stub that calls the generic * trap handler. */ - for (trap = EXC_RST; trap < EXC_LAST; trap += 32) + for (trap = EXC_RST; trap < EXC_END; trap += 32) memcpy((void *)trap, trapcode, trapcodeend - trapcode); /* Hypervisor interrupts needs special handling. */ @@ -262,7 +262,7 @@ init_powernv(void *fdt, void *tocbase) *((void **)TRAP_RSTENTRY) = cpu_idle_restore_context; /* Make the stubs visible to the CPU. */ - __syncicache(EXC_RSVD, EXC_LAST - EXC_RSVD); + __syncicache(EXC_RSVD, EXC_END - EXC_RSVD); /* We're now ready to take traps. */ msr = mfmsr(); @@ -305,7 +305,7 @@ init_powernv(void *fdt, void *tocbase) /* Remove interrupt vectors. */ reg.addr = trunc_page(EXC_RSVD); - reg.size = round_page(EXC_LAST); + reg.size = round_page(EXC_END); memreg_remove(®); /* Remove kernel. */ -- 2.20.1