From 62710749c6f8eb489dd6bf202a414ca51d160bf7 Mon Sep 17 00:00:00 2001 From: jsg Date: Thu, 17 Aug 2023 04:06:59 +0000 Subject: [PATCH] drm/amd/display: Use update plane and stream routine for DCN32x From Rodrigo Siqueira 9caac2a9f69f58bed2ba35845a13fa7039d2e1d2 in linux-6.1.y/6.1.46 dddde627807c22d6f15f4417eb395b13a1ca88f9 in mainline linux --- sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c b/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c index 8c984300917..c9ed0346b88 100644 --- a/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c +++ b/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c @@ -4002,6 +4002,18 @@ void dc_commit_updates_for_stream(struct dc *dc, struct dc_context *dc_ctx = dc->ctx; int i, j; + /* TODO: Since change commit sequence can have a huge impact, + * we decided to only enable it for DCN3x. However, as soon as + * we get more confident about this change we'll need to enable + * the new sequence for all ASICs. + */ + if (dc->ctx->dce_version >= DCN_VERSION_3_2) { + dc_update_planes_and_stream(dc, srf_updates, + surface_count, stream, + stream_update); + return; + } + stream_status = dc_stream_get_status(stream); context = dc->current_state; -- 2.20.1