From 55b1fa05dade97c157d3a325b09f723b273a6543 Mon Sep 17 00:00:00 2001 From: jsg Date: Mon, 6 May 2024 02:09:51 +0000 Subject: [PATCH] drm/amdgpu: Assign correct bits for SDMA HDP flush From Lijo Lazar 65356a1cc49657b2fc833489d226053fa601334a in linux-6.6.y/6.6.30 aebd3eb9d3ae017e6260043f6bcace2f5ef60694 in mainline linux --- sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c b/sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c index a84c5607046..a8f2d889dfc 100644 --- a/sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c +++ b/sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c @@ -365,7 +365,8 @@ static void sdma_v4_4_2_ring_emit_hdp_flush(struct amdgpu_ring *ring) u32 ref_and_mask = 0; const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio.hdp_flush_reg; - ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0 << ring->me; + ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0 + << (ring->me % adev->sdma.num_inst_per_aid); sdma_v4_4_2_wait_reg_mem(ring, 0, 1, adev->nbio.funcs->get_hdp_flush_done_offset(adev), -- 2.20.1