From 5486a9fbdcd20dd7cf458d7fcf407fe50ad6b1f9 Mon Sep 17 00:00:00 2001 From: patrick Date: Wed, 28 Jul 2021 13:10:28 +0000 Subject: [PATCH] Add RK3399 PCIe PHY reference clocks. ok kettenis@ --- sys/dev/fdt/rkclock.c | 28 ++++++++++++++++++++++++++-- sys/dev/fdt/rkclock_clocks.h | 2 ++ 2 files changed, 28 insertions(+), 2 deletions(-) diff --git a/sys/dev/fdt/rkclock.c b/sys/dev/fdt/rkclock.c index 43f985fe641..72aa2dfc9c1 100644 --- a/sys/dev/fdt/rkclock.c +++ b/sys/dev/fdt/rkclock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: rkclock.c,v 1.56 2021/07/28 13:04:46 patrick Exp $ */ +/* $OpenBSD: rkclock.c,v 1.57 2021/07/28 13:10:28 patrick Exp $ */ /* * Copyright (c) 2017, 2018 Mark Kettenis * @@ -243,6 +243,7 @@ void rk3328_reset(void *, uint32_t *, int); void rk3399_init(struct rkclock_softc *); uint32_t rk3399_get_frequency(void *, uint32_t *); int rk3399_set_frequency(void *, uint32_t *, uint32_t); +int rk3399_set_parent(void *, uint32_t *, uint32_t *); void rk3399_enable(void *, uint32_t *, int); void rk3399_reset(void *, uint32_t *, int); @@ -285,7 +286,7 @@ struct rkclock_compat rkclock_compat[] = { { "rockchip,rk3399-cru", 1, rk3399_init, rk3399_enable, rk3399_get_frequency, - rk3399_set_frequency, NULL, + rk3399_set_frequency, rk3399_set_parent, rk3399_reset }, { @@ -2205,6 +2206,17 @@ struct rkclock rk3399_clocks[] = { { RK3399_XIN24M, RK3399_CLK_32K, RK3399_PLL_CPLL, RK3399_PLL_GPLL } }, + { + RK3399_CLK_PCIEPHY_REF, RK3399_CRU_CLKSEL_CON(18), + SEL(10, 10), 0, + { RK3399_XIN24M, RK3399_CLK_PCIEPHY_REF100M }, + SET_PARENT + }, + { + RK3399_CLK_PCIEPHY_REF100M, RK3399_CRU_CLKSEL_CON(18), + 0, DIV(15, 11), + { RK3399_PLL_NPLL } + }, { RK3399_DCLK_VOP0, RK3399_CRU_CLKSEL_CON(49), SEL(11, 11), 0, @@ -2768,6 +2780,18 @@ rk3399_set_frequency(void *cookie, uint32_t *cells, uint32_t freq) return rkclock_set_frequency(sc, idx, freq); } + +int +rk3399_set_parent(void *cookie, uint32_t *cells, uint32_t *pcells) +{ + struct rkclock_softc *sc = cookie; + + if (pcells[0] != sc->sc_phandle) + return -1; + + return rkclock_set_parent(sc, cells[0], pcells[1]); +} + void rk3399_enable(void *cookie, uint32_t *cells, int on) { diff --git a/sys/dev/fdt/rkclock_clocks.h b/sys/dev/fdt/rkclock_clocks.h index f75afb51f8d..e8d99435c2d 100644 --- a/sys/dev/fdt/rkclock_clocks.h +++ b/sys/dev/fdt/rkclock_clocks.h @@ -193,8 +193,10 @@ #define RK3399_CLK_USB3OTG1_REF 130 #define RK3399_CLK_USB3OTG0_SUSPEND 131 #define RK3399_CLK_USB3OTG1_SUSPEND 132 +#define RK3399_CLK_PCIEPHY_REF 138 #define RK3399_CLK_SDMMC_DRV 154 #define RK3399_CLK_SDMMC_SAMPLE 155 +#define RK3399_CLK_PCIEPHY_REF100M 167 #define RK3399_DCLK_VOP0 180 #define RK3399_DCLK_VOP1 181 -- 2.20.1