From 526b8509ff2621671f649058401857c43b9e8661 Mon Sep 17 00:00:00 2001
From: patrick <patrick@openbsd.org>
Date: Wed, 28 Jul 2021 13:04:46 +0000
Subject: [PATCH] Add RK3399 Type-C PHY clocks.

ok kettenis@
---
 sys/dev/fdt/rkclock.c        | 14 +++++++++++++-
 sys/dev/fdt/rkclock_clocks.h |  2 ++
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/sys/dev/fdt/rkclock.c b/sys/dev/fdt/rkclock.c
index 4e4ea6a819d..43f985fe641 100644
--- a/sys/dev/fdt/rkclock.c
+++ b/sys/dev/fdt/rkclock.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rkclock.c,v 1.55 2021/04/07 16:35:02 kettenis Exp $	*/
+/*	$OpenBSD: rkclock.c,v 1.56 2021/07/28 13:04:46 patrick Exp $	*/
 /*
  * Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org>
  *
@@ -2193,6 +2193,18 @@ struct rkclock rk3399_clocks[] = {
 		SEL(15, 14), DIV(12, 8),
 		{ RK3399_PLL_CPLL, RK3399_PLL_GPLL, RK3399_PLL_NPLL }
 	},
+	{
+		RK3399_CLK_UPHY0_TCPDCORE, RK3399_CRU_CLKSEL_CON(64),
+		SEL(7, 6), DIV(4, 0),
+		{ RK3399_XIN24M, RK3399_CLK_32K, RK3399_PLL_CPLL,
+		  RK3399_PLL_GPLL }
+	},
+	{
+		RK3399_CLK_UPHY1_TCPDCORE, RK3399_CRU_CLKSEL_CON(65),
+		SEL(7, 6), DIV(4, 0),
+		{ RK3399_XIN24M, RK3399_CLK_32K, RK3399_PLL_CPLL,
+		  RK3399_PLL_GPLL }
+	},
 	{
 		RK3399_DCLK_VOP0, RK3399_CRU_CLKSEL_CON(49),
 		SEL(11, 11), 0,
diff --git a/sys/dev/fdt/rkclock_clocks.h b/sys/dev/fdt/rkclock_clocks.h
index 4885a61c5ab..f75afb51f8d 100644
--- a/sys/dev/fdt/rkclock_clocks.h
+++ b/sys/dev/fdt/rkclock_clocks.h
@@ -187,6 +187,8 @@
 #define RK3399_CLK_MAC_RX		103
 #define RK3399_CLK_MAC_TX		104
 #define RK3399_CLK_MAC			105
+#define RK3399_CLK_UPHY0_TCPDCORE	126
+#define RK3399_CLK_UPHY1_TCPDCORE	128
 #define RK3399_CLK_USB3OTG0_REF		129
 #define RK3399_CLK_USB3OTG1_REF		130
 #define RK3399_CLK_USB3OTG0_SUSPEND	131
-- 
2.20.1