From 427e448f9edb6a17acccec0b916a1d84ef8dd88d Mon Sep 17 00:00:00 2001 From: jsg Date: Thu, 24 Aug 2023 06:07:04 +0000 Subject: [PATCH] drm/amd/display: Skip DPP DTO update if root clock is gated From Nicholas Kazlauskas 5447155001e6aa30d55b06a5b4ff799fd3a1f51d in linux-6.1.y/6.1.47 30f90f3c1c2c63c2fa44f61233737d27b72637c2 in mainline linux --- sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_dccg.c | 8 ++++++++ sys/dev/pci/drm/amd/display/dc/dcn314/dcn314_dccg.c | 5 +++++ sys/dev/pci/drm/amd/display/dc/inc/hw/dccg.h | 1 + 3 files changed, 14 insertions(+) diff --git a/sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_dccg.c b/sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_dccg.c index 7d2b982506f..cef32a1f91c 100644 --- a/sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_dccg.c +++ b/sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_dccg.c @@ -47,6 +47,14 @@ void dccg31_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) { struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); + if (dccg->dpp_clock_gated[dpp_inst]) { + /* + * Do not update the DPPCLK DTO if the clock is stopped. + * It is treated the same as if the pipe itself were in PG. + */ + return; + } + if (dccg->ref_dppclk && req_dppclk) { int ref_dppclk = dccg->ref_dppclk; int modulo, phase; diff --git a/sys/dev/pci/drm/amd/display/dc/dcn314/dcn314_dccg.c b/sys/dev/pci/drm/amd/display/dc/dcn314/dcn314_dccg.c index 85ea3334355..97c6a79dfba 100644 --- a/sys/dev/pci/drm/amd/display/dc/dcn314/dcn314_dccg.c +++ b/sys/dev/pci/drm/amd/display/dc/dcn314/dcn314_dccg.c @@ -296,6 +296,9 @@ static void dccg314_dpp_root_clock_control( { struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); + if (dccg->dpp_clock_gated[dpp_inst] == clock_on) + return; + if (clock_on) { /* turn off the DTO and leave phase/modulo at max */ REG_UPDATE(DPPCLK_DTO_CTRL, DPPCLK_DTO_ENABLE[dpp_inst], 0); @@ -309,6 +312,8 @@ static void dccg314_dpp_root_clock_control( DPPCLK0_DTO_PHASE, 0, DPPCLK0_DTO_MODULO, 1); } + + dccg->dpp_clock_gated[dpp_inst] = !clock_on; } static const struct dccg_funcs dccg314_funcs = { diff --git a/sys/dev/pci/drm/amd/display/dc/inc/hw/dccg.h b/sys/dev/pci/drm/amd/display/dc/inc/hw/dccg.h index ad6acd1b34e..9651cccb084 100644 --- a/sys/dev/pci/drm/amd/display/dc/inc/hw/dccg.h +++ b/sys/dev/pci/drm/amd/display/dc/inc/hw/dccg.h @@ -68,6 +68,7 @@ struct dccg { const struct dccg_funcs *funcs; int pipe_dppclk_khz[MAX_PIPES]; int ref_dppclk; + bool dpp_clock_gated[MAX_PIPES]; //int dtbclk_khz[MAX_PIPES];/* TODO needs to be removed */ //int audio_dtbclk_khz;/* TODO needs to be removed */ //int ref_dtbclk_khz;/* TODO needs to be removed */ -- 2.20.1