From 3d765a221e10bb39328070031db5752724439aaf Mon Sep 17 00:00:00 2001 From: jsg Date: Mon, 20 May 2024 04:55:16 +0000 Subject: [PATCH] drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2 From Tao Zhou c0beff4e35af8ef3f5e30ac3f55a6109f751d9c0 in linux-6.6.y/6.6.31 f886b49feaae30acd599e37d4284836024b0f3ed in mainline linux --- sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c b/sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c index a8f2d889dfc..f624b1bd4ea 100644 --- a/sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c +++ b/sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c @@ -1613,19 +1613,9 @@ static int sdma_v4_4_2_set_ecc_irq_state(struct amdgpu_device *adev, u32 sdma_cntl; sdma_cntl = RREG32_SDMA(type, regSDMA_CNTL); - switch (state) { - case AMDGPU_IRQ_STATE_DISABLE: - sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL, - DRAM_ECC_INT_ENABLE, 0); - WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl); - break; - /* sdma ecc interrupt is enabled by default - * driver doesn't need to do anything to - * enable the interrupt */ - case AMDGPU_IRQ_STATE_ENABLE: - default: - break; - } + sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL, DRAM_ECC_INT_ENABLE, + state == AMDGPU_IRQ_STATE_ENABLE ? 1 : 0); + WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl); return 0; } -- 2.20.1