From 3b51aead4a3bf57a11b7626029d51e025878b350 Mon Sep 17 00:00:00 2001 From: patrick Date: Wed, 19 Jun 2024 21:25:41 +0000 Subject: [PATCH] The X1E80100 (Snapdragon X Elite) joins the group of chips that require the SMMU quirk. ok kettenis@ --- sys/arch/arm64/dev/smmu_acpi.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sys/arch/arm64/dev/smmu_acpi.c b/sys/arch/arm64/dev/smmu_acpi.c index b56ac927d88..24d38776c55 100644 --- a/sys/arch/arm64/dev/smmu_acpi.c +++ b/sys/arch/arm64/dev/smmu_acpi.c @@ -1,4 +1,4 @@ -/* $OpenBSD: smmu_acpi.c,v 1.7 2022/09/08 19:30:05 kettenis Exp $ */ +/* $OpenBSD: smmu_acpi.c,v 1.8 2024/06/19 21:25:41 patrick Exp $ */ /* * Copyright (c) 2021 Patrick Wildt * @@ -152,7 +152,8 @@ smmu_acpi_foundqcom(struct aml_node *node, void *arg) if (strcmp(dev, "QCOM0409") == 0 || /* SC8180X/XP */ strcmp(dev, "QCOM0609") == 0 || /* SC8280XP */ - strcmp(dev, "QCOM0809") == 0) /* SC7180 */ + strcmp(dev, "QCOM0809") == 0 || /* SC7180 */ + strcmp(dev, "QCOM0C09") == 0) /* X1E80100 */ sc->sc_is_qcom = 1; return 0; -- 2.20.1