From 36fd90dcf1acf2ddb4ef5dbabe5313b3a8d46ee2 Mon Sep 17 00:00:00 2001 From: jsg Date: Thu, 11 Mar 2021 11:16:54 +0000 Subject: [PATCH] spelling --- sys/arch/alpha/alpha/pmap.c | 4 +-- sys/arch/alpha/mcbus/mcbus.c | 4 +-- sys/arch/amd64/amd64/bios.c | 4 +-- sys/arch/amd64/amd64/cpu.c | 4 +-- sys/arch/amd64/amd64/machdep.c | 4 +-- sys/arch/amd64/amd64/vmm.c | 32 ++++++++++++------------ sys/arch/amd64/include/atomic.h | 4 +-- sys/arch/amd64/include/smbiosvar.h | 4 +-- sys/arch/amd64/pci/acpipci.c | 4 +-- sys/arch/amd64/pci/pci_machdep.c | 4 +-- sys/arch/amd64/stand/efi32/efipxe.c | 4 +-- sys/arch/amd64/stand/efi64/efipxe.c | 4 +-- sys/arch/amd64/stand/efiboot/efipxe.c | 4 +-- sys/arch/amd64/stand/libsa/exec_i386.c | 4 +-- sys/arch/arm/arm/cpu.c | 6 ++--- sys/arch/arm/arm/pmap7.c | 6 ++--- sys/arch/arm/include/pte.h | 4 +-- sys/arch/arm64/arm64/cpu.c | 4 +-- sys/arch/arm64/arm64/db_interface.c | 4 +-- sys/arch/arm64/arm64/intr.c | 4 +-- sys/arch/arm64/arm64/machdep.c | 4 +-- sys/arch/arm64/arm64/pmap.c | 6 ++--- sys/arch/arm64/dev/agtimer.c | 4 +-- sys/arch/arm64/dev/efi.c | 4 +-- sys/arch/arm64/include/armreg.h | 4 +-- sys/arch/arm64/include/smbiosvar.h | 4 +-- sys/arch/arm64/stand/efiboot/efiacpi.c | 4 +-- sys/arch/arm64/stand/efiboot/efipxe.c | 4 +-- sys/arch/arm64/stand/efiboot/fdt.c | 4 +-- sys/arch/armv7/armv7/armv7_machdep.c | 8 +++--- sys/arch/armv7/armv7/intr.c | 4 +-- sys/arch/armv7/exynos/ec_commands.h | 2 +- sys/arch/armv7/exynos/exiic.c | 2 +- sys/arch/armv7/omap/amdisplay.c | 4 +-- sys/arch/armv7/omap/if_cpsw.c | 4 +-- sys/arch/armv7/omap/omehci.c | 4 +-- sys/arch/armv7/stand/efiboot/efipxe.c | 4 +-- sys/arch/armv7/stand/efiboot/fdt.c | 4 +-- sys/arch/armv7/sunxi/sxie.c | 4 +-- sys/arch/hppa/dev/viper.h | 6 ++--- sys/arch/hppa/hppa/intr.c | 4 +-- sys/arch/hppa/hppa/machdep.c | 4 +-- sys/arch/hppa/hppa/mainbus.c | 4 +-- sys/arch/hppa/hppa/trap.c | 4 +-- sys/arch/hppa/include/autoconf.h | 4 +-- sys/arch/hppa/include/pdc.h | 6 ++--- sys/arch/hppa/include/psl.h | 6 ++--- sys/arch/hppa/spmath/dbl_float.h | 4 +-- sys/arch/hppa/spmath/quad_float.h | 4 +-- sys/arch/hppa/spmath/sgl_float.h | 4 +-- sys/arch/i386/eisa/eisa_machdep.c | 4 +-- sys/arch/i386/i386/cpu.c | 4 +-- sys/arch/i386/i386/mpbios.c | 4 +-- sys/arch/i386/i386/pmap.c | 4 +-- sys/arch/i386/include/atomic.h | 4 +-- sys/arch/i386/include/cpu.h | 4 +-- sys/arch/i386/include/i82489var.h | 4 +-- sys/arch/i386/include/npx.h | 4 +-- sys/arch/i386/include/pmap.h | 4 +-- sys/arch/i386/include/smbiosvar.h | 4 +-- sys/arch/i386/include/specialreg.h | 4 +-- sys/arch/i386/isa/ahc_isa.c | 4 +-- sys/arch/i386/pci/gscpm.c | 4 +-- sys/arch/i386/pci/pci_machdep.c | 6 ++--- sys/arch/landisk/dev/rs5c313.c | 4 +-- sys/arch/loongson/dev/bonito.c | 4 +-- sys/arch/loongson/dev/sisfb.c | 4 +-- sys/arch/loongson/dev/voyager.c | 4 +-- sys/arch/loongson/loongson/machdep.c | 4 +-- sys/arch/luna88k/cbus/cbus.c | 4 +-- sys/arch/luna88k/cbus/nec86hw.c | 4 +-- sys/arch/luna88k/dev/mb89352.c | 6 ++--- sys/arch/luna88k/dev/mb89352reg.h | 4 +-- sys/arch/luna88k/dev/mb89352var.h | 4 +-- sys/arch/luna88k/dev/sioreg.h | 4 +-- sys/arch/luna88k/stand/boot/bmd.c | 4 +-- sys/arch/luna88k/stand/boot/dev_net.c | 4 +-- sys/arch/luna88k/stand/boot/lance.c | 4 +-- sys/arch/luna88k/stand/boot/sc.c | 4 +-- sys/arch/luna88k/stand/boot/scsivar.h | 4 +-- sys/arch/luna88k/stand/boot/sioreg.h | 4 +-- sys/arch/m88k/m88k/db_disasm.c | 4 +-- sys/arch/m88k/m88k/db_interface.c | 4 +-- sys/arch/m88k/m88k/m88110_fp.c | 6 ++--- sys/arch/macppc/dev/adb.c | 4 +-- sys/arch/macppc/dev/dbdma.h | 4 +-- sys/arch/macppc/dev/if_mc.c | 4 +-- sys/arch/macppc/dev/openpic.c | 4 +-- sys/arch/macppc/dev/zs.c | 4 +-- sys/arch/macppc/include/z8530var.h | 6 ++--- sys/arch/macppc/macppc/ofw_machdep.c | 4 +-- sys/arch/macppc/stand/ofdev.c | 4 +-- sys/arch/mips64/include/asm.h | 4 +-- sys/arch/mips64/mips64/cache_loongson2.c | 4 +-- sys/arch/mips64/mips64/cache_tfp.c | 4 +-- sys/arch/mips64/mips64/fp_emulate.c | 4 +-- sys/arch/mips64/mips64/pmap.c | 4 +-- sys/arch/mips64/mips64/trap.c | 6 ++--- sys/arch/octeon/dev/cn30xxgmx.c | 6 ++--- sys/arch/octeon/dev/cn30xxgmxreg.h | 6 ++--- sys/arch/octeon/dev/cn30xxpko.c | 6 ++--- sys/arch/octeon/dev/if_cnmac.c | 4 +-- sys/arch/octeon/dev/octcf.c | 4 +-- sys/arch/octeon/dev/octxctl.c | 4 +-- sys/arch/octeon/include/octeonvar.h | 4 +-- sys/arch/powerpc/include/exec.h | 6 ++--- sys/arch/powerpc/isa/isa_machdep.h | 4 +-- sys/arch/powerpc/powerpc/pmap.c | 6 ++--- sys/arch/powerpc/powerpc/trap.c | 4 +-- sys/arch/powerpc/powerpc/vm_machdep.c | 4 +-- sys/arch/powerpc64/include/exec.h | 4 +-- sys/arch/powerpc64/include/smbiosvar.h | 4 +-- sys/arch/powerpc64/include/trap.h | 2 +- sys/arch/sgi/dev/if_iecreg.h | 6 ++--- sys/arch/sgi/dev/mavb.c | 14 +++++------ sys/arch/sgi/gio/gio.c | 4 +-- sys/arch/sgi/hpc/hpcdma.h | 4 +-- sys/arch/sgi/hpc/if_sq.c | 4 +-- sys/arch/sgi/hpc/zs.c | 4 +-- sys/arch/sgi/localbus/macebus.c | 4 +-- sys/arch/sgi/localbus/tcc.c | 4 +-- sys/arch/sgi/xbow/odyssey.c | 4 +-- sys/arch/sgi/xbow/xbow.c | 4 +-- sys/arch/sgi/xbow/xbridge.c | 14 +++++------ sys/arch/sgi/xbow/xbridgereg.h | 4 +-- sys/arch/sh/dev/scifreg.h | 6 ++--- sys/arch/sh/sh/trap.c | 12 ++++----- sys/arch/sparc64/dev/ebus_mainbus.c | 6 ++--- sys/arch/sparc64/dev/ifb.c | 4 +-- sys/arch/sparc64/dev/iommu.c | 4 +-- sys/arch/sparc64/dev/iommuvar.h | 4 +-- sys/arch/sparc64/dev/pcfiic_ebus.c | 8 +++--- sys/arch/sparc64/dev/psychoreg.h | 6 ++--- sys/arch/sparc64/dev/raptor.c | 4 +-- sys/arch/sparc64/dev/uperf_ebus.c | 6 ++--- sys/arch/sparc64/dev/vdsk.c | 4 +-- sys/arch/sparc64/fpu/fpu_sqrt.c | 4 +-- sys/arch/sparc64/sparc64/autoconf.c | 4 +-- sys/arch/sparc64/sparc64/clock.c | 4 +-- sys/arch/sparc64/sparc64/trap.c | 6 ++--- 140 files changed, 331 insertions(+), 331 deletions(-) diff --git a/sys/arch/alpha/alpha/pmap.c b/sys/arch/alpha/alpha/pmap.c index 71f0afc89e8..dff80bacb8a 100644 --- a/sys/arch/alpha/alpha/pmap.c +++ b/sys/arch/alpha/alpha/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.86 2018/09/06 11:50:53 jsg Exp $ */ +/* $OpenBSD: pmap.c,v 1.87 2021/03/11 11:16:54 jsg Exp $ */ /* $NetBSD: pmap.c,v 1.154 2000/12/07 22:18:55 thorpej Exp $ */ /*- @@ -3153,7 +3153,7 @@ pmap_l1pt_ctor(pt_entry_t *l1pt) * * Page allocator for L1 PT pages. * - * Note: The growkernel lock is held accross allocations + * Note: The growkernel lock is held across allocations * from this pool, so we don't need to acquire it * ourselves. */ diff --git a/sys/arch/alpha/mcbus/mcbus.c b/sys/arch/alpha/mcbus/mcbus.c index 580e6cf85df..27ef68970e3 100644 --- a/sys/arch/alpha/mcbus/mcbus.c +++ b/sys/arch/alpha/mcbus/mcbus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: mcbus.c,v 1.3 2014/08/06 15:15:16 jsg Exp $ */ +/* $OpenBSD: mcbus.c,v 1.4 2021/03/11 11:16:54 jsg Exp $ */ /* $NetBSD: mcbus.c,v 1.19 2007/03/04 05:59:11 christos Exp $ */ /* @@ -204,7 +204,7 @@ mcbus_node_type_str(type) case MCBUS_TYPE_PCI: return ("PCI Bridge"); default: - panic("REALLY UNKNWON (%x) TYPE IN MCBUS_NODE_TYPE_STR", type); + panic("REALLY UNKNOWN (%x) TYPE IN MCBUS_NODE_TYPE_STR", type); break; } } diff --git a/sys/arch/amd64/amd64/bios.c b/sys/arch/amd64/amd64/bios.c index 8d534c85716..8dd34e4edf6 100644 --- a/sys/arch/amd64/amd64/bios.c +++ b/sys/arch/amd64/amd64/bios.c @@ -1,4 +1,4 @@ -/* $OpenBSD: bios.c,v 1.43 2020/08/26 03:29:05 visa Exp $ */ +/* $OpenBSD: bios.c,v 1.44 2021/03/11 11:16:54 jsg Exp $ */ /* * Copyright (c) 2006 Gordon Willem Klok * @@ -96,7 +96,7 @@ bios_attach(struct device *parent, struct device *self, void *aux) (uint8_t *)bios_efiinfo->config_smbios)); if (hdr == NULL) { - /* see if we have SMBIOS extentions */ + /* see if we have SMBIOS extensions */ for (p = ISA_HOLE_VADDR(SMBIOS_START); p < (uint8_t *)ISA_HOLE_VADDR(SMBIOS_END); p+= 16) { hdr = smbios_find(p); diff --git a/sys/arch/amd64/amd64/cpu.c b/sys/arch/amd64/amd64/cpu.c index 122d8018551..8e6e6c1d1a3 100644 --- a/sys/arch/amd64/amd64/cpu.c +++ b/sys/arch/amd64/amd64/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.152 2020/11/28 18:40:01 kettenis Exp $ */ +/* $OpenBSD: cpu.c,v 1.153 2021/03/11 11:16:55 jsg Exp $ */ /* $NetBSD: cpu.c,v 1.1 2003/04/26 18:39:26 fvdl Exp $ */ /*- @@ -494,7 +494,7 @@ cpu_init_mwait(struct cpu_softc *sc) cpu_mwait_size = largest; printf("\n"); - /* enable use of mwait; may be overriden by acpicpu later */ + /* enable use of mwait; may be overridden by acpicpu later */ if (cpu_mwait_size > 0) cpu_idle_cycle_fcn = &cpu_idle_mwait_cycle; } diff --git a/sys/arch/amd64/amd64/machdep.c b/sys/arch/amd64/amd64/machdep.c index c6af8207e54..40f68fde765 100644 --- a/sys/arch/amd64/amd64/machdep.c +++ b/sys/arch/amd64/amd64/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.272 2021/02/13 07:46:44 mlarkin Exp $ */ +/* $OpenBSD: machdep.c,v 1.273 2021/03/11 11:16:55 jsg Exp $ */ /* $NetBSD: machdep.c,v 1.3 2003/05/07 22:58:18 fvdl Exp $ */ /*- @@ -1410,7 +1410,7 @@ init_x86_64(paddr_t first_avail) * Memory on the AMD64 port is described by three different things. * * 1. biosbasemem - This is outdated, and should really only be used to - * santize the other values. Thiis is what we get back from the BIOS + * sanitize the other values. This is what we get back from the BIOS * using the legacy routines, describing memory below 640KB. * * 2. bios_memmap[] - This is the memory map as the bios has returned diff --git a/sys/arch/amd64/amd64/vmm.c b/sys/arch/amd64/amd64/vmm.c index 72104b78c73..d2b4c387464 100644 --- a/sys/arch/amd64/amd64/vmm.c +++ b/sys/arch/amd64/amd64/vmm.c @@ -1,4 +1,4 @@ -/* $OpenBSD: vmm.c,v 1.277 2021/02/13 07:55:38 mlarkin Exp $ */ +/* $OpenBSD: vmm.c,v 1.278 2021/03/11 11:16:55 jsg Exp $ */ /* * Copyright (c) 2014 Mike Larkin * @@ -722,7 +722,7 @@ vm_intr_pending(struct vm_intr_params *vip) * Return values: * 0: if successful * ENOENT: if the VM/VCPU defined by 'vpp' cannot be found - * EINVAL: if an error occured reading the registers of the guest + * EINVAL: if an error occurred reading the registers of the guest */ int vm_rwvmparams(struct vm_rwvmparams_params *vpp, int dir) { @@ -778,7 +778,7 @@ vm_rwvmparams(struct vm_rwvmparams_params *vpp, int dir) { * Return values: * 0: if successful * ENOENT: if the VM/VCPU defined by 'vrwp' cannot be found - * EINVAL: if an error occured accessing the registers of the guest + * EINVAL: if an error occurred accessing the registers of the guest * EPERM: if the vm cannot be accessed from the calling process */ int @@ -827,7 +827,7 @@ vm_rwregs(struct vm_rwregs_params *vrwp, int dir) * IOCTL handler to sets the access protections of the ept * * Parameters: - * vmep: decribes the memory for which the protect will be applied.. + * vmep: describes the memory for which the protect will be applied.. * * Return values: * 0: if successful @@ -1749,7 +1749,7 @@ vcpu_reload_vmcs_vmx(uint64_t *vmcs) * * Return values: * 0: if successful - * EINVAL: an error reading registers occured + * EINVAL: an error reading registers occurred */ int vcpu_readregs_vmx(struct vcpu *vcpu, uint64_t regmask, @@ -2020,7 +2020,7 @@ vcpu_readregs_svm(struct vcpu *vcpu, uint64_t regmask, * * Return values: * 0: if successful - * EINVAL an error writing registers occured + * EINVAL an error writing registers occurred */ int vcpu_writeregs_vmx(struct vcpu *vcpu, uint64_t regmask, int loadvmcs, @@ -2157,7 +2157,7 @@ out: * * Return values: * 0: if successful - * EINVAL an error writing registers occured + * EINVAL an error writing registers occurred */ int vcpu_writeregs_svm(struct vcpu *vcpu, uint64_t regmask, @@ -2589,7 +2589,7 @@ vmx_setmsrbrw(struct vcpu *vcpu, uint32_t msr) * Note that this function does not clear any bits; to clear bits in the * vmcb cleanbits bitfield, use 'svm_set_dirty'. * - * Paramters: + * Parameters: * vmcs: the VCPU whose VMCB clean value should be set * value: the value(s) to enable in the cleanbits mask */ @@ -2616,7 +2616,7 @@ svm_set_clean(struct vcpu *vcpu, uint32_t value) * Multiple dirty bits can be provided in 'value' at the same time (eg, * "SVM_CLEANBITS_I | SVM_CLEANBITS_TPR"). * - * Paramters: + * Parameters: * vmcs: the VCPU whose VMCB dirty value should be set * value: the value(s) to dirty in the cleanbits mask */ @@ -4474,7 +4474,7 @@ vmm_translate_gva(struct vcpu *vcpu, uint64_t va, uint64_t *pa, int mode) * Return values: * 0: The run loop exited and no help is needed from vmd * EAGAIN: The run loop exited and help from vmd is needed - * EINVAL: an error occured + * EINVAL: an error occurred */ int vcpu_run_vmx(struct vcpu *vcpu, struct vm_run_params *vrp) @@ -4972,7 +4972,7 @@ svm_handle_hlt(struct vcpu *vcpu) * Handle HLT exits. HLTing the CPU with interrupts disabled will terminate * the guest (no NMIs handled) by returning EIO to vmd. * - * Paramters: + * Parameters: * vcpu: The VCPU that executed the HLT instruction * * Return Values: @@ -5383,7 +5383,7 @@ int vmx_get_exit_qualification(uint64_t *exit_qualification) { if (vmread(VMCS_GUEST_EXIT_QUALIFICATION, exit_qualification)) { - printf("%s: cant extract exit qual\n", __func__); + printf("%s: can't extract exit qual\n", __func__); return (EINVAL); } @@ -5953,7 +5953,7 @@ exit: * r: The guest's desired (incoming) cr0 value * * Return values: - * 0: if succesful + * 0: if successful * EINVAL: if an error occurred */ int @@ -6082,7 +6082,7 @@ vmx_handle_cr0_write(struct vcpu *vcpu, uint64_t r) * r: The guest's desired (incoming) cr4 value * * Return values: - * 0: if succesful + * 0: if successful * EINVAL: if an error occurred */ int @@ -6910,7 +6910,7 @@ vmm_handle_cpuid(struct vcpu *vcpu) * Return values: * 0: The run loop exited and no help is needed from vmd * EAGAIN: The run loop exited and help from vmd is needed - * EINVAL: an error occured + * EINVAL: an error occurred */ int vcpu_run_svm(struct vcpu *vcpu, struct vm_run_params *vrp) @@ -7554,7 +7554,7 @@ vcpu_state_decode(u_int state) /* * dump_vcpu * - * Dumps the VMX capabilites of vcpu 'vcpu' + * Dumps the VMX capabilities of vcpu 'vcpu' */ void dump_vcpu(struct vcpu *vcpu) diff --git a/sys/arch/amd64/include/atomic.h b/sys/arch/amd64/include/atomic.h index b337e5b6d77..6d737123e7b 100644 --- a/sys/arch/amd64/include/atomic.h +++ b/sys/arch/amd64/include/atomic.h @@ -1,4 +1,4 @@ -/* $OpenBSD: atomic.h,v 1.20 2017/05/27 20:12:12 kettenis Exp $ */ +/* $OpenBSD: atomic.h,v 1.21 2021/03/11 11:16:55 jsg Exp $ */ /* $NetBSD: atomic.h,v 1.1 2003/04/26 18:39:37 fvdl Exp $ */ /* @@ -252,7 +252,7 @@ _atomic_sub_long_nv(volatile unsigned long *p, unsigned long v) /* * The AMD64 architecture is rather strongly ordered. When accessing - * normal write-back cachable memory, only reads may be reordered with + * normal write-back cacheable memory, only reads may be reordered with * older writes to different locations. There are a few instructions * (clfush, non-temporal move instructions) that obey weaker ordering * rules, but those instructions will only be used in (inline) diff --git a/sys/arch/amd64/include/smbiosvar.h b/sys/arch/amd64/include/smbiosvar.h index d08c73984d3..c9089bde0d2 100644 --- a/sys/arch/amd64/include/smbiosvar.h +++ b/sys/arch/amd64/include/smbiosvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: smbiosvar.h,v 1.12 2020/02/20 06:12:14 jsg Exp $ */ +/* $OpenBSD: smbiosvar.h,v 1.13 2021/03/11 11:16:55 jsg Exp $ */ /* * Copyright (c) 2006 Gordon Willem Klok * Copyright (c) 2005 Jordan Hargrave @@ -38,7 +38,7 @@ /* * Section 3.5 of "UUIDs and GUIDs" found at * http://www.opengroup.org/dce/info/draft-leach-uuids-guids-01.txt - * specifies the string repersentation of a UUID. + * specifies the string representation of a UUID. */ #define SMBIOS_UUID_REP "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x" #define SMBIOS_UUID_REPLEN 37 /* 16 zero padded values, 4 hyphens, 1 null */ diff --git a/sys/arch/amd64/pci/acpipci.c b/sys/arch/amd64/pci/acpipci.c index f455c68ce3b..660ee86f7fc 100644 --- a/sys/arch/amd64/pci/acpipci.c +++ b/sys/arch/amd64/pci/acpipci.c @@ -1,4 +1,4 @@ -/* $OpenBSD: acpipci.c,v 1.5 2020/09/26 15:16:12 kettenis Exp $ */ +/* $OpenBSD: acpipci.c,v 1.6 2021/03/11 11:16:55 jsg Exp $ */ /* * Copyright (c) 2018 Mark Kettenis * @@ -196,7 +196,7 @@ acpipci_attach_bus(struct device *parent, struct acpipci_softc *sc) pba.pba_flags |= PCI_FLAGS_MSI_ENABLED; /* - * Don't enable MSI on chipsets from low-end manifacturers + * Don't enable MSI on chipsets from low-end manufacturers * like VIA and SiS. We do this by looking at the host * bridge, which should be device 0 function 0. */ diff --git a/sys/arch/amd64/pci/pci_machdep.c b/sys/arch/amd64/pci/pci_machdep.c index 5b8fd99c671..72456c32829 100644 --- a/sys/arch/amd64/pci/pci_machdep.c +++ b/sys/arch/amd64/pci/pci_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pci_machdep.c,v 1.76 2020/10/27 02:39:07 jordan Exp $ */ +/* $OpenBSD: pci_machdep.c,v 1.77 2021/03/11 11:16:55 jsg Exp $ */ /* $NetBSD: pci_machdep.c,v 1.3 2003/05/07 21:33:58 fvdl Exp $ */ /*- @@ -100,7 +100,7 @@ * Memory Mapped Configuration space access. * * Since mapping the whole configuration space will cost us up to - * 256MB of kernel virtual memory, we use seperate mappings per bus. + * 256MB of kernel virtual memory, we use separate mappings per bus. * The mappings are created on-demand, such that we only use kernel * virtual memory for busses that are actually present. */ diff --git a/sys/arch/amd64/stand/efi32/efipxe.c b/sys/arch/amd64/stand/efi32/efipxe.c index 5bf8c3b0d09..f8dd6af5883 100644 --- a/sys/arch/amd64/stand/efi32/efipxe.c +++ b/sys/arch/amd64/stand/efi32/efipxe.c @@ -1,4 +1,4 @@ -/* $OpenBSD: efipxe.c,v 1.5 2020/12/09 18:10:18 krw Exp $ */ +/* $OpenBSD: efipxe.c,v 1.6 2021/03/11 11:16:55 jsg Exp $ */ /* * Copyright (c) 2017 Patrick Wildt * @@ -44,7 +44,7 @@ extern int efi_device_path_ncmp(EFI_DEVICE_PATH *, EFI_DEVICE_PATH *, int); /* * TFTP initial probe. This function discovers PXE handles and tries - * to figure out if there has already been a successfull PXE handshake. + * to figure out if there has already been a successful PXE handshake. * If so, set the PXE variable. */ void diff --git a/sys/arch/amd64/stand/efi64/efipxe.c b/sys/arch/amd64/stand/efi64/efipxe.c index 5bf8c3b0d09..f8dd6af5883 100644 --- a/sys/arch/amd64/stand/efi64/efipxe.c +++ b/sys/arch/amd64/stand/efi64/efipxe.c @@ -1,4 +1,4 @@ -/* $OpenBSD: efipxe.c,v 1.5 2020/12/09 18:10:18 krw Exp $ */ +/* $OpenBSD: efipxe.c,v 1.6 2021/03/11 11:16:55 jsg Exp $ */ /* * Copyright (c) 2017 Patrick Wildt * @@ -44,7 +44,7 @@ extern int efi_device_path_ncmp(EFI_DEVICE_PATH *, EFI_DEVICE_PATH *, int); /* * TFTP initial probe. This function discovers PXE handles and tries - * to figure out if there has already been a successfull PXE handshake. + * to figure out if there has already been a successful PXE handshake. * If so, set the PXE variable. */ void diff --git a/sys/arch/amd64/stand/efiboot/efipxe.c b/sys/arch/amd64/stand/efiboot/efipxe.c index e21d0444854..5cca69abae3 100644 --- a/sys/arch/amd64/stand/efiboot/efipxe.c +++ b/sys/arch/amd64/stand/efiboot/efipxe.c @@ -1,4 +1,4 @@ -/* $OpenBSD: efipxe.c,v 1.8 2020/12/09 18:10:18 krw Exp $ */ +/* $OpenBSD: efipxe.c,v 1.9 2021/03/11 11:16:55 jsg Exp $ */ /* * Copyright (c) 2017 Patrick Wildt * @@ -44,7 +44,7 @@ extern int efi_device_path_ncmp(EFI_DEVICE_PATH *, EFI_DEVICE_PATH *, int); /* * TFTP initial probe. This function discovers PXE handles and tries - * to figure out if there has already been a successfull PXE handshake. + * to figure out if there has already been a successful PXE handshake. * If so, set the PXE variable. */ void diff --git a/sys/arch/amd64/stand/libsa/exec_i386.c b/sys/arch/amd64/stand/libsa/exec_i386.c index 70efee2e9fd..be4a3396a88 100644 --- a/sys/arch/amd64/stand/libsa/exec_i386.c +++ b/sys/arch/amd64/stand/libsa/exec_i386.c @@ -1,4 +1,4 @@ -/* $OpenBSD: exec_i386.c,v 1.32 2019/06/08 02:52:20 jsg Exp $ */ +/* $OpenBSD: exec_i386.c,v 1.33 2021/03/11 11:16:55 jsg Exp $ */ /* * Copyright (c) 1997-1998 Michael Shalayeff @@ -297,7 +297,7 @@ boot_alloc(void) * [entry ... end] => PA 0x1000000 (16MB, the current phys loadaddr) * * In BIOS boot mode, this function overwrites the heap with the long - * mode kernel boostrap page tables and thus must be called immediately + * mode kernel bootstrap page tables and thus must be called immediately * before switching to long mode and starting the kernel. * * Parameters: diff --git a/sys/arch/arm/arm/cpu.c b/sys/arch/arm/arm/cpu.c index 7ae3e6e8e33..64b9615444c 100644 --- a/sys/arch/arm/arm/cpu.c +++ b/sys/arch/arm/arm/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.53 2020/01/12 16:55:00 kettenis Exp $ */ +/* $OpenBSD: cpu.c,v 1.54 2021/03/11 11:16:55 jsg Exp $ */ /* $NetBSD: cpu.c,v 1.56 2004/04/14 04:01:49 bsh Exp $ */ @@ -688,7 +688,7 @@ cpu_opp_init_legacy(struct cpu_info *ci) cooling_device_register(cd); /* - * Do addional checks at mountroot when all the clocks and + * Do additional checks at mountroot when all the clocks and * regulators are available. */ config_mountroot(ci->ci_dev, cpu_opp_mountroot); @@ -776,7 +776,7 @@ cpu_opp_init(struct cpu_info *ci, uint32_t phandle) cooling_device_register(cd); /* - * Do addional checks at mountroot when all the clocks and + * Do additional checks at mountroot when all the clocks and * regulators are available. */ config_mountroot(ci->ci_dev, cpu_opp_mountroot); diff --git a/sys/arch/arm/arm/pmap7.c b/sys/arch/arm/arm/pmap7.c index 2023484194b..aeeed0597d5 100644 --- a/sys/arch/arm/arm/pmap7.c +++ b/sys/arch/arm/arm/pmap7.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap7.c,v 1.59 2019/12/19 17:53:27 mpi Exp $ */ +/* $OpenBSD: pmap7.c,v 1.60 2021/03/11 11:16:55 jsg Exp $ */ /* $NetBSD: pmap.c,v 1.147 2004/01/18 13:03:50 scw Exp $ */ /* @@ -1891,7 +1891,7 @@ pmap_reference(pmap_t pm) * pmap_zero_page() * * Zero a given physical page by mapping it at a page hook point. - * In doing the zero page op, the page we zero is mapped cachable, as with + * In doing the zero page op, the page we zero is mapped cacheable, as with * StrongARM accesses to non-cached pages are non-burst making writing * _any_ bulk data very slow. */ @@ -2500,7 +2500,7 @@ pmap_postinit(void) * find them as necessary. * * Note that the data on this list MUST remain valid after initarm() returns, - * as pmap_bootstrap() uses it to contruct L2 table metadata. + * as pmap_bootstrap() uses it to construct L2 table metadata. */ SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list); diff --git a/sys/arch/arm/include/pte.h b/sys/arch/arm/include/pte.h index 53b6cc8831f..7f88cd18ab2 100644 --- a/sys/arch/arm/include/pte.h +++ b/sys/arch/arm/include/pte.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pte.h,v 1.9 2017/01/04 00:40:49 jsg Exp $ */ +/* $OpenBSD: pte.h,v 1.10 2021/03/11 11:16:55 jsg Exp $ */ /* $NetBSD: pte.h,v 1.6 2003/04/18 11:08:28 scw Exp $ */ /* @@ -205,7 +205,7 @@ typedef uint32_t pt_entry_t; /* L2 table entry */ #define L2_V7_AP(x) ((((x) & 0x4) << 7) | (((x) & 0x2) << 4)) /* AP */ #define L2_V7_AF 0x00000010 /* Access Flag */ -#define L2_V7_S 0x00000400 /* Sharable */ +#define L2_V7_S 0x00000400 /* Shareable */ #define L2_V7_nG 0x00000800 /* not Global */ /* diff --git a/sys/arch/arm64/arm64/cpu.c b/sys/arch/arm64/arm64/cpu.c index 0af10fd77af..6fa7d332484 100644 --- a/sys/arch/arm64/arm64/cpu.c +++ b/sys/arch/arm64/arm64/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.50 2021/03/09 19:43:04 kettenis Exp $ */ +/* $OpenBSD: cpu.c,v 1.51 2021/03/11 11:16:55 jsg Exp $ */ /* * Copyright (c) 2016 Dale Rahn @@ -891,7 +891,7 @@ cpu_opp_init(struct cpu_info *ci, uint32_t phandle) cooling_device_register(cd); /* - * Do addional checks at mountroot when all the clocks and + * Do additional checks at mountroot when all the clocks and * regulators are available. */ config_mountroot(ci->ci_dev, cpu_opp_mountroot); diff --git a/sys/arch/arm64/arm64/db_interface.c b/sys/arch/arm64/arm64/db_interface.c index 5119eccb0de..5ff6ff6bfb1 100644 --- a/sys/arch/arm64/arm64/db_interface.c +++ b/sys/arch/arm64/arm64/db_interface.c @@ -1,4 +1,4 @@ -/* $OpenBSD: db_interface.c,v 1.8 2019/11/07 14:44:52 mpi Exp $ */ +/* $OpenBSD: db_interface.c,v 1.9 2021/03/11 11:16:55 jsg Exp $ */ /* $NetBSD: db_interface.c,v 1.34 2003/10/26 23:11:15 chris Exp $ */ /* @@ -512,6 +512,6 @@ db_machine_init(void) vaddr_t db_branch_taken(u_int insn, vaddr_t pc, db_regs_t *db_regs) { - // implment + /* implement */ return pc + 4; } diff --git a/sys/arch/arm64/arm64/intr.c b/sys/arch/arm64/arm64/intr.c index b840d3d85c9..bca105bdc1d 100644 --- a/sys/arch/arm64/arm64/intr.c +++ b/sys/arch/arm64/arm64/intr.c @@ -1,4 +1,4 @@ -/* $OpenBSD: intr.c,v 1.20 2021/02/17 12:11:44 kettenis Exp $ */ +/* $OpenBSD: intr.c,v 1.21 2021/03/11 11:16:55 jsg Exp $ */ /* * Copyright (c) 2011 Dale Rahn * @@ -849,7 +849,7 @@ void setstatclockrate(int new) { if (arm_clock_func.setstatclockrate == NULL) { - panic("arm_clock_func.setstatclockrate not intialized"); + panic("arm_clock_func.setstatclockrate not initialized"); } arm_clock_func.setstatclockrate(new); } diff --git a/sys/arch/arm64/arm64/machdep.c b/sys/arch/arm64/arm64/machdep.c index be9969b6ad7..7021d8186df 100644 --- a/sys/arch/arm64/arm64/machdep.c +++ b/sys/arch/arm64/arm64/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.58 2021/02/16 12:33:22 kettenis Exp $ */ +/* $OpenBSD: machdep.c,v 1.59 2021/03/11 11:16:55 jsg Exp $ */ /* * Copyright (c) 2014 Patrick Wildt * @@ -977,7 +977,7 @@ initarm(struct arm64_bootparams *abp) end = MIN(reg.addr + reg.size, (paddr_t)-PAGE_SIZE); /* - * The intial 64MB block is not excluded, so we need + * The initial 64MB block is not excluded, so we need * to make sure we don't add it here. */ if (start < memend && end > memstart) { diff --git a/sys/arch/arm64/arm64/pmap.c b/sys/arch/arm64/arm64/pmap.c index 3402f223fe0..8c79446f5ee 100644 --- a/sys/arch/arm64/arm64/pmap.c +++ b/sys/arch/arm64/arm64/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.73 2021/03/08 11:16:26 kettenis Exp $ */ +/* $OpenBSD: pmap.c,v 1.74 2021/03/11 11:16:55 jsg Exp $ */ /* * Copyright (c) 2008-2009,2014-2016 Dale Rahn * @@ -556,7 +556,7 @@ PTED_VALID(struct pte_desc *pted) * One issue of making this a single data structure is that two pointers are * wasted for every page which does not map ram (device mappings), this * should be a low percentage of mapped pages in the system, so should not - * have too noticable unnecessary ram consumption. + * have too noticeable unnecessary ram consumption. */ void @@ -1888,7 +1888,7 @@ pmap_fault_fixup(pmap_t pm, vaddr_t va, vm_prot_t ftype) /* * Exec always includes a reference. Since we now know - * the page has been accesed, we can enable read as well + * the page has been accessed, we can enable read as well * if UVM allows it. */ atomic_setbits_int(&pg->pg_flags, PG_PMAP_REF); diff --git a/sys/arch/arm64/dev/agtimer.c b/sys/arch/arm64/dev/agtimer.c index f121e071c6f..633a62c2f19 100644 --- a/sys/arch/arm64/dev/agtimer.c +++ b/sys/arch/arm64/dev/agtimer.c @@ -1,4 +1,4 @@ -/* $OpenBSD: agtimer.c,v 1.17 2021/02/23 04:44:30 cheloha Exp $ */ +/* $OpenBSD: agtimer.c,v 1.18 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2011 Dale Rahn * Copyright (c) 2013 Patrick Wildt @@ -315,7 +315,7 @@ agtimer_cpu_initclocks(void) sc->sc_ticks_err_cnt = sc->sc_ticks_per_second % hz; pc->pc_ticks_err_sum = 0; - /* configure virtual timer interupt */ + /* configure virtual timer interrupt */ sc->sc_ih = arm_intr_establish_fdt_idx(sc->sc_node, 2, IPL_CLOCK|IPL_MPSAFE, agtimer_intr, NULL, "tick"); diff --git a/sys/arch/arm64/dev/efi.c b/sys/arch/arm64/dev/efi.c index e93c055a82a..4d885a64b95 100644 --- a/sys/arch/arm64/dev/efi.c +++ b/sys/arch/arm64/dev/efi.c @@ -1,4 +1,4 @@ -/* $OpenBSD: efi.c,v 1.8 2020/07/04 13:01:16 kettenis Exp $ */ +/* $OpenBSD: efi.c,v 1.9 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2017 Mark Kettenis @@ -140,7 +140,7 @@ efi_attach(struct device *parent, struct device *self, void *aux) /* * Normal memory is expected to be "write - * back" cachable. Everything else is mapped + * back" cacheable. Everything else is mapped * as device memory. */ if ((desc->Attribute & EFI_MEMORY_WB) == 0) diff --git a/sys/arch/arm64/include/armreg.h b/sys/arch/arm64/include/armreg.h index d94ea7af4b8..4f2e805520f 100644 --- a/sys/arch/arm64/include/armreg.h +++ b/sys/arch/arm64/include/armreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: armreg.h,v 1.13 2020/10/18 12:03:51 kettenis Exp $ */ +/* $OpenBSD: armreg.h,v 1.14 2021/03/11 11:16:56 jsg Exp $ */ /*- * Copyright (c) 2013, 2014 Andrew Turner * Copyright (c) 2015 The FreeBSD Foundation @@ -583,7 +583,7 @@ #define DBG_MDSCR_KDE (0x1 << 13) #define DBG_MDSCR_MDE (0x1 << 15) -/* Perfomance Monitoring Counters */ +/* Performance Monitoring Counters */ #define PMCR_E (1 << 0) /* Enable all counters */ #define PMCR_P (1 << 1) /* Reset all counters */ #define PMCR_C (1 << 2) /* Clock counter reset */ diff --git a/sys/arch/arm64/include/smbiosvar.h b/sys/arch/arm64/include/smbiosvar.h index 822f420a8fa..63b874abc29 100644 --- a/sys/arch/arm64/include/smbiosvar.h +++ b/sys/arch/arm64/include/smbiosvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: smbiosvar.h,v 1.4 2020/02/20 06:12:14 jsg Exp $ */ +/* $OpenBSD: smbiosvar.h,v 1.5 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2006 Gordon Willem Klok * Copyright (c) 2005 Jordan Hargrave @@ -35,7 +35,7 @@ /* * Section 3.5 of "UUIDs and GUIDs" found at * http://www.opengroup.org/dce/info/draft-leach-uuids-guids-01.txt - * specifies the string repersentation of a UUID. + * specifies the string representation of a UUID. */ #define SMBIOS_UUID_REP "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x" #define SMBIOS_UUID_REPLEN 37 /* 16 zero padded values, 4 hyphens, 1 null */ diff --git a/sys/arch/arm64/stand/efiboot/efiacpi.c b/sys/arch/arm64/stand/efiboot/efiacpi.c index 87fff89a074..4256a7fbfdb 100644 --- a/sys/arch/arm64/stand/efiboot/efiacpi.c +++ b/sys/arch/arm64/stand/efiboot/efiacpi.c @@ -1,4 +1,4 @@ -/* $OpenBSD: efiacpi.c,v 1.9 2020/12/06 17:57:03 kettenis Exp $ */ +/* $OpenBSD: efiacpi.c,v 1.10 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2018 Mark Kettenis @@ -132,7 +132,7 @@ struct acpi_fadt { uint8_t s4bios_req; /* value for S4 */ uint8_t pstate_cnt; /* value for performance (hdr_revision > 2) */ uint32_t pm1a_evt_blk; /* power management 1a */ - uint32_t pm1b_evt_blk; /* power mangement 1b */ + uint32_t pm1b_evt_blk; /* power management 1b */ uint32_t pm1a_cnt_blk; /* pm control 1a */ uint32_t pm1b_cnt_blk; /* pm control 1b */ uint32_t pm2_cnt_blk; /* pm control 2 */ diff --git a/sys/arch/arm64/stand/efiboot/efipxe.c b/sys/arch/arm64/stand/efiboot/efipxe.c index f8f2384c3ba..6c428fd3d9d 100644 --- a/sys/arch/arm64/stand/efiboot/efipxe.c +++ b/sys/arch/arm64/stand/efiboot/efipxe.c @@ -1,4 +1,4 @@ -/* $OpenBSD: efipxe.c,v 1.9 2020/12/09 18:10:18 krw Exp $ */ +/* $OpenBSD: efipxe.c,v 1.10 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2017 Patrick Wildt * @@ -66,7 +66,7 @@ void efinet_end(struct netif *); /* * TFTP initial probe. This function discovers PXE handles and tries - * to figure out if there has already been a successfull PXE handshake. + * to figure out if there has already been a successful PXE handshake. * If so, set the PXE variable. */ void diff --git a/sys/arch/arm64/stand/efiboot/fdt.c b/sys/arch/arm64/stand/efiboot/fdt.c index 7f9f0a2f2bd..48b4ba8f178 100644 --- a/sys/arch/arm64/stand/efiboot/fdt.c +++ b/sys/arch/arm64/stand/efiboot/fdt.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fdt.c,v 1.4 2018/08/25 10:41:38 kettenis Exp $ */ +/* $OpenBSD: fdt.c,v 1.5 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2009 Dariusz Swiderski @@ -550,7 +550,7 @@ fdt_node_is_compatible(void *node, const char *name) #ifdef DEBUG /* - * Debug methods for printing whole tree, particular odes and properies + * Debug methods for printing whole tree, particular nodes and properties */ void * fdt_print_property(void *node, int level) diff --git a/sys/arch/armv7/armv7/armv7_machdep.c b/sys/arch/armv7/armv7/armv7_machdep.c index 1a5418cbf58..441c0690f8a 100644 --- a/sys/arch/armv7/armv7/armv7_machdep.c +++ b/sys/arch/armv7/armv7/armv7_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: armv7_machdep.c,v 1.61 2020/05/31 06:23:57 dlg Exp $ */ +/* $OpenBSD: armv7_machdep.c,v 1.62 2021/03/11 11:16:56 jsg Exp $ */ /* $NetBSD: lubbock_machdep.c,v 1.2 2003/07/15 00:25:06 lukem Exp $ */ /* @@ -494,7 +494,7 @@ initarm(void *arg0, void *arg1, void *arg2, paddr_t loadaddr) * array. * * The kernel page directory must be on a 16K boundary. The page - * tables must be on 4K bounaries. What we do is allocate the + * tables must be on 4K boundaries. What we do is allocate the * page directory on the first 16K boundary that we encounter, and * the page tables on 4K boundaries otherwise. Since we allocate * at least 3 L2 page tables, we are guaranteed to encounter at @@ -729,7 +729,7 @@ initarm(void *arg0, void *arg1, void *arg2, paddr_t loadaddr) * Until then we will use a handler that just panics but tells us * why. * Initialisation of the vectors will just panic on a data abort. - * This just fills in a slighly better one. + * This just fills in a slightly better one. */ data_abort_handler_address = (u_int)data_abort_handler; @@ -802,7 +802,7 @@ initarm(void *arg0, void *arg1, void *arg2, paddr_t loadaddr) end = MIN(reg.addr + reg.size, (paddr_t)-PAGE_SIZE); /* - * The intial 32MB block is not excluded, so we need + * The initial 32MB block is not excluded, so we need * to make sure we don't add it here. */ if (start < memend && end > memstart) { diff --git a/sys/arch/armv7/armv7/intr.c b/sys/arch/armv7/armv7/intr.c index 97ec595c7d8..12986ce4d0b 100644 --- a/sys/arch/armv7/armv7/intr.c +++ b/sys/arch/armv7/armv7/intr.c @@ -1,4 +1,4 @@ -/* $OpenBSD: intr.c,v 1.18 2020/07/14 15:34:14 patrick Exp $ */ +/* $OpenBSD: intr.c,v 1.19 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2011 Dale Rahn * @@ -874,7 +874,7 @@ void setstatclockrate(int new) { if (arm_clock_func.setstatclockrate == NULL) { - panic("arm_clock_func.setstatclockrate not intialized"); + panic("arm_clock_func.setstatclockrate not initialized"); } arm_clock_func.setstatclockrate(new); } diff --git a/sys/arch/armv7/exynos/ec_commands.h b/sys/arch/armv7/exynos/ec_commands.h index e22a50275eb..4671c997ff1 100644 --- a/sys/arch/armv7/exynos/ec_commands.h +++ b/sys/arch/armv7/exynos/ec_commands.h @@ -256,7 +256,7 @@ struct ec_lpc_host_args { * If EC gets a command and this flag is not set, this is an old-style command. * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with * unknown length. EC must respond with an old-style response (that is, - * withouth setting EC_HOST_ARGS_FLAG_TO_HOST). + * without setting EC_HOST_ARGS_FLAG_TO_HOST). */ #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 /* diff --git a/sys/arch/armv7/exynos/exiic.c b/sys/arch/armv7/exynos/exiic.c index 446962b1b4f..0a1ea26216f 100644 --- a/sys/arch/armv7/exynos/exiic.c +++ b/sys/arch/armv7/exynos/exiic.c @@ -47,7 +47,7 @@ #define I2C_STAT_LAST_RVCD_BIT (0x1 << 0) /* last received bit 0 => ack, 1 => no ack */ #define I2C_STAT_ADDR_ZERO_FLAG (0x1 << 1) /* 0 => start/stop cond. detected, 1 => received slave addr 0xb */ #define I2C_STAT_ADDR_SLAVE_ZERO_FLAG (0x1 << 2) /* 0 => start/stop cond. detected, 1 => received slave addr matches i2cadd */ -#define I2C_STAT_ARBITRATION (0x1 << 3) /* 0 => successul, 1 => failed */ +#define I2C_STAT_ARBITRATION (0x1 << 3) /* 0 => successful, 1 => failed */ #define I2C_STAT_SERIAL_OUTPUT (0x1 << 4) /* 0 => disable tx/rx, 1 => enable tx/rx */ #define I2C_STAT_BUSY_SIGNAL (0x1 << 5) /* 0 => not busy / stop signal generation, 1 => busy / start signal generation */ #define I2C_STAT_MODE_SEL_SLAVE_RX (0x0 << 6) /* slave receive mode */ diff --git a/sys/arch/armv7/omap/amdisplay.c b/sys/arch/armv7/omap/amdisplay.c index eed93564ab8..f25f8573e9e 100644 --- a/sys/arch/armv7/omap/amdisplay.c +++ b/sys/arch/armv7/omap/amdisplay.c @@ -1,4 +1,4 @@ -/* $OpenBSD: amdisplay.c,v 1.13 2021/01/19 18:04:43 kettenis Exp $ */ +/* $OpenBSD: amdisplay.c,v 1.14 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2016 Ian Sutton * @@ -290,7 +290,7 @@ amdisplay_attach(struct device *parent, struct device *self, void *args) reg |= LCD_CTRL_MODESEL; HWRITE4(sc, LCD_CTRL, reg); - /* set stn565 + active matrix + pallete loading only mode, delay */ + /* set stn565 + active matrix + palette loading only mode, delay */ reg = HREAD4(sc, LCD_RASTER_CTRL); reg &= 0xF8000C7C; reg |= (LCD_RASTER_CTRL_LCDTFT) diff --git a/sys/arch/armv7/omap/if_cpsw.c b/sys/arch/armv7/omap/if_cpsw.c index 2d8dfc29a7b..a130507cbf1 100644 --- a/sys/arch/armv7/omap/if_cpsw.c +++ b/sys/arch/armv7/omap/if_cpsw.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_cpsw.c,v 1.49 2020/07/10 13:26:36 patrick Exp $ */ +/* $OpenBSD: if_cpsw.c,v 1.50 2021/03/11 11:16:56 jsg Exp $ */ /* $NetBSD: if_cpsw.c,v 1.3 2013/04/17 14:36:34 bouyer Exp $ */ /* @@ -291,7 +291,7 @@ cpsw_mdio_init(struct cpsw_softc *sc) sc->sc_active_port = 0; - /* Initialze MDIO - ENABLE, PREAMBLE=0, FAULTENB, CLKDIV=0xFF */ + /* Initialize MDIO - ENABLE, PREAMBLE=0, FAULTENB, CLKDIV=0xFF */ /* TODO Calculate MDCLK=CLK/(CLKDIV+1) */ bus_space_write_4(sc->sc_bst, sc->sc_bsh, MDIOCONTROL, (1<<30) | (1<<18) | 0xFF); diff --git a/sys/arch/armv7/omap/omehci.c b/sys/arch/armv7/omap/omehci.c index 718d38510c5..3ae6da8c2ca 100644 --- a/sys/arch/armv7/omap/omehci.c +++ b/sys/arch/armv7/omap/omehci.c @@ -1,4 +1,4 @@ -/* $OpenBSD: omehci.c,v 1.6 2020/06/02 03:16:34 jsg Exp $ */ +/* $OpenBSD: omehci.c,v 1.7 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2005 David Gwynne @@ -252,7 +252,7 @@ omehci_init(struct omehci_softc *sc) sc->ehci_rev = bus_space_read_4(sc->sc.iot, sc->uhh_ioh, OMAP_USBHOST_UHH_REVISION); - /* Initilise the low level interface module(s) */ + /* Initialise the low level interface module(s) */ if (sc->ehci_rev == OMAP_EHCI_REV1) { /* Enable the USB TLL */ prcm_enablemodule(PRCM_USBTLL); diff --git a/sys/arch/armv7/stand/efiboot/efipxe.c b/sys/arch/armv7/stand/efiboot/efipxe.c index bb3525ff9e7..26a1db27787 100644 --- a/sys/arch/armv7/stand/efiboot/efipxe.c +++ b/sys/arch/armv7/stand/efiboot/efipxe.c @@ -1,4 +1,4 @@ -/* $OpenBSD: efipxe.c,v 1.6 2020/12/09 18:10:18 krw Exp $ */ +/* $OpenBSD: efipxe.c,v 1.7 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2017 Patrick Wildt * @@ -66,7 +66,7 @@ void efinet_end(struct netif *); /* * TFTP initial probe. This function discovers PXE handles and tries - * to figure out if there has already been a successfull PXE handshake. + * to figure out if there has already been a successful PXE handshake. * If so, set the PXE variable. */ void diff --git a/sys/arch/armv7/stand/efiboot/fdt.c b/sys/arch/armv7/stand/efiboot/fdt.c index df353f696a3..53bc8eca772 100644 --- a/sys/arch/armv7/stand/efiboot/fdt.c +++ b/sys/arch/armv7/stand/efiboot/fdt.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fdt.c,v 1.6 2019/10/25 10:06:40 kettenis Exp $ */ +/* $OpenBSD: fdt.c,v 1.7 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2009 Dariusz Swiderski @@ -550,7 +550,7 @@ fdt_node_is_compatible(void *node, const char *name) #ifdef DEBUG /* - * Debug methods for printing whole tree, particular odes and properies + * Debug methods for printing whole tree, particular nodes and properties */ void * fdt_print_property(void *node, int level) diff --git a/sys/arch/armv7/sunxi/sxie.c b/sys/arch/armv7/sunxi/sxie.c index 145545d3031..97c067c4c70 100644 --- a/sys/arch/armv7/sunxi/sxie.c +++ b/sys/arch/armv7/sunxi/sxie.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sxie.c,v 1.30 2021/02/25 02:48:19 dlg Exp $ */ +/* $OpenBSD: sxie.c,v 1.31 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2012-2013 Patrick Wildt * Copyright (c) 2013 Artturi Alm @@ -16,7 +16,7 @@ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -/* TODO this should use dedicated dma for RX, atleast */ +/* TODO this should use dedicated dma for RX, at least */ #include #include diff --git a/sys/arch/hppa/dev/viper.h b/sys/arch/hppa/dev/viper.h index 99fb65c8a99..17c28fa2ebc 100644 --- a/sys/arch/hppa/dev/viper.h +++ b/sys/arch/hppa/dev/viper.h @@ -1,4 +1,4 @@ -/* $OpenBSD: viper.h,v 1.6 2007/04/10 17:47:54 miod Exp $ */ +/* $OpenBSD: viper.h,v 1.7 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 1991,1994 The University of Utah and @@ -118,7 +118,7 @@ struct vi_trs { ** Viper also creates HPA registers for the graphics accelerator (Venom). ** Venom has two sets of resisters; the User HPA contains registers that ** users are allowed to access, while the Supervisor HPA is only accessible -** by code running at the most priviliged level. Both sets of registers +** by code running at the most privileged level. Both sets of registers ** are defined below. */ @@ -129,7 +129,7 @@ struct vi_trs { * Define bits in the Venom "User Control" register. */ struct vnu_ctl { - u_int sdt_msk :16, /* screen door transparancy mask */ + u_int sdt_msk :16, /* screen door transparency mask */ : 6, d_z_intp: 1, /* disable Z Interpolation when set */ d_c_intp: 1, /* disable Color Interpolation when set */ diff --git a/sys/arch/hppa/hppa/intr.c b/sys/arch/hppa/hppa/intr.c index 440072600a9..7660b3e0493 100644 --- a/sys/arch/hppa/hppa/intr.c +++ b/sys/arch/hppa/hppa/intr.c @@ -1,4 +1,4 @@ -/* $OpenBSD: intr.c,v 1.50 2018/05/14 13:54:39 kettenis Exp $ */ +/* $OpenBSD: intr.c,v 1.51 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 2002-2004 Michael Shalayeff @@ -120,7 +120,7 @@ cpu_intr_init(void) for (level = 0; level < NIPL - 1; level++) imask[level + 1] |= imask[level]; - /* XXX the whacky trick is to prevent hardclock from happenning */ + /* XXX the whacky trick is to prevent hardclock from happening */ mfctl(CR_ITMR, mask); mtctl(mask - 1, CR_ITMR); diff --git a/sys/arch/hppa/hppa/machdep.c b/sys/arch/hppa/hppa/machdep.c index 6ead622364f..fa373acfc3e 100644 --- a/sys/arch/hppa/hppa/machdep.c +++ b/sys/arch/hppa/hppa/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.263 2021/01/09 18:03:19 kettenis Exp $ */ +/* $OpenBSD: machdep.c,v 1.264 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 1999-2003 Michael Shalayeff @@ -944,7 +944,7 @@ doreset: /* ask firmware to reset */ pdc_call((iodcio_t)pdc, 0, PDC_BROADCAST_RESET, PDC_DO_RESET); - /* forcably reset module if that fails */ + /* forcibly reset module if that fails */ __asm volatile(".export hppa_reset, entry\n\t" ".label hppa_reset"); __asm volatile("stwas %0, 0(%1)" diff --git a/sys/arch/hppa/hppa/mainbus.c b/sys/arch/hppa/hppa/mainbus.c index 697297f57e5..f3019e4e430 100644 --- a/sys/arch/hppa/hppa/mainbus.c +++ b/sys/arch/hppa/hppa/mainbus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: mainbus.c,v 1.88 2018/05/14 13:54:39 kettenis Exp $ */ +/* $OpenBSD: mainbus.c,v 1.89 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 1998-2004 Michael Shalayeff @@ -178,7 +178,7 @@ mbus_add_mapping(bus_addr_t bpa, bus_size_t size, int flags, #ifdef DEBUG if (flags & BUS_SPACE_MAP_CACHEABLE) { - printf("WARNING: mapping I/O space cachable\n"); + printf("WARNING: mapping I/O space cacheable\n"); flags &= ~BUS_SPACE_MAP_CACHEABLE; } #endif diff --git a/sys/arch/hppa/hppa/trap.c b/sys/arch/hppa/hppa/trap.c index dcd2ba21e3c..830a23e0462 100644 --- a/sys/arch/hppa/hppa/trap.c +++ b/sys/arch/hppa/hppa/trap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.c,v 1.152 2020/10/22 13:41:51 deraadt Exp $ */ +/* $OpenBSD: trap.c,v 1.153 2021/03/11 11:16:56 jsg Exp $ */ /* * Copyright (c) 1998-2004 Michael Shalayeff @@ -695,7 +695,7 @@ ss_put_value(struct proc *p, vaddr_t addr, u_int value) void ss_clear_breakpoints(struct proc *p) { - /* Restore origional instructions. */ + /* Restore original instructions. */ if (p->p_md.md_bpva != 0) { ss_put_value(p, p->p_md.md_bpva, p->p_md.md_bpsave[0]); ss_put_value(p, p->p_md.md_bpva + 4, p->p_md.md_bpsave[1]); diff --git a/sys/arch/hppa/include/autoconf.h b/sys/arch/hppa/include/autoconf.h index 37d8c28a1ce..ec039843951 100644 --- a/sys/arch/hppa/include/autoconf.h +++ b/sys/arch/hppa/include/autoconf.h @@ -1,4 +1,4 @@ -/* $OpenBSD: autoconf.h,v 1.23 2010/04/29 13:48:29 jsing Exp $ */ +/* $OpenBSD: autoconf.h,v 1.24 2021/03/11 11:16:57 jsg Exp $ */ /* * Copyright (c) 1998-2004 Michael Shalayeff @@ -38,7 +38,7 @@ struct confargs { u_int ca_hpasz; /* module HPA size (if avail) */ hppa_hpa_t ca_hpamask; /* mask for modules on the bus */ int ca_irq; /* module IRQ */ - struct iodc_data ca_type; /* iodc-specific type descrition */ + struct iodc_data ca_type; /* iodc-specific type description */ struct pdc_iodc_read *ca_pdc_iodc_read; int ca_naddrs; /* number of valid addr ents */ struct { diff --git a/sys/arch/hppa/include/pdc.h b/sys/arch/hppa/include/pdc.h index 7c878b79325..da12960506d 100644 --- a/sys/arch/hppa/include/pdc.h +++ b/sys/arch/hppa/include/pdc.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pdc.h,v 1.36 2013/03/23 16:12:22 deraadt Exp $ */ +/* $OpenBSD: pdc.h,v 1.37 2021/03/11 11:16:57 jsg Exp $ */ /* * Copyright (c) 1990 mt Xinu, Inc. All rights reserved. @@ -124,7 +124,7 @@ #define PDC_MODEL_ENSPEC 4 /* enable product-specific instrs */ #define PDC_MODEL_DISPEC 5 /* disable product-specific instrs */ #define PDC_MODEL_CPUID 6 /* return CPU versions */ -#define PDC_MODEL_CPBALITIES 7 /* return capabilites */ +#define PDC_MODEL_CPBALITIES 7 /* return capabilities */ #define PDC_MODEL_GETBOOTOPTS 8 /* return boot test options */ #define PDC_MODEL_SETBOOTOPTS 9 /* set boot test options */ @@ -208,7 +208,7 @@ #define PDC_CONF 17 /* (de)configure a module */ #define PDC_CONF_DECONF 0 /* deconfigure module */ #define PDC_CONF_RECONF 1 /* reconfigure module */ -#define PDC_CONF_INFO 2 /* get config informaion */ +#define PDC_CONF_INFO 2 /* get config information */ #define PDC_BLOCK_TLB 18 /* Manage Block TLB entries (BTLB) */ #define PDC_BTLB_DEFAULT 0 /* Return BTLB configuration info */ diff --git a/sys/arch/hppa/include/psl.h b/sys/arch/hppa/include/psl.h index ca23549aea1..e58327b0257 100644 --- a/sys/arch/hppa/include/psl.h +++ b/sys/arch/hppa/include/psl.h @@ -1,4 +1,4 @@ -/* $OpenBSD: psl.h,v 1.10 2004/09/14 22:41:20 mickey Exp $ */ +/* $OpenBSD: psl.h,v 1.11 2021/03/11 11:16:57 jsg Exp $ */ /* * Copyright (c) 1999-2004 Michael Shalayeff @@ -30,7 +30,7 @@ #define _MACHINE_PSL_H_ /* - * Rference: + * Reference: * 1. PA-RISC 1.1 Architecture and Instruction Set Manual * Hewlett Packard, 3rd Edition, February 1994; Part Number 09740-90039 */ @@ -88,7 +88,7 @@ #define PSL_CB (1 << (31-PSL_CB_POS)) /* Carry/Borrow Bits */ #define PSL_O (1 << (31-PSL_O_POS)) /* Force strong ordering (2.0) */ #define PSL_G (1 << (31-PSL_G_POS)) /* Debug Trap Enable */ -#define PSL_F (1 << (31-PSL_F_POS)) /* Perfomance Monitor Interrupt Unmask */ +#define PSL_F (1 << (31-PSL_F_POS)) /* Performance Monitor Interrupt Unmask */ #define PSL_R (1 << (31-PSL_R_POS)) /* Recover Counter Enable */ #define PSL_Q (1 << (31-PSL_Q_POS)) /* Interrupt State Collection Enable */ #define PSL_P (1 << (31-PSL_P_POS)) /* Protection Identifier Validation Enable */ diff --git a/sys/arch/hppa/spmath/dbl_float.h b/sys/arch/hppa/spmath/dbl_float.h index 2e62248f03f..369f0c882ce 100644 --- a/sys/arch/hppa/spmath/dbl_float.h +++ b/sys/arch/hppa/spmath/dbl_float.h @@ -1,4 +1,4 @@ -/* $OpenBSD: dbl_float.h,v 1.12 2013/11/26 20:33:12 deraadt Exp $ */ +/* $OpenBSD: dbl_float.h,v 1.13 2021/03/11 11:16:57 jsg Exp $ */ /* (c) Copyright 1986 HEWLETT-PACKARD COMPANY To anyone who acknowledges that this file is provided "AS IS" @@ -18,7 +18,7 @@ * Declare double precision functions * **************************************/ -/* 32-bit word grabing functions */ +/* 32-bit word grabbing functions */ #define Dbl_firstword(value) Dallp1(value) #define Dbl_secondword(value) Dallp2(value) #define Dbl_thirdword(value) dummy_location diff --git a/sys/arch/hppa/spmath/quad_float.h b/sys/arch/hppa/spmath/quad_float.h index ef45af874c5..a0f84040ca0 100644 --- a/sys/arch/hppa/spmath/quad_float.h +++ b/sys/arch/hppa/spmath/quad_float.h @@ -1,4 +1,4 @@ -/* $OpenBSD: quad_float.h,v 1.8 2003/04/10 17:27:58 mickey Exp $ */ +/* $OpenBSD: quad_float.h,v 1.9 2021/03/11 11:16:57 jsg Exp $ */ /* (c) Copyright 1986 HEWLETT-PACKARD COMPANY To anyone who acknowledges that this file is provided "AS IS" @@ -18,7 +18,7 @@ * Quad precision functions * ******************************/ -/* 32-bit word grabing functions */ +/* 32-bit word grabbing functions */ #define Quad_firstword(value) Qallp1(value) #define Quad_secondword(value) Qallp2(value) #define Quad_thirdword(value) Qallp3(value) diff --git a/sys/arch/hppa/spmath/sgl_float.h b/sys/arch/hppa/spmath/sgl_float.h index 7f42e05f5db..d4d34405b41 100644 --- a/sys/arch/hppa/spmath/sgl_float.h +++ b/sys/arch/hppa/spmath/sgl_float.h @@ -1,4 +1,4 @@ -/* $OpenBSD: sgl_float.h,v 1.12 2013/11/26 20:33:12 deraadt Exp $ */ +/* $OpenBSD: sgl_float.h,v 1.13 2021/03/11 11:16:57 jsg Exp $ */ /* (c) Copyright 1986 HEWLETT-PACKARD COMPANY To anyone who acknowledges that this file is provided "AS IS" @@ -20,7 +20,7 @@ * Single precision functions * ******************************/ -/* 32-bit word grabing functions */ +/* 32-bit word grabbing functions */ #define Sgl_firstword(value) Sall(value) #define Sgl_secondword(value) dummy_location #define Sgl_thirdword(value) dummy_location diff --git a/sys/arch/i386/eisa/eisa_machdep.c b/sys/arch/i386/eisa/eisa_machdep.c index c008ca2d40e..1b7e7370f65 100644 --- a/sys/arch/i386/eisa/eisa_machdep.c +++ b/sys/arch/i386/eisa/eisa_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: eisa_machdep.c,v 1.17 2017/09/08 05:36:51 deraadt Exp $ */ +/* $OpenBSD: eisa_machdep.c,v 1.18 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: eisa_machdep.c,v 1.10.22.2 2000/06/25 19:36:58 sommerfeld Exp $ */ /*- @@ -79,7 +79,7 @@ /* * EISA doesn't have any special needs; just use the generic versions - * of these funcions. + * of these functions. */ struct bus_dma_tag eisa_bus_dma_tag = { NULL, /* _cookie */ diff --git a/sys/arch/i386/i386/cpu.c b/sys/arch/i386/i386/cpu.c index 6908f5e81c9..b01dc88c1e3 100644 --- a/sys/arch/i386/i386/cpu.c +++ b/sys/arch/i386/i386/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.106 2020/11/28 18:40:01 kettenis Exp $ */ +/* $OpenBSD: cpu.c,v 1.107 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: cpu.c,v 1.1.2.7 2000/06/26 02:04:05 sommerfeld Exp $ */ /*- @@ -889,7 +889,7 @@ cpu_init_mwait(struct cpu_softc *sc) cpu_mwait_size = largest; printf("\n"); - /* enable use of mwait; may be overriden by acpicpu later */ + /* enable use of mwait; may be overridden by acpicpu later */ if (cpu_mwait_size > 0) cpu_idle_cycle_fcn = &cpu_idle_mwait_cycle; } diff --git a/sys/arch/i386/i386/mpbios.c b/sys/arch/i386/i386/mpbios.c index c2e96efeccc..9a27fc5a42e 100644 --- a/sys/arch/i386/i386/mpbios.c +++ b/sys/arch/i386/i386/mpbios.c @@ -1,4 +1,4 @@ -/* $OpenBSD: mpbios.c,v 1.42 2020/12/20 09:49:53 jmatthew Exp $ */ +/* $OpenBSD: mpbios.c,v 1.43 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: mpbios.c,v 1.2 2002/10/01 12:56:57 fvdl Exp $ */ /*- @@ -298,7 +298,7 @@ mpbios_probe(struct device *self) /* * If we have acpi but chose to use apm, then we really should * not go use mpbios. Systems with usable acpi typically have - * unuseable mpbios + * unusable mpbios */ if (haveacpibutusingapm) return (0); diff --git a/sys/arch/i386/i386/pmap.c b/sys/arch/i386/i386/pmap.c index b2377cb89db..71a6bff6b60 100644 --- a/sys/arch/i386/i386/pmap.c +++ b/sys/arch/i386/i386/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.210 2020/12/28 14:02:08 mpi Exp $ */ +/* $OpenBSD: pmap.c,v 1.211 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: pmap.c,v 1.91 2000/06/02 17:46:37 thorpej Exp $ */ /* @@ -377,7 +377,7 @@ int nkptp_max = 1024 - (KERNBASE / NBPD) - 1; /* * pg_g_kern: if CPU is affected by Meltdown pg_g_kern is 0, - * otherwise it is is set to PG_G. pmap_pg_g will be dervied + * otherwise it is is set to PG_G. pmap_pg_g will be derived * from pg_g_kern, see pmap_bootstrap(). */ extern int pg_g_kern; diff --git a/sys/arch/i386/include/atomic.h b/sys/arch/i386/include/atomic.h index 4e5266dc200..4cc1f2b49da 100644 --- a/sys/arch/i386/include/atomic.h +++ b/sys/arch/i386/include/atomic.h @@ -1,4 +1,4 @@ -/* $OpenBSD: atomic.h,v 1.18 2017/05/28 01:33:26 jsg Exp $ */ +/* $OpenBSD: atomic.h,v 1.19 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: atomic.h,v 1.1.2.2 2000/02/21 18:54:07 sommerfeld Exp $ */ /*- @@ -236,7 +236,7 @@ _atomic_sub_long_nv(volatile unsigned long *p, unsigned long v) /* * The IA-32 architecture is rather strongly ordered. When accessing - * normal write-back cachable memory, only reads may be reordered with + * normal write-back cacheable memory, only reads may be reordered with * older writes to different locations. There are a few instructions * (clfush, non-temporal move instructions) that obey weaker ordering * rules, but those instructions will only be used in (inline) diff --git a/sys/arch/i386/include/cpu.h b/sys/arch/i386/include/cpu.h index 471e575e626..4e0095ca0bb 100644 --- a/sys/arch/i386/include/cpu.h +++ b/sys/arch/i386/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.172 2020/09/24 20:30:41 deraadt Exp $ */ +/* $OpenBSD: cpu.h,v 1.173 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $ */ /*- @@ -175,7 +175,7 @@ struct cpu_info { /* * Processor flag notes: The "primary" CPU has certain MI-defined * roles (mostly relating to hardclock handling); we distinguish - * betwen the processor which booted us, and the processor currently + * between the processor which booted us, and the processor currently * holding the "primary" role just to give us the flexibility later to * change primaries should we be sufficiently twisted. */ diff --git a/sys/arch/i386/include/i82489var.h b/sys/arch/i386/include/i82489var.h index ee09e52b688..ad54f46c874 100644 --- a/sys/arch/i386/include/i82489var.h +++ b/sys/arch/i386/include/i82489var.h @@ -1,4 +1,4 @@ -/* $OpenBSD: i82489var.h,v 1.14 2014/01/24 21:20:23 kettenis Exp $ */ +/* $OpenBSD: i82489var.h,v 1.15 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: i82489var.h,v 1.1.2.2 2000/02/21 18:46:14 sommerfeld Exp $ */ /*- @@ -54,7 +54,7 @@ i82489_writereg(int reg, u_int32_t val) val; /* * intel xeon errata p53: - * write to a lapic register sometimes may appear to have not occured + * write to a lapic register sometimes may appear to have not occurred * workaround: * follow write with a read [from id register] */ diff --git a/sys/arch/i386/include/npx.h b/sys/arch/i386/include/npx.h index e90e3670639..b79d64999ae 100644 --- a/sys/arch/i386/include/npx.h +++ b/sys/arch/i386/include/npx.h @@ -1,4 +1,4 @@ -/* $OpenBSD: npx.h,v 1.19 2013/05/08 15:48:05 tedu Exp $ */ +/* $OpenBSD: npx.h,v 1.20 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: npx.h,v 1.11 1994/10/27 04:16:11 cgd Exp $ */ /*- @@ -99,7 +99,7 @@ struct envxmm { uint32_t en_mxcsr_mask; /* Mask for valid MXCSR bits (may be 0) */ }; -/* FPU regsters in the extended save format. */ +/* FPU registers in the extended save format. */ struct fpaccxmm { uint8_t fp_bytes[10]; uint8_t fp_rsvd[6]; diff --git a/sys/arch/i386/include/pmap.h b/sys/arch/i386/include/pmap.h index 31bac2eb9de..53e68dc2e28 100644 --- a/sys/arch/i386/include/pmap.h +++ b/sys/arch/i386/include/pmap.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.h,v 1.88 2020/09/24 11:18:37 kettenis Exp $ */ +/* $OpenBSD: pmap.h,v 1.89 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: pmap.h,v 1.44 2000/04/24 17:18:18 thorpej Exp $ */ /* @@ -426,7 +426,7 @@ pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) } /* - * pmap_growkernel, pmap_enter, and pmap_extract get picked up in variuos + * pmap_growkernel, pmap_enter, and pmap_extract get picked up in various * modules from both uvm_pmap.h and pmap.h. Since uvm_pmap.h defines these * as functions, inline them here to suppress linker warnings. */ diff --git a/sys/arch/i386/include/smbiosvar.h b/sys/arch/i386/include/smbiosvar.h index d08c73984d3..b7c5b3e7466 100644 --- a/sys/arch/i386/include/smbiosvar.h +++ b/sys/arch/i386/include/smbiosvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: smbiosvar.h,v 1.12 2020/02/20 06:12:14 jsg Exp $ */ +/* $OpenBSD: smbiosvar.h,v 1.13 2021/03/11 11:16:57 jsg Exp $ */ /* * Copyright (c) 2006 Gordon Willem Klok * Copyright (c) 2005 Jordan Hargrave @@ -38,7 +38,7 @@ /* * Section 3.5 of "UUIDs and GUIDs" found at * http://www.opengroup.org/dce/info/draft-leach-uuids-guids-01.txt - * specifies the string repersentation of a UUID. + * specifies the string representation of a UUID. */ #define SMBIOS_UUID_REP "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x" #define SMBIOS_UUID_REPLEN 37 /* 16 zero padded values, 4 hyphens, 1 null */ diff --git a/sys/arch/i386/include/specialreg.h b/sys/arch/i386/include/specialreg.h index 06cdc2bf811..076a89c03c5 100644 --- a/sys/arch/i386/include/specialreg.h +++ b/sys/arch/i386/include/specialreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: specialreg.h,v 1.76 2020/09/13 05:57:28 jsg Exp $ */ +/* $OpenBSD: specialreg.h,v 1.77 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: specialreg.h,v 1.7 1994/10/27 04:16:26 cgd Exp $ */ /*- @@ -52,7 +52,7 @@ #define CR0_CD 0x40000000 /* Cache Disable */ /* - * Cyrix 486 DLC special registers, accessable as IO ports. + * Cyrix 486 DLC special registers, accessible as IO ports. */ #define CCR0 0xc0 /* configuration control register 0 */ #define CCR0_NC0 0x01 /* first 64K of each 1M memory region is non-cacheable */ diff --git a/sys/arch/i386/isa/ahc_isa.c b/sys/arch/i386/isa/ahc_isa.c index 0d19efed64b..b19e8155537 100644 --- a/sys/arch/i386/isa/ahc_isa.c +++ b/sys/arch/i386/isa/ahc_isa.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ahc_isa.c,v 1.18 2009/03/29 21:53:52 sthen Exp $ */ +/* $OpenBSD: ahc_isa.c,v 1.19 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: ahc_isa.c,v 1.5 1996/10/21 22:27:39 thorpej Exp $ */ /* @@ -151,7 +151,7 @@ ahc_isa_irq(bus_space_tag_t iot, bus_space_handle_t ioh) u_char intdef; u_char hcntrl; - /* Pause the card preseving the IRQ type */ + /* Pause the card preserving the IRQ type */ hcntrl = bus_space_read_1(iot, ioh, HCNTRL) & IRQMS; bus_space_write_1(iot, ioh, HCNTRL, hcntrl | PAUSE); diff --git a/sys/arch/i386/pci/gscpm.c b/sys/arch/i386/pci/gscpm.c index c1bbacccdf5..ac7fc5675c5 100644 --- a/sys/arch/i386/pci/gscpm.c +++ b/sys/arch/i386/pci/gscpm.c @@ -1,4 +1,4 @@ -/* $OpenBSD: gscpm.c,v 1.11 2021/02/23 04:44:30 cheloha Exp $ */ +/* $OpenBSD: gscpm.c,v 1.12 2021/03/11 11:16:57 jsg Exp $ */ /* * Copyright (c) 2004 Alexander Yurchenko * @@ -145,7 +145,7 @@ gscpm_setperf(int level) pctl = bus_space_read_4(sc->sc_iot, sc->sc_acpi_ioh, GSCPM_P_CNT); if (level == 100) { - /* 100 is a maximum perfomance, disable throttling */ + /* 100 is a maximum performance, disable throttling */ pctl &= ~GSCPM_P_CNT_THTEN; } else { for (i = 0; i < GSCPM_THT_LEVELS; i++) diff --git a/sys/arch/i386/pci/pci_machdep.c b/sys/arch/i386/pci/pci_machdep.c index d301dab8eac..9887a48f8ab 100644 --- a/sys/arch/i386/pci/pci_machdep.c +++ b/sys/arch/i386/pci/pci_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pci_machdep.c,v 1.86 2020/06/17 06:17:19 dlg Exp $ */ +/* $OpenBSD: pci_machdep.c,v 1.87 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: pci_machdep.c,v 1.28 1997/06/06 23:29:17 thorpej Exp $ */ /*- @@ -119,7 +119,7 @@ int pci_mode = -1; * Memory Mapped Configuration space access. * * Since mapping the whole configuration space will cost us up to - * 256MB of kernel virtual memory, we use seperate mappings per bus. + * 256MB of kernel virtual memory, we use separate mappings per bus. * The mappings are created on-demand, such that we only use kernel * virtual memory for busses that are actually present. */ @@ -244,7 +244,7 @@ pci_attach_hook(struct device *parent, struct device *self, * support it than the other way around, so be conservative * here. So we don't enable MSI if we don't find a host * bridge there. We also deliberately don't enable MSI on - * chipsets from low-end manifacturers like VIA and SiS. + * chipsets from low-end manufacturers like VIA and SiS. */ tag = pci_make_tag(pc, 0, 0, 0); id = pci_conf_read(pc, tag, PCI_ID_REG); diff --git a/sys/arch/landisk/dev/rs5c313.c b/sys/arch/landisk/dev/rs5c313.c index 8ffaec234b6..5e4b5d08dc3 100644 --- a/sys/arch/landisk/dev/rs5c313.c +++ b/sys/arch/landisk/dev/rs5c313.c @@ -1,4 +1,4 @@ -/* $OpenBSD: rs5c313.c,v 1.3 2008/06/27 06:03:08 ray Exp $ */ +/* $OpenBSD: rs5c313.c,v 1.4 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: rs5c313.c,v 1.1 2006/09/07 01:12:00 uwe Exp $ */ /* $NetBSD: rs5c313_landisk.c,v 1.1 2006/09/07 01:55:03 uwe Exp $ */ @@ -321,7 +321,7 @@ rtc_ce(struct rs5c313_softc *sc, int onoff) } /* - * SCLK pin is connnected to SPB0DT. + * SCLK pin is connected to SPB0DT. * SPB0DT is always in output mode, we set SPB0IO in rtc_begin. */ void diff --git a/sys/arch/loongson/dev/bonito.c b/sys/arch/loongson/dev/bonito.c index c0107540eef..c9d17e3879c 100644 --- a/sys/arch/loongson/dev/bonito.c +++ b/sys/arch/loongson/dev/bonito.c @@ -1,4 +1,4 @@ -/* $OpenBSD: bonito.c,v 1.34 2018/02/24 11:42:30 visa Exp $ */ +/* $OpenBSD: bonito.c,v 1.35 2021/03/11 11:16:57 jsg Exp $ */ /* $NetBSD: bonito_mainbus.c,v 1.11 2008/04/28 20:23:10 martin Exp $ */ /* $NetBSD: bonito_pci.c,v 1.5 2008/04/28 20:23:28 martin Exp $ */ @@ -276,7 +276,7 @@ bonito_attach(struct device *parent, struct device *self, void *aux) #endif /* - * Setup proper abitration. + * Setup proper arbitration. */ if (!sc->sc_compatible) { diff --git a/sys/arch/loongson/dev/sisfb.c b/sys/arch/loongson/dev/sisfb.c index 9dcfa5b5d1c..d6867983ed8 100644 --- a/sys/arch/loongson/dev/sisfb.c +++ b/sys/arch/loongson/dev/sisfb.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sisfb.c,v 1.8 2020/07/18 08:59:28 visa Exp $ */ +/* $OpenBSD: sisfb.c,v 1.9 2021/03/11 11:16:58 jsg Exp $ */ /* * Copyright (c) 2010 Miodrag Vallat. @@ -19,7 +19,7 @@ /* * Minimalistic driver for the SIS315 Pro frame buffer found on the * Lemote Fuloong 2F systems. - * Does not support accelaration, mode change, secondary output, or + * Does not support acceleration, mode change, secondary output, or * anything fancy. */ diff --git a/sys/arch/loongson/dev/voyager.c b/sys/arch/loongson/dev/voyager.c index d6ce092982b..31cf52466f5 100644 --- a/sys/arch/loongson/dev/voyager.c +++ b/sys/arch/loongson/dev/voyager.c @@ -1,4 +1,4 @@ -/* $OpenBSD: voyager.c,v 1.5 2017/05/17 11:52:25 visa Exp $ */ +/* $OpenBSD: voyager.c,v 1.6 2021/03/11 11:16:58 jsg Exp $ */ /* * Copyright (c) 2010 Miodrag Vallat. @@ -118,7 +118,7 @@ voyager_attach(struct device *parent, struct device *self, void *aux) } /* - * Setup interrut handling. + * Setup interrupt handling. */ bus_space_write_4(sc->sc_mmiot, sc->sc_mmioh, VOYAGER_RAW_ICR, diff --git a/sys/arch/loongson/loongson/machdep.c b/sys/arch/loongson/loongson/machdep.c index 62b114c7c60..b71360bdfa6 100644 --- a/sys/arch/loongson/loongson/machdep.c +++ b/sys/arch/loongson/loongson/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.94 2021/01/02 14:27:53 visa Exp $ */ +/* $OpenBSD: machdep.c,v 1.95 2021/03/11 11:16:58 jsg Exp $ */ /* * Copyright (c) 2009, 2010, 2014 Miodrag Vallat. @@ -93,7 +93,7 @@ char pmon_bootp[80]; /* * Even though the system is 64bit, 2E- and 2F-based hardware is constrained - * to up to 2G of contigous physical memory (direct 2GB DMA area). 2Gq- and + * to up to 2G of contiguous physical memory (direct 2GB DMA area). 2Gq- and * 3A-based hardware only supports 32-bit DMA addresses, even though * physical memory may exist beyond 4GB. */ diff --git a/sys/arch/luna88k/cbus/cbus.c b/sys/arch/luna88k/cbus/cbus.c index 109bfdcbf78..c4dd1cec93d 100644 --- a/sys/arch/luna88k/cbus/cbus.c +++ b/sys/arch/luna88k/cbus/cbus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cbus.c,v 1.8 2019/12/30 12:16:12 aoyama Exp $ */ +/* $OpenBSD: cbus.c,v 1.9 2021/03/11 11:16:58 jsg Exp $ */ /* * Copyright (c) 2014 Kenji Aoyama. @@ -343,7 +343,7 @@ cbus_intr(void *arg) printf("cbus_intr: called, *cbus_isreg=0x%02x, registered = 0x%02x\n", *cbus_isreg, sc->registered); #endif - /* Make the bit pattern that we should proces */ + /* Make the bit pattern that we should process */ intr_status = intr_status ^ sc->registered; #ifdef CBUS_DEBUG printf("cbus_intr: processing 0x%02x\n", intr_status); diff --git a/sys/arch/luna88k/cbus/nec86hw.c b/sys/arch/luna88k/cbus/nec86hw.c index 8284140ac97..56c0c6130e3 100644 --- a/sys/arch/luna88k/cbus/nec86hw.c +++ b/sys/arch/luna88k/cbus/nec86hw.c @@ -1,4 +1,4 @@ -/* $OpenBSD: nec86hw.c,v 1.5 2017/03/11 12:15:35 ratchov Exp $ */ +/* $OpenBSD: nec86hw.c,v 1.6 2021/03/11 11:16:58 jsg Exp $ */ /* $NecBSD: nec86hw.c,v 1.13 1998/03/14 07:04:54 kmatsuda Exp $ */ /* $NetBSD$ */ @@ -151,7 +151,7 @@ nec86hw_attach(struct nec86hw_softc *sc) /* Internal Speaker ON */ nec86hw_speaker_ctl(sc, SPKR_ON); - /* Set miscellanous stuffs. */ + /* Set miscellaneous stuffs. */ data = bus_space_read_1(iot, ioh, NEC86_CTRL); data &= NEC86_CTRL_MASK_PAN | NEC86_CTRL_MASK_PORT; data |= NEC86_CTRL_PAN_L | NEC86_CTRL_PAN_R; diff --git a/sys/arch/luna88k/dev/mb89352.c b/sys/arch/luna88k/dev/mb89352.c index 868c42d91d5..b0a912838c9 100644 --- a/sys/arch/luna88k/dev/mb89352.c +++ b/sys/arch/luna88k/dev/mb89352.c @@ -1,4 +1,4 @@ -/* $OpenBSD: mb89352.c,v 1.30 2020/09/22 19:32:51 krw Exp $ */ +/* $OpenBSD: mb89352.c,v 1.31 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: mb89352.c,v 1.5 2000/03/23 07:01:31 thorpej Exp $ */ /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */ @@ -1579,7 +1579,7 @@ spc_intr(void *arg) /* * On LUNA-88K2, 2 spc(4)'s share the level 3 interrupt. - * So, first, check if this deivce needs to process this interrupt. + * So, first, check if this device needs to process this interrupt. */ ints = bus_space_read_1(iot, ioh, INTS); if (ints == 0) /* No interrupt event on this device */ @@ -1761,7 +1761,7 @@ loop: /* disable disconnect interrupt */ bus_space_write_1(iot, ioh, PCTL, bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB); - /* XXX reset interrput */ + /* XXX reset interrupt */ bus_space_write_1(iot, ioh, INTS, ints); switch (sc->sc_state) { diff --git a/sys/arch/luna88k/dev/mb89352reg.h b/sys/arch/luna88k/dev/mb89352reg.h index ff8e6b20abf..ed90d55072c 100644 --- a/sys/arch/luna88k/dev/mb89352reg.h +++ b/sys/arch/luna88k/dev/mb89352reg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: mb89352reg.h,v 1.4 2008/10/17 18:30:20 okan Exp $ */ +/* $OpenBSD: mb89352reg.h,v 1.5 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: mb89352reg.h,v 1.3 2003/08/07 16:31:02 agc Exp $ */ /* NecBSD: mb89352reg.h,v 1.3 1998/03/14 07:04:34 kmatsuda Exp */ @@ -84,7 +84,7 @@ * FUJITSU MB89352A SCSI Protocol Controller Hardware Description. */ -/* Definitions, most of them has turned out to be unneccesary, but here they +/* Definitions, most of them have turned out to be unnecessary, but here they * are anyway. */ diff --git a/sys/arch/luna88k/dev/mb89352var.h b/sys/arch/luna88k/dev/mb89352var.h index 02fa68c7f13..0df2bc6358f 100644 --- a/sys/arch/luna88k/dev/mb89352var.h +++ b/sys/arch/luna88k/dev/mb89352var.h @@ -1,4 +1,4 @@ -/* $OpenBSD: mb89352var.h,v 1.7 2020/07/23 00:08:10 krw Exp $ */ +/* $OpenBSD: mb89352var.h,v 1.8 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: mb89352var.h,v 1.6 2003/08/02 12:48:09 tsutsui Exp $ */ /* NecBSD: mb89352var.h,v 1.4 1998/03/14 07:31:22 kmatsuda Exp */ @@ -63,7 +63,7 @@ /* * ACB. Holds additional information for each SCSI command Comments: We * need a separate scsi command block because we may need to overwrite it - * with a request sense command. Basicly, we refrain from fiddling with + * with a request sense command. Basically, we refrain from fiddling with * the scsi_xfer struct (except do the expected updating of return values). * We'll generally update: xs->{flags,resid,error,sense,status} and * occasionally xs->retries. diff --git a/sys/arch/luna88k/dev/sioreg.h b/sys/arch/luna88k/dev/sioreg.h index 36d2822137c..1aeff4c231b 100644 --- a/sys/arch/luna88k/dev/sioreg.h +++ b/sys/arch/luna88k/dev/sioreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: sioreg.h,v 1.1.1.1 2004/04/21 15:23:55 aoyama Exp $ */ +/* $OpenBSD: sioreg.h,v 1.2 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: sioreg.h,v 1.1 2000/01/05 08:48:55 nisimura Exp $ */ /* * Copyright (c) 1992 OMRON Corporation. @@ -65,7 +65,7 @@ #define WR0_RSTINT 0x10 /* Reset External/Status Interrupt */ #define WR0_CHANRST 0x18 /* Channel Reset */ #define WR0_INTNXT 0x20 /* Enable Interrupt on Next Receive Character */ -#define WR0_RSTPEND 0x28 /* Reset Transmitter Interrput/DMA Pending */ +#define WR0_RSTPEND 0x28 /* Reset Transmitter Interrupt/DMA Pending */ #define WR0_ERRRST 0x30 /* Error Reset */ #define WR0_ENDINTR 0x38 /* End of Interrupt */ diff --git a/sys/arch/luna88k/stand/boot/bmd.c b/sys/arch/luna88k/stand/boot/bmd.c index b7766ed166a..4cb70ded0b7 100644 --- a/sys/arch/luna88k/stand/boot/bmd.c +++ b/sys/arch/luna88k/stand/boot/bmd.c @@ -1,4 +1,4 @@ -/* $OpenBSD: bmd.c,v 1.4 2013/10/29 21:49:07 miod Exp $ */ +/* $OpenBSD: bmd.c,v 1.5 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: bmd.c,v 1.2 2013/01/20 13:35:43 tsutsui Exp $ */ /* @@ -459,7 +459,7 @@ bmdclear(void) /* - * charactor operation routines + * character operation routines */ void diff --git a/sys/arch/luna88k/stand/boot/dev_net.c b/sys/arch/luna88k/stand/boot/dev_net.c index 445445bee3b..16f667d60b5 100644 --- a/sys/arch/luna88k/stand/boot/dev_net.c +++ b/sys/arch/luna88k/stand/boot/dev_net.c @@ -1,4 +1,4 @@ -/* $OpenBSD: dev_net.c,v 1.4 2020/12/09 18:10:19 krw Exp $ */ +/* $OpenBSD: dev_net.c,v 1.5 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: dev_net.c,v 1.26 2011/07/17 20:54:52 joerg Exp $ */ /*- @@ -192,7 +192,7 @@ net_strategy(void *devdata, int rw, daddr_t blk, size_t size, void *buf, * * The default is to use the Sun bootparams RPC * (because that is what the kernel will do). - * MD code can make try_bootp initialied data, + * MD code can make try_bootp initialized data, * which will override this common definition. */ #ifdef SUPPORT_BOOTP diff --git a/sys/arch/luna88k/stand/boot/lance.c b/sys/arch/luna88k/stand/boot/lance.c index 381dee155c0..7056c1b0f54 100644 --- a/sys/arch/luna88k/stand/boot/lance.c +++ b/sys/arch/luna88k/stand/boot/lance.c @@ -1,4 +1,4 @@ -/* $OpenBSD: lance.c,v 1.2 2013/10/29 21:49:07 miod Exp $ */ +/* $OpenBSD: lance.c,v 1.3 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: lance.c,v 1.1 2013/01/13 14:10:55 tsutsui Exp $ */ /* @@ -289,7 +289,7 @@ lance_do_initialize(struct le_softc *sc) sc->sc_curtmd = 0; sc->sc_currmd = 0; - /* Initialze LANCE */ + /* Initialize LANCE */ lereg->ler_rap = LE_CSR0; lereg->ler_rdp = LE_C0_INIT; diff --git a/sys/arch/luna88k/stand/boot/sc.c b/sys/arch/luna88k/stand/boot/sc.c index 98765a6045f..a4719816b8e 100644 --- a/sys/arch/luna88k/stand/boot/sc.c +++ b/sys/arch/luna88k/stand/boot/sc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sc.c,v 1.3 2013/10/29 21:49:07 miod Exp $ */ +/* $OpenBSD: sc.c,v 1.4 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: sc.c,v 1.4 2013/01/22 15:48:40 tsutsui Exp $ */ /* @@ -556,7 +556,7 @@ scintr(struct scsi_softc *hs) hs->sc_flags &= ~SC_SEL_TIMEOUT; hs->sc_phase = BUS_FREE_PHASE; hs->sc_target = SCSI_ID; - /* Such SCSI Device is not conected. */ + /* Such SCSI Device is not connected . */ *(hs->sc_lock) = SC_DEV_NOT_FOUND; hd->scsi_ints = ints; return 0; diff --git a/sys/arch/luna88k/stand/boot/scsivar.h b/sys/arch/luna88k/stand/boot/scsivar.h index ee084624122..c84a9411768 100644 --- a/sys/arch/luna88k/stand/boot/scsivar.h +++ b/sys/arch/luna88k/stand/boot/scsivar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: scsivar.h,v 1.2 2013/10/29 21:49:07 miod Exp $ */ +/* $OpenBSD: scsivar.h,v 1.3 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: scsivar.h,v 1.1 2013/01/05 17:44:24 tsutsui Exp $ */ /* @@ -78,7 +78,7 @@ struct scsi_softc { int sc_unit; u_char *sc_buf; /* Data Buffer Pointor*/ u_char *sc_cdb; /* CDB Buffer Pointor */ - volatile int *sc_lock; /* Lock Flag addres */ + volatile int *sc_lock; /* Lock Flag address */ int sc_flags; /* SPC Status Flags */ int sc_phase; /* Current SCSI Phase */ int sc_target; /* Current Target ID */ diff --git a/sys/arch/luna88k/stand/boot/sioreg.h b/sys/arch/luna88k/stand/boot/sioreg.h index 73f748055b7..da7ebe98004 100644 --- a/sys/arch/luna88k/stand/boot/sioreg.h +++ b/sys/arch/luna88k/stand/boot/sioreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: sioreg.h,v 1.1 2013/10/28 22:13:13 miod Exp $ */ +/* $OpenBSD: sioreg.h,v 1.2 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: sioreg.h,v 1.2 2013/01/12 07:04:57 tsutsui Exp $ */ /* @@ -113,7 +113,7 @@ struct siodevice { #define WR0_RSTINT 0x10 /* Reset External/Status Interrupt */ #define WR0_CHANRST 0x18 /* Channel Reset */ #define WR0_INTNXT 0x20 /* Enable Interrupt on Next Receive Character */ -#define WR0_RSTPEND 0x28 /* Reset Transmitter Interrput/DMA Pending */ +#define WR0_RSTPEND 0x28 /* Reset Transmitter Interrupt/DMA Pending */ #define WR0_ERRRST 0x30 /* Error Reset */ #define WR0_ENDINTR 0x38 /* End of Interrupt */ diff --git a/sys/arch/m88k/m88k/db_disasm.c b/sys/arch/m88k/m88k/db_disasm.c index cc8cbc98f78..048e1e261d3 100644 --- a/sys/arch/m88k/m88k/db_disasm.c +++ b/sys/arch/m88k/m88k/db_disasm.c @@ -1,4 +1,4 @@ -/* $OpenBSD: db_disasm.c,v 1.11 2019/11/10 10:03:33 mpi Exp $ */ +/* $OpenBSD: db_disasm.c,v 1.12 2021/03/11 11:16:58 jsg Exp $ */ /* * Copyright (c) 2006, Miodrag Vallat * @@ -510,7 +510,7 @@ instset(int cpu, u_int32_t inst, const char *opcode, vaddr_t iadr) return (1); } -/* Handles unconditionnal branches */ +/* Handles unconditional branches */ int obranch(int cpu, u_int32_t inst, const char *opcode, vaddr_t iadr) { diff --git a/sys/arch/m88k/m88k/db_interface.c b/sys/arch/m88k/m88k/db_interface.c index 315d1aed202..4d540ea2ad0 100644 --- a/sys/arch/m88k/m88k/db_interface.c +++ b/sys/arch/m88k/m88k/db_interface.c @@ -1,4 +1,4 @@ -/* $OpenBSD: db_interface.c,v 1.25 2019/11/10 10:03:33 mpi Exp $ */ +/* $OpenBSD: db_interface.c,v 1.26 2021/03/11 11:16:58 jsg Exp $ */ /* * Mach Operating System * Copyright (c) 1993-1991 Carnegie Mellon University @@ -589,7 +589,7 @@ m88k_db_frame_search(addr, have_addr, count, modif) else addr = (ddb_regs.r[31]); - /* walk back up stack until 8k boundry, looking for 0 */ + /* walk back up stack until 8k boundary, looking for 0 */ while (addr & ((8 * 1024) - 1)) { if (frame_is_sane((db_regs_t *)addr, 1) != 0) db_printf("frame found at 0x%lx\n", addr); diff --git a/sys/arch/m88k/m88k/m88110_fp.c b/sys/arch/m88k/m88k/m88110_fp.c index ec59b304f70..11c25d01570 100644 --- a/sys/arch/m88k/m88k/m88110_fp.c +++ b/sys/arch/m88k/m88k/m88110_fp.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m88110_fp.c,v 1.12 2020/08/19 10:10:58 mpi Exp $ */ +/* $OpenBSD: m88110_fp.c,v 1.13 2021/03/11 11:16:58 jsg Exp $ */ /* * Copyright (c) 2007, Miodrag Vallat. @@ -50,7 +50,7 @@ void m88110_fpu_fetch(struct trapframe *, u_int, u_int, u_int, fparg *); * - a genuinely unimplemented feature: fsqrt. * * - an opcode involving an odd-numbered register pair (as a double precision - * operand). Rather than issueing a correctly formed flavour in kernel mode, + * operand). Rather than issuing a correctly formed flavour in kernel mode, * and having to handle a possible nested exception, we emulate it. This * will of course be slower, but we have to draw the line somewhere. * Gcc will however never produce such code, so we don't have to worry @@ -59,7 +59,7 @@ void m88110_fpu_fetch(struct trapframe *, u_int, u_int, u_int, fparg *); * Note that, currently, opcodes involving the extended register file (XRF) * are handled as invalid opcodes. This will eventually change once the * toolchain can correctly assemble XRF instructions, and the XRF is saved - * accross context switches (or not... lazy switching for XRF makes more + * across context switches (or not... lazy switching for XRF makes more * sense). */ diff --git a/sys/arch/macppc/dev/adb.c b/sys/arch/macppc/dev/adb.c index c3eda64bcc1..44d920db47c 100644 --- a/sys/arch/macppc/dev/adb.c +++ b/sys/arch/macppc/dev/adb.c @@ -1,4 +1,4 @@ -/* $OpenBSD: adb.c,v 1.42 2019/09/03 17:51:52 deraadt Exp $ */ +/* $OpenBSD: adb.c,v 1.43 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: adb.c,v 1.6 1999/08/16 06:28:09 tsubai Exp $ */ /* $NetBSD: adb_direct.c,v 1.14 2000/06/08 22:10:45 tsubai Exp $ */ @@ -816,7 +816,7 @@ adb_soft_intr(void) * the completion routine, so that the completion * routine can reentrantly process the queue. For * example, this happens when polling is turned on - * by entering the debuger by keystroke. + * by entering the debugger by keystroke. */ s = splhigh(); adbInCount--; diff --git a/sys/arch/macppc/dev/dbdma.h b/sys/arch/macppc/dev/dbdma.h index 922533017bc..715a8e1ce58 100644 --- a/sys/arch/macppc/dev/dbdma.h +++ b/sys/arch/macppc/dev/dbdma.h @@ -1,4 +1,4 @@ -/* $OpenBSD: dbdma.h,v 1.4 2006/01/13 19:25:44 miod Exp $ */ +/* $OpenBSD: dbdma.h,v 1.5 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: dbdma.h,v 1.2 1998/08/21 16:13:28 tsubai Exp $ */ /* @@ -213,7 +213,7 @@ struct dbdma_regmap { u_int32_t d_reserved; /* Reserved for the moment */ u_int32_t d_branchptrhi; /* MSB of Branch Pointer */ u_int32_t d_branchptrlo; /* LSB of Branch Pointer */ - /* The remaining fields are undefinied and unimplemented */ + /* The remaining fields are undefined and unimplemented */ }; typedef volatile struct dbdma_regmap dbdma_regmap_t; diff --git a/sys/arch/macppc/dev/if_mc.c b/sys/arch/macppc/dev/if_mc.c index d9801b0458a..8b38651091f 100644 --- a/sys/arch/macppc/dev/if_mc.c +++ b/sys/arch/macppc/dev/if_mc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_mc.c,v 1.30 2020/07/10 13:22:19 patrick Exp $ */ +/* $OpenBSD: if_mc.c,v 1.31 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: if_mc.c,v 1.9.16.1 2006/06/21 14:53:13 yamt Exp $ */ /*- @@ -170,7 +170,7 @@ #define RCVINT 0x02 /* Receive Interrupt */ #define XMTINT 0x01 /* Transmit Interrupt */ -/* 9: Interrut Mask Register (IMR) */ +/* 9: Interrupt Mask Register (IMR) */ #define JABM 0x80 /* Jabber Error Mask */ #define BABLM 0x40 /* Babble Error Mask */ #define CERRM 0x20 /* Collision Error Mask */ diff --git a/sys/arch/macppc/dev/openpic.c b/sys/arch/macppc/dev/openpic.c index 4817bf3f111..6d22e4478f6 100644 --- a/sys/arch/macppc/dev/openpic.c +++ b/sys/arch/macppc/dev/openpic.c @@ -1,4 +1,4 @@ -/* $OpenBSD: openpic.c,v 1.86 2019/09/03 17:51:52 deraadt Exp $ */ +/* $OpenBSD: openpic.c,v 1.87 2021/03/11 11:16:58 jsg Exp $ */ /*- * Copyright (c) 2008 Dale Rahn @@ -231,7 +231,7 @@ openpic_attach(struct device *parent, struct device *self, void *aux) while (openpic_read(OPENPIC_CONFIG) & OPENPIC_CONFIG_RESET) delay(100); - /* openpic may support more than 128 interupts but driver doesn't */ + /* openpic may support more than 128 interrupts but driver doesn't */ openpic_numirq = ((openpic_read(OPENPIC_FEATURE) >> 16) & 0x7f)+1; printf(": version 0x%x feature %x %s", diff --git a/sys/arch/macppc/dev/zs.c b/sys/arch/macppc/dev/zs.c index 468cbf38fc9..dab4f4370ec 100644 --- a/sys/arch/macppc/dev/zs.c +++ b/sys/arch/macppc/dev/zs.c @@ -1,4 +1,4 @@ -/* $OpenBSD: zs.c,v 1.30 2019/09/03 04:48:00 deraadt Exp $ */ +/* $OpenBSD: zs.c,v 1.31 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: zs.c,v 1.17 2001/06/19 13:42:15 wiz Exp $ */ /* @@ -565,7 +565,7 @@ zs_set_speed(struct zs_chanstate *cs, int bps) * Step through all the sources and see which one matches * the best. A source has to match BETTER than tol to be chosen. * Thus if two sources give the same error, the first one will be - * chosen. Also, allow for the possability that one source might run + * chosen. Also, allow for the possibility that one source might run * both the BRG and the direct divider (i.e. RTxC). */ for (i = 0; i < xcs->cs_clock_count; i++) { diff --git a/sys/arch/macppc/include/z8530var.h b/sys/arch/macppc/include/z8530var.h index 8d909b9b8b0..ac02b7cd53c 100644 --- a/sys/arch/macppc/include/z8530var.h +++ b/sys/arch/macppc/include/z8530var.h @@ -1,4 +1,4 @@ -/* $OpenBSD: z8530var.h,v 1.9 2013/04/21 14:44:16 sebastia Exp $ */ +/* $OpenBSD: z8530var.h,v 1.10 2021/03/11 11:16:58 jsg Exp $ */ /* $NetBSD: z8530var.h,v 1.5 2002/03/17 19:40:45 atatat Exp $ */ /* @@ -58,7 +58,7 @@ struct zsclksrc { child. The other bits tell zsloadchannelregs if it should call an md signal source changing routine. ZSC_VARIABLE says if - an ioctl should be able to cahnge the + an ioctl should be able to change the clock rate.*/ }; #define ZSC_PCLK 0x01 @@ -106,7 +106,7 @@ struct zsc_softc { * Functions to read and write individual registers in a channel. * The ZS chip requires a 1.6 uSec. recovery time between accesses, * and the Sun3 hardware does NOT take care of this for you. - * MacII hardware DOES dake care of the delay for us. :-) + * MacII hardware DOES take care of the delay for us. :-) * XXX - Then these should be inline functions! -gwr * Some clock-chirped macs lose serial ports. It could be that the * hardware delay is tied to the CPU speed, and that the minimum delay diff --git a/sys/arch/macppc/macppc/ofw_machdep.c b/sys/arch/macppc/macppc/ofw_machdep.c index aed118ce316..7e7dec7ede6 100644 --- a/sys/arch/macppc/macppc/ofw_machdep.c +++ b/sys/arch/macppc/macppc/ofw_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ofw_machdep.c,v 1.63 2021/03/09 04:53:40 deraadt Exp $ */ +/* $OpenBSD: ofw_machdep.c,v 1.64 2021/03/11 11:16:59 jsg Exp $ */ /* $NetBSD: ofw_machdep.c,v 1.1 1996/09/30 16:34:50 ws Exp $ */ /* @@ -341,7 +341,7 @@ ofw_recurse_keyboard(int pnode) } else if (ofw_devtree == DEVTREE_ADB) { ofw_have_kbd |= OFW_HAVE_ADBKBD; } else { - /* hid or some other keyboard? igore */ + /* hid or some other keyboard? ignore */ } continue; } diff --git a/sys/arch/macppc/stand/ofdev.c b/sys/arch/macppc/stand/ofdev.c index 11642cd4fc9..0ce6e9a933a 100644 --- a/sys/arch/macppc/stand/ofdev.c +++ b/sys/arch/macppc/stand/ofdev.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ofdev.c,v 1.25 2020/12/09 18:10:19 krw Exp $ */ +/* $OpenBSD: ofdev.c,v 1.26 2021/03/11 11:16:59 jsg Exp $ */ /* $NetBSD: ofdev.c,v 1.1 1997/04/16 20:29:20 thorpej Exp $ */ /* @@ -221,7 +221,7 @@ read_mac_label(struct of_dev *devp, char *buf, struct disklabel *lp) return 0; /* If we have an OpenBSD region - * but no valid parition table, + * but no valid partition table, * we cannot load a kernel from * it, punt. * should not have more than one diff --git a/sys/arch/mips64/include/asm.h b/sys/arch/mips64/include/asm.h index 9b8c3f9f054..1c06f645a4b 100644 --- a/sys/arch/mips64/include/asm.h +++ b/sys/arch/mips64/include/asm.h @@ -1,4 +1,4 @@ -/* $OpenBSD: asm.h,v 1.25 2017/08/27 04:32:29 visa Exp $ */ +/* $OpenBSD: asm.h,v 1.26 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -182,7 +182,7 @@ * The following macros are here to benefit the R8000 processor: * - all coprocessor 0 control registers are 64-bit * - the regular nop (sll zero, zero, 0) has the drawback of using the - * shifter, potentially breaking instruction dispatch if occuring after + * shifter, potentially breaking instruction dispatch if occurring after * another instruction using the shifter. */ #ifdef CPU_R8000 diff --git a/sys/arch/mips64/mips64/cache_loongson2.c b/sys/arch/mips64/mips64/cache_loongson2.c index 36e3200e29d..3ecd0905846 100644 --- a/sys/arch/mips64/mips64/cache_loongson2.c +++ b/sys/arch/mips64/mips64/cache_loongson2.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cache_loongson2.c,v 1.7 2016/01/05 05:27:54 visa Exp $ */ +/* $OpenBSD: cache_loongson2.c,v 1.8 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 2009, 2012 Miodrag Vallat. @@ -175,7 +175,7 @@ void Loongson2_InvalidateICachePage(struct cpu_info *ci, vaddr_t va) { /* - * Since the page size matches the I$ set size, and I$ maintainance + * Since the page size matches the I$ set size, and I$ maintenance * operations always operate on all the sets, all we need to do here * is remember there are postponed flushes. */ diff --git a/sys/arch/mips64/mips64/cache_tfp.c b/sys/arch/mips64/mips64/cache_tfp.c index 8dbb66584d1..7cb9f6a8851 100644 --- a/sys/arch/mips64/mips64/cache_tfp.c +++ b/sys/arch/mips64/mips64/cache_tfp.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cache_tfp.c,v 1.7 2017/06/22 14:40:20 visa Exp $ */ +/* $OpenBSD: cache_tfp.c,v 1.8 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 2012 Miodrag Vallat. @@ -21,7 +21,7 @@ * * These routines only handle the L1 cache found onboard the R8000. * The L2 (Streaming Cache) cache handling is apparently quite different - * accross R8000-based designs (well... the two of them: IP21 and IP26), + * across R8000-based designs (well... the two of them: IP21 and IP26), * and is handled on a per-platform basis. */ diff --git a/sys/arch/mips64/mips64/fp_emulate.c b/sys/arch/mips64/mips64/fp_emulate.c index 379569b73a6..f91dd75551a 100644 --- a/sys/arch/mips64/mips64/fp_emulate.c +++ b/sys/arch/mips64/mips64/fp_emulate.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fp_emulate.c,v 1.23 2020/08/19 10:10:58 mpi Exp $ */ +/* $OpenBSD: fp_emulate.c,v 1.24 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 2010 Miodrag Vallat. @@ -954,7 +954,7 @@ fpu_c(struct proc *p, struct trapframe *tf, uint fmt, uint ft, uint fs, if (uo && (op & 0x08)) { float_set_invalid(); if (tf->fsr & FPCSR_E_V) { - /* comparison result intentionaly not written */ + /* comparison result intentionally not written */ goto skip; } } diff --git a/sys/arch/mips64/mips64/pmap.c b/sys/arch/mips64/mips64/pmap.c index 371d1fb3d87..b68d54266cf 100644 --- a/sys/arch/mips64/mips64/pmap.c +++ b/sys/arch/mips64/mips64/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.115 2020/12/24 10:10:49 visa Exp $ */ +/* $OpenBSD: pmap.c,v 1.116 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -1844,7 +1844,7 @@ pmap_alloc_tlbpid(struct proc *p) id = pmap_asid_info[cpuid].pma_asid; if (id >= PG_ASID_COUNT) { tlb_asid_wrap(ci); - /* reserve tlbpid_gen == 0 to alway mean invalid */ + /* reserve tlbpid_gen == 0 to always mean invalid */ if (++pmap_asid_info[cpuid].pma_asidgen == 0) pmap_asid_info[cpuid].pma_asidgen = 1; id = MIN_USER_ASID; diff --git a/sys/arch/mips64/mips64/trap.c b/sys/arch/mips64/mips64/trap.c index cb4a8e5b9e4..6530ef75203 100644 --- a/sys/arch/mips64/mips64/trap.c +++ b/sys/arch/mips64/mips64/trap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.c,v 1.152 2020/10/22 13:41:51 deraadt Exp $ */ +/* $OpenBSD: trap.c,v 1.153 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -244,9 +244,9 @@ trap(struct trapframe *trapframe) if (trapframe->cause & CR_INT_MASK) { /* * Similar reality check as done in interrupt(), in - * case an interrupt occured between a write to + * case an interrupt occurred between a write to * COP_0_STATUS_REG and it taking effect. - * (I have never seen this occuring on R8000 but + * (I have never seen this occurring on R8000 but * this is cheap) */ if (ISSET(trapframe->sr, SR_INT_ENAB)) diff --git a/sys/arch/octeon/dev/cn30xxgmx.c b/sys/arch/octeon/dev/cn30xxgmx.c index 9b601c97abf..a59f0effc49 100644 --- a/sys/arch/octeon/dev/cn30xxgmx.c +++ b/sys/arch/octeon/dev/cn30xxgmx.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cn30xxgmx.c,v 1.50 2021/02/13 17:12:38 visa Exp $ */ +/* $OpenBSD: cn30xxgmx.c,v 1.51 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 2007 Internet Initiative Japan, Inc. @@ -369,13 +369,13 @@ cn30xxgmx_init(struct cn30xxgmx_softc *sc) else sc->sc_port_types[0] = GMX_MII_PORT; if ((inf_mode & INF_MODE_TYPE) == 0) { - /* port 1 and 2 are configred as RGMII ports */ + /* port 1 and 2 are configured as RGMII ports */ sc->sc_nports = 3; sc->sc_port_types[1] = GMX_RGMII_PORT; sc->sc_port_types[2] = GMX_RGMII_PORT; } else { /* port 1: GMII/MII, port 2: disabled */ - /* GMII or MII port is slected by GMX_PRT1_CFG[SPEED] */ + /* GMII or MII port is selected by GMX_PRT1_CFG[SPEED] */ sc->sc_nports = 2; sc->sc_port_types[1] = GMX_GMII_PORT; } diff --git a/sys/arch/octeon/dev/cn30xxgmxreg.h b/sys/arch/octeon/dev/cn30xxgmxreg.h index 55edb362112..4ceed881a58 100644 --- a/sys/arch/octeon/dev/cn30xxgmxreg.h +++ b/sys/arch/octeon/dev/cn30xxgmxreg.h @@ -3,7 +3,7 @@ * DONT EDIT THIS FILE */ -/* $OpenBSD: cn30xxgmxreg.h,v 1.8 2021/02/13 17:12:38 visa Exp $ */ +/* $OpenBSD: cn30xxgmxreg.h,v 1.9 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 2007 Internet Initiative Japan, Inc. @@ -218,7 +218,7 @@ #define RXN_RRM_MAX_XXX_63_16 0xffffffffffff0000ULL #define RXN_RRM_MAX_LEN 0x000000000000ffffULL -/* GMX Maximun Packet-Size Registers */ +/* GMX Maximum Packet-Size Registers */ #define RXN_JABBER_XXX_63_16 0xffffffffffff0000ULL #define RXN_JABBER_CNT 0x000000000000ffffULL @@ -240,7 +240,7 @@ #define RXN_STATS_CTL_XXX_63_1 0xfffffffffffffffeULL #define RXN_STATS_CTL_RD_CLR 0x0000000000000001ULL -/* GMX Minimun Interface-Gap Cycles Registers */ +/* GMX Minimum Interface-Gap Cycles Registers */ #define RXN_IFG_XXX_63_4 0xfffffffffffffff0ULL #define RXN_IFG_IFG 0x000000000000000fULL diff --git a/sys/arch/octeon/dev/cn30xxpko.c b/sys/arch/octeon/dev/cn30xxpko.c index 2ea636b5711..0c9cc723281 100644 --- a/sys/arch/octeon/dev/cn30xxpko.c +++ b/sys/arch/octeon/dev/cn30xxpko.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cn30xxpko.c,v 1.7 2020/09/08 13:54:48 visa Exp $ */ +/* $OpenBSD: cn30xxpko.c,v 1.8 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 2007 Internet Initiative Japan, Inc. @@ -120,7 +120,7 @@ cn30xxpko_port_enable(struct cn30xxpko_softc *sc, int enable) reg_read_idx = 0; SET(reg_read_idx, sc->sc_port & PKO_REG_READ_IDX_IDX); - /* XXX assume one queue maped one port */ + /* XXX assume one queue mapped one port */ /* Enable packet output by enabling all queues for this port */ mem_queue_qos = 0; SET(mem_queue_qos, ((uint64_t)sc->sc_port << 7) & PKO_MEM_QUEUE_QOS_PID); @@ -167,7 +167,7 @@ cn30xxpko_port_config(struct cn30xxpko_softc *sc) } } - /* assume one queue maped one port */ + /* assume one queue mapped one port */ mem_queue_ptrs = 0; SET(mem_queue_ptrs, PKO_MEM_QUEUE_PTRS_TAIL); SET(mem_queue_ptrs, ((uint64_t)0 << 13) & PKO_MEM_QUEUE_PTRS_IDX); diff --git a/sys/arch/octeon/dev/if_cnmac.c b/sys/arch/octeon/dev/if_cnmac.c index b080c0b335e..a3e18b791e8 100644 --- a/sys/arch/octeon/dev/if_cnmac.c +++ b/sys/arch/octeon/dev/if_cnmac.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_cnmac.c,v 1.82 2021/02/17 14:12:29 visa Exp $ */ +/* $OpenBSD: if_cnmac.c,v 1.83 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 2007 Internet Initiative Japan, Inc. @@ -98,7 +98,7 @@ /* * Set the PKO to think command buffers are an odd length. This makes it so we - * never have to divide a comamnd across two buffers. + * never have to divide a command across two buffers. */ #define OCTEON_POOL_NWORDS_CMD \ (((uint32_t)OCTEON_POOL_SIZE_CMD / sizeof(uint64_t)) - 1) diff --git a/sys/arch/octeon/dev/octcf.c b/sys/arch/octeon/dev/octcf.c index 276ab1ae124..cd8ac8bb5fb 100644 --- a/sys/arch/octeon/dev/octcf.c +++ b/sys/arch/octeon/dev/octcf.c @@ -1,4 +1,4 @@ -/* $OpenBSD: octcf.c,v 1.32 2018/05/30 14:53:56 fcambus Exp $ */ +/* $OpenBSD: octcf.c,v 1.33 2021/03/11 11:16:59 jsg Exp $ */ /* $NetBSD: wd.c,v 1.193 1999/02/28 17:15:27 explorer Exp $ */ /* @@ -780,7 +780,7 @@ octcf_get_params(struct octcf_softc *wd, struct ataparams *params) uint16_t temp; temp = OCTCF_REG_READ(wd, 0x0); - /* endianess will be swapped below */ + /* endianness will be swapped below */ tb[count] = (temp & 0xff); tb[count+1] = (temp & 0xff00)>>8; } diff --git a/sys/arch/octeon/dev/octxctl.c b/sys/arch/octeon/dev/octxctl.c index 7bcabb27418..7861e09bd54 100644 --- a/sys/arch/octeon/dev/octxctl.c +++ b/sys/arch/octeon/dev/octxctl.c @@ -1,4 +1,4 @@ -/* $OpenBSD: octxctl.c,v 1.4 2019/09/29 04:32:23 visa Exp $ */ +/* $OpenBSD: octxctl.c,v 1.5 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 2017 Visa Hankala @@ -315,7 +315,7 @@ octxctl_uctl_init(struct octxctl_softc *sc, uint64_t clock_freq, XCTL_WR_8(sc, XCTL_CTL, val); (void)XCTL_RD_8(sc, XCTL_CTL); - /* Fix endianess. */ + /* Fix endianness. */ val = XCTL_RD_8(sc, XCTL_SHIM_CFG); val &= ~XCTL_SHIM_CFG_CSR_BYTE_SWAP; val &= ~XCTL_SHIM_CFG_DMA_BYTE_SWAP; diff --git a/sys/arch/octeon/include/octeonvar.h b/sys/arch/octeon/include/octeonvar.h index fdf230b47b5..2ba34e615f0 100644 --- a/sys/arch/octeon/include/octeonvar.h +++ b/sys/arch/octeon/include/octeonvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: octeonvar.h,v 1.52 2021/03/09 14:13:33 visa Exp $ */ +/* $OpenBSD: octeonvar.h,v 1.53 2021/03/11 11:16:59 jsg Exp $ */ /* $NetBSD: maltavar.h,v 1.3 2002/03/18 10:10:16 simonb Exp $ */ /*- @@ -384,7 +384,7 @@ octeon_xkphys_write_8(paddr_t address, uint64_t value) /* * XXX - * This if would be better writen as: + * This if would be better written as: * if ((address & 0xffffff0000000000ULL) == OCTEON_MIO_BOOT_BASE) { * but octeonreg.h can't be included here and we want this inlined * diff --git a/sys/arch/powerpc/include/exec.h b/sys/arch/powerpc/include/exec.h index 06d8f5e0dbd..ab9c3a9e75e 100644 --- a/sys/arch/powerpc/include/exec.h +++ b/sys/arch/powerpc/include/exec.h @@ -1,4 +1,4 @@ -/* $OpenBSD: exec.h,v 1.15 2017/02/08 05:09:26 guenther Exp $ */ +/* $OpenBSD: exec.h,v 1.16 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 1997 Per Fogelstrom, Opsycon AB. @@ -24,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $Id: exec.h,v 1.15 2017/02/08 05:09:26 guenther Exp $ + * $Id: exec.h,v 1.16 2021/03/11 11:16:59 jsg Exp $ */ #ifndef _POWERPC_EXEC_H_ @@ -38,7 +38,7 @@ #define ELF_TARG_DATA ELFDATA2MSB #define ELF_TARG_MACH EM_PPC -/* Processor sepcific dynamic tag values. */ +/* Processor specific dynamic tag values. */ #define DT_PPC_GOT 0x70000000 #define DT_PROCNUM (DT_PPC_GOT - DT_LOPROC + 1) diff --git a/sys/arch/powerpc/isa/isa_machdep.h b/sys/arch/powerpc/isa/isa_machdep.h index 6ca622e361a..bcf08328174 100644 --- a/sys/arch/powerpc/isa/isa_machdep.h +++ b/sys/arch/powerpc/isa/isa_machdep.h @@ -1,4 +1,4 @@ -/* $OpenBSD: isa_machdep.h,v 1.8 2003/10/31 03:55:06 drahn Exp $ */ +/* $OpenBSD: isa_machdep.h,v 1.9 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 1997 Per Fogelstrom @@ -38,7 +38,7 @@ typedef struct ppc_isa_bus *isa_chipset_tag_t; /* * I/O macros to access isa bus ports/memory. - * At the first glance theese macros may seem inefficient. + * At the first glance these macros may seem inefficient. * However, the cpu executes an instruction every <10 ns * so the bus is much slower so it doesn't matter, really. */ diff --git a/sys/arch/powerpc/powerpc/pmap.c b/sys/arch/powerpc/powerpc/pmap.c index 2ed78325827..92bab4e4424 100644 --- a/sys/arch/powerpc/powerpc/pmap.c +++ b/sys/arch/powerpc/powerpc/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.173 2021/03/10 07:28:19 deraadt Exp $ */ +/* $OpenBSD: pmap.c,v 1.174 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 2015 Martin Pieuchot @@ -32,7 +32,7 @@ */ /* - * powerpc lazy icache managment. + * powerpc lazy icache management. * The icache does not snoop dcache accesses. The icache also will not load * modified data from the dcache, but the unmodified data in ram. * Before the icache is loaded, the dcache must be synced to ram to prevent @@ -473,7 +473,7 @@ PTED_VALID(struct pte_desc *pted) * One issue of making this a single data structure is that two pointers are * wasted for every page which does not map ram (device mappings), this * should be a low percentage of mapped pages in the system, so should not - * have too noticable unnecessary ram consumption. + * have too noticeable unnecessary ram consumption. */ void diff --git a/sys/arch/powerpc/powerpc/trap.c b/sys/arch/powerpc/powerpc/trap.c index 90dbd85442c..5caf4767910 100644 --- a/sys/arch/powerpc/powerpc/trap.c +++ b/sys/arch/powerpc/powerpc/trap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.c,v 1.118 2020/10/27 19:18:05 deraadt Exp $ */ +/* $OpenBSD: trap.c,v 1.119 2021/03/11 11:16:59 jsg Exp $ */ /* $NetBSD: trap.c,v 1.3 1996/10/13 03:31:37 christos Exp $ */ /* @@ -78,7 +78,7 @@ void trap(struct trapframe *frame); * and the contents of that register are not used to optimize the save. * * This can lead to VRSAVE corruption, data passing between processes, - * because this register is accessable without the MSR[VEC] bit set. + * because this register is accessible without the MSR[VEC] bit set. * To store/restore this cleanly a processor identifier bit would need * to be saved and this register saved on every context switch. * Since we do not use the information, we may be able to get by diff --git a/sys/arch/powerpc/powerpc/vm_machdep.c b/sys/arch/powerpc/powerpc/vm_machdep.c index 1f40c917991..3f6d41ae395 100644 --- a/sys/arch/powerpc/powerpc/vm_machdep.c +++ b/sys/arch/powerpc/powerpc/vm_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: vm_machdep.c,v 1.50 2020/09/11 09:27:10 mpi Exp $ */ +/* $OpenBSD: vm_machdep.c,v 1.51 2021/03/11 11:16:59 jsg Exp $ */ /* $NetBSD: vm_machdep.c,v 1.1 1996/09/30 16:34:57 ws Exp $ */ /* @@ -134,7 +134,7 @@ cpu_fork(struct proc *p1, struct proc *p2, void *stack, void *tcb, * We release the address space and machine-dependent resources, * including the memory for the user structure and kernel stack. * - * Since we don't have curproc anymore, we cannot sleep, and therefor + * Since we don't have curproc anymore, we cannot sleep, and therefore * this is at least incorrect for the multiprocessor version. * Not sure whether we can get away with this in the single proc version. XXX */ diff --git a/sys/arch/powerpc64/include/exec.h b/sys/arch/powerpc64/include/exec.h index 6ce09861984..45d62e4c7d6 100644 --- a/sys/arch/powerpc64/include/exec.h +++ b/sys/arch/powerpc64/include/exec.h @@ -1,4 +1,4 @@ -/* $OpenBSD: exec.h,v 1.3 2020/06/28 19:36:54 kettenis Exp $ */ +/* $OpenBSD: exec.h,v 1.4 2021/03/11 11:16:59 jsg Exp $ */ /* * Copyright (c) 2014 Patrick Wildt @@ -27,7 +27,7 @@ #define ELF_TARG_DATA ELFDATA2MSB #define ELF_TARG_MACH EM_PPC64 -/* Processor sepcific dynamic tag values. */ +/* Processor specific dynamic tag values. */ #define DT_PPC64_GLINK 0x70000000 #define DT_PPC64_OPT 0x70000003 diff --git a/sys/arch/powerpc64/include/smbiosvar.h b/sys/arch/powerpc64/include/smbiosvar.h index 7876cebc831..f237cc0a72d 100644 --- a/sys/arch/powerpc64/include/smbiosvar.h +++ b/sys/arch/powerpc64/include/smbiosvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: smbiosvar.h,v 1.1 2021/01/23 12:10:08 kettenis Exp $ */ +/* $OpenBSD: smbiosvar.h,v 1.2 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2006 Gordon Willem Klok * Copyright (c) 2005 Jordan Hargrave @@ -35,7 +35,7 @@ /* * Section 3.5 of "UUIDs and GUIDs" found at * http://www.opengroup.org/dce/info/draft-leach-uuids-guids-01.txt - * specifies the string repersentation of a UUID. + * specifies the string representation of a UUID. */ #define SMBIOS_UUID_REP "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x" #define SMBIOS_UUID_REPLEN 37 /* 16 zero padded values, 4 hyphens, 1 null */ diff --git a/sys/arch/powerpc64/include/trap.h b/sys/arch/powerpc64/include/trap.h index 8078cff5931..13905df90a0 100644 --- a/sys/arch/powerpc64/include/trap.h +++ b/sys/arch/powerpc64/include/trap.h @@ -65,7 +65,7 @@ /* The following are only available on 604/750/7400: */ #define EXC_PERF 0x0f00 /* Performance Monitoring */ #define EXC_BPT 0x1300 /* Instruction Breakpoint */ -#define EXC_SMI 0x1400 /* System Managment Interrupt */ +#define EXC_SMI 0x1400 /* System Management Interrupt */ /* The following are only available on 750/7400: */ #define EXC_THRM 0x1700 /* Thermal Management Interrupt */ diff --git a/sys/arch/sgi/dev/if_iecreg.h b/sys/arch/sgi/dev/if_iecreg.h index c9d2326eb0d..d9916472229 100644 --- a/sys/arch/sgi/dev/if_iecreg.h +++ b/sys/arch/sgi/dev/if_iecreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_iecreg.h,v 1.3 2009/11/03 21:41:42 miod Exp $ */ +/* $OpenBSD: if_iecreg.h,v 1.4 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2009 Miodrag Vallat. @@ -35,7 +35,7 @@ * IEC_RXDESCSIZE is the smallest multiple of 128 bytes (hardware requirement) * able to store ETHER_MAX_DIX_LEN bytes and the rxdesc administrative data. * - * IEC_RXD_BUFOFFSET is choosen to use a different cache line on the CPU. + * IEC_RXD_BUFOFFSET is chosen to use a different cache line on the CPU. * A value of 128 (IOC3 cache line) would be even better, but would not fit * in the MCR register. */ @@ -48,7 +48,7 @@ struct iec_rxdesc { #define IEC_RXSTAT_CHECKSUM_MASK 0x0000ffff uint32_t rxd_err; #define IEC_RXERR_CRC 0x00000001 /* CRC error */ -#define IEC_RXERR_FRAME 0x00000002 /* Framing erorr */ +#define IEC_RXERR_FRAME 0x00000002 /* Framing error */ #define IEC_RXERR_CODE 0x00000004 /* Code violation */ #define IEC_RXERR_INVPREAMB 0x00000008 /* Invalid preamble */ #define IEC_RXERR_MULTICAST 0x04000000 /* Multicast packet */ diff --git a/sys/arch/sgi/dev/mavb.c b/sys/arch/sgi/dev/mavb.c index 939d63dc51d..e62d908ff38 100644 --- a/sys/arch/sgi/dev/mavb.c +++ b/sys/arch/sgi/dev/mavb.c @@ -1,4 +1,4 @@ -/* $OpenBSD: mavb.c,v 1.21 2018/12/03 13:46:30 visa Exp $ */ +/* $OpenBSD: mavb.c,v 1.22 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2005 Mark Kettenis @@ -71,15 +71,15 @@ enum { AD1843_DAC1_GAIN, /* DAC1 Analog/Digital Gain/Attenuation */ AD1843_DAC1_MUTE, /* DAC1 Analog Mute */ AD1843_DAC2_GAIN, /* DAC2 Mix Gain */ - AD1843_AUX1_GAIN, /* Auxilliary 1 Mix Gain */ - AD1843_AUX2_GAIN, /* Auxilliary 2 Mix Gain */ - AD1843_AUX3_GAIN, /* Auxilliary 3 Mix Gain */ + AD1843_AUX1_GAIN, /* Auxiliary 1 Mix Gain */ + AD1843_AUX2_GAIN, /* Auxiliary 2 Mix Gain */ + AD1843_AUX3_GAIN, /* Auxiliary 3 Mix Gain */ AD1843_MIC_GAIN, /* Microphone Mix Gain */ AD1843_MONO_GAIN, /* Mono Mix Gain */ AD1843_DAC2_MUTE, /* DAC2 Mix Mute */ - AD1843_AUX1_MUTE, /* Auxilliary 1 Mix Mute */ - AD1843_AUX2_MUTE, /* Auxilliary 2 Mix Mute */ - AD1843_AUX3_MUTE, /* Auxilliary 3 Mix Mute */ + AD1843_AUX1_MUTE, /* Auxiliary 1 Mix Mute */ + AD1843_AUX2_MUTE, /* Auxiliary 2 Mix Mute */ + AD1843_AUX3_MUTE, /* Auxiliary 3 Mix Mute */ AD1843_MIC_MUTE, /* Microphone Mix Mute */ AD1843_MONO_MUTE, /* Mono Mix Mute */ AD1843_SUM_MUTE, /* Sum Mute */ diff --git a/sys/arch/sgi/gio/gio.c b/sys/arch/sgi/gio/gio.c index 2fa7d1362f7..4175cc24f50 100644 --- a/sys/arch/sgi/gio/gio.c +++ b/sys/arch/sgi/gio/gio.c @@ -1,4 +1,4 @@ -/* $OpenBSD: gio.c,v 1.18 2014/05/19 21:18:42 miod Exp $ */ +/* $OpenBSD: gio.c,v 1.19 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: gio.c,v 1.32 2011/07/01 18:53:46 dyoung Exp $ */ /* @@ -745,7 +745,7 @@ gio_arb_config(int slot, uint32_t flags) * buffer!) in the specified slot. * * Indy and Challenge S have a single GIO interrupt per GIO slot, but - * distinct slot interrups. Indigo and Indigo2 have three GIO interrupts per + * distinct slot interrupts. Indigo and Indigo2 have three GIO interrupts per * slot, but at a given GIO interrupt level, all slots share the same * interrupt on the interrupt controller. * diff --git a/sys/arch/sgi/hpc/hpcdma.h b/sys/arch/sgi/hpc/hpcdma.h index bca5fc5b171..007e9ccfb1b 100644 --- a/sys/arch/sgi/hpc/hpcdma.h +++ b/sys/arch/sgi/hpc/hpcdma.h @@ -1,4 +1,4 @@ -/* $OpenBSD: hpcdma.h,v 1.1 2012/03/28 20:44:23 miod Exp $ */ +/* $OpenBSD: hpcdma.h,v 1.2 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: hpcdma.h,v 1.11 2011/07/01 18:53:46 dyoung Exp $ */ /* @@ -51,7 +51,7 @@ struct hpc_dma_softc { bus_dmamap_t sc_dmamap; struct hpc_dma_desc *sc_desc_kva; /* Virtual address */ bus_addr_t sc_desc_pa; /* DMA address */ - ssize_t sc_dlen; /* number of bytes transfered */ + ssize_t sc_dlen; /* number of bytes transferred */ struct hpc_values *hpc; /* constants for HPC1/3 */ }; diff --git a/sys/arch/sgi/hpc/if_sq.c b/sys/arch/sgi/hpc/if_sq.c index 89f704b8f6c..42395c3be6d 100644 --- a/sys/arch/sgi/hpc/if_sq.c +++ b/sys/arch/sgi/hpc/if_sq.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_sq.c,v 1.30 2020/07/10 13:26:36 patrick Exp $ */ +/* $OpenBSD: if_sq.c,v 1.31 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: if_sq.c,v 1.42 2011/07/01 18:53:47 dyoung Exp $ */ /* @@ -677,7 +677,7 @@ sq_start(struct ifnet *ifp) /* * Load the DMA map. If this fails, the packet either - * didn't fit in the alloted number of segments, or we were + * didn't fit in the allotted number of segments, or we were * short on resources. In this case, we'll copy and try * again. * Also copy it if we need to pad, so that we are sure there diff --git a/sys/arch/sgi/hpc/zs.c b/sys/arch/sgi/hpc/zs.c index 3f56d4b2bc0..2dc8a354180 100644 --- a/sys/arch/sgi/hpc/zs.c +++ b/sys/arch/sgi/hpc/zs.c @@ -1,4 +1,4 @@ -/* $OpenBSD: zs.c,v 1.16 2017/12/30 20:46:59 guenther Exp $ */ +/* $OpenBSD: zs.c,v 1.17 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: zs.c,v 1.37 2011/02/20 07:59:50 matt Exp $ */ /*- @@ -433,7 +433,7 @@ zs_set_modes(struct zs_chanstate *cs, int cflag) /* * Output hardware flow control on the chip is horrendous: * if carrier detect drops, the receiver is disabled, and if - * CTS drops, the transmitter is stoped IN MID CHARACTER! + * CTS drops, the transmitter is stopped IN MID CHARACTER! * Therefore, NEVER set the HFC bit, and instead use the * status interrupt to detect CTS changes. */ diff --git a/sys/arch/sgi/localbus/macebus.c b/sys/arch/sgi/localbus/macebus.c index bfb7b2d7162..fcc43a1892e 100644 --- a/sys/arch/sgi/localbus/macebus.c +++ b/sys/arch/sgi/localbus/macebus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: macebus.c,v 1.69 2018/12/03 13:50:02 visa Exp $ */ +/* $OpenBSD: macebus.c,v 1.70 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2000-2004 Opsycon AB (www.opsycon.se) @@ -613,7 +613,7 @@ macebus_iointr_skip(struct intrhand *ih, uint64_t mace_isr, uint64_t mace_imr) } /* - * Macebus auxilary functions run each clock interrupt. + * Macebus auxiliary functions run each clock interrupt. */ uint32_t macebus_aux(uint32_t hwpend, struct trapframe *cf) diff --git a/sys/arch/sgi/localbus/tcc.c b/sys/arch/sgi/localbus/tcc.c index 490a90fc977..c8a85dfc5e5 100644 --- a/sys/arch/sgi/localbus/tcc.c +++ b/sys/arch/sgi/localbus/tcc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: tcc.c,v 1.10 2016/03/06 19:42:27 mpi Exp $ */ +/* $OpenBSD: tcc.c,v 1.11 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2012 Miodrag Vallat. @@ -136,7 +136,7 @@ tcc_bus_error(uint32_t hwpend, struct trapframe *tf) } /* - * Cache maintainance routines + * Cache maintenance routines */ #define tcc_cache_hit(addr,op) \ diff --git a/sys/arch/sgi/xbow/odyssey.c b/sys/arch/sgi/xbow/odyssey.c index 00e3a552525..fa5595611c6 100644 --- a/sys/arch/sgi/xbow/odyssey.c +++ b/sys/arch/sgi/xbow/odyssey.c @@ -1,4 +1,4 @@ -/* $OpenBSD: odyssey.c,v 1.14 2020/05/25 09:55:48 jsg Exp $ */ +/* $OpenBSD: odyssey.c,v 1.15 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2009, 2010 Joel Sing * @@ -449,7 +449,7 @@ odyssey_setup(struct odyssey_softc *sc) odyssey_cmd_flush(sc, 0); /* - * Initalise Pixel Blaster & Jammer. + * Initialise Pixel Blaster & Jammer. */ for (i = 0; i < 32; i++) { if ((i & 0xf) == 0) diff --git a/sys/arch/sgi/xbow/xbow.c b/sys/arch/sgi/xbow/xbow.c index 10e86e5186f..8545c87c266 100644 --- a/sys/arch/sgi/xbow/xbow.c +++ b/sys/arch/sgi/xbow/xbow.c @@ -1,4 +1,4 @@ -/* $OpenBSD: xbow.c,v 1.35 2014/09/30 06:51:58 jmatthew Exp $ */ +/* $OpenBSD: xbow.c,v 1.36 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2008, 2009, 2011 Miodrag Vallat. @@ -145,7 +145,7 @@ static const bus_space_t xbowbus_tag = { }; /* - * Function pointers to hide widget discovery and mapping differences accross + * Function pointers to hide widget discovery and mapping differences across * systems. */ paddr_t (*xbow_widget_base)(int16_t, u_int); diff --git a/sys/arch/sgi/xbow/xbridge.c b/sys/arch/sgi/xbow/xbridge.c index 7787e7a76e3..1a240728ac1 100644 --- a/sys/arch/sgi/xbow/xbridge.c +++ b/sys/arch/sgi/xbow/xbridge.c @@ -1,4 +1,4 @@ -/* $OpenBSD: xbridge.c,v 1.102 2017/05/11 15:47:45 visa Exp $ */ +/* $OpenBSD: xbridge.c,v 1.103 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2008, 2009, 2011 Miodrag Vallat. @@ -54,7 +54,7 @@ IMPORTANT! there is a limited number of IOTTE per Crossbow: 7, of which the seventh is used to workaround a hardware bug, leaving only 6 entries - available accross all widgets. + available across all widgets. Each IOTTE opens a contiguous window of 28 or 29 bits, depending on the particular system model and configuration. On Origin 300/3000 and 350/3500, @@ -88,7 +88,7 @@ So now is a good time to introduce the devio. - There are 8 devio registers, one per device; theses registers contain various + There are 8 devio registers, one per device; these registers contain various device-global flags (such as byte swapping and coherency), as well as the location of a ``devio window'' in one of the address spaces, selected on a per-devio basis. @@ -207,7 +207,7 @@ pins A and C map of devices 0-7 map to interrupt sources 0-7, and pins B and D of devices 0-7 map to interrupt sources 4-7 then 0-3 (i.e. device# ^ 4). - All interrupts occuring on the Bridge cause an XIO interrupt packet to be + All interrupts occurring on the Bridge cause an XIO interrupt packet to be sent to the XIO interrupt address programmed at Bridge initialization time; packets can be configured as self-clearing or not on an interrupt source basis. @@ -220,12 +220,12 @@ - - endianness Endianness control is quite finegrained and quite complex at first glance: - - memory and I/O accesses not occuring within devio ranges have their + - memory and I/O accesses not occurring within devio ranges have their endianness controlled by the endianness flags in the (global) Bridge configuration register... - ... to which adds the per-device endianness flag in the device devio register... - - and accesses occuring through devio register only use the + - and accesses occurring through devio register only use the per-device devio register mentioned above, even if the devio range is defined in a different register! @@ -1081,7 +1081,7 @@ xbridge_conf_write(void *cookie, pcitag_t tag, int offset, pcireg_t data) /* * Some IOC3 models do not support having this bit * cleared (which is what pci_mapreg_probe() will - * do), so we set it unconditionnaly. + * do), so we set it unconditionally. */ data |= PCI_COMMAND_MEM_ENABLE; /* FALLTHROUGH */ diff --git a/sys/arch/sgi/xbow/xbridgereg.h b/sys/arch/sgi/xbow/xbridgereg.h index b345b624623..c473f2b3cdb 100644 --- a/sys/arch/sgi/xbow/xbridgereg.h +++ b/sys/arch/sgi/xbow/xbridgereg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: xbridgereg.h,v 1.15 2015/06/16 18:24:38 miod Exp $ */ +/* $OpenBSD: xbridgereg.h,v 1.16 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2008, 2009 Miodrag Vallat. @@ -131,7 +131,7 @@ #define BRIDGE_ISR_PCIX_D_PARITY 0x0000000200000000ULL /* PCI-X address or attribute cycle parity error */ #define BRIDGE_ISR_PCIX_A_PARITY 0x0000000100000000ULL -/* multiple errors occured - bridge only */ +/* multiple errors occurred - bridge only */ #define BRIDGE_ISR_MULTIPLE_ERR 0x0000000080000000ULL /* PMU access fault */ #define BRIDGE_ISR_PMU_ESIZE_FAULT 0x0000000040000000ULL diff --git a/sys/arch/sh/dev/scifreg.h b/sys/arch/sh/dev/scifreg.h index 3baf31f7f90..275bc818b8f 100644 --- a/sys/arch/sh/dev/scifreg.h +++ b/sys/arch/sh/dev/scifreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: scifreg.h,v 1.1.1.1 2006/10/06 21:02:55 miod Exp $ */ +/* $OpenBSD: scifreg.h,v 1.2 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: scifreg.h,v 1.10 2006/02/18 00:41:32 uwe Exp $ */ /*- @@ -121,7 +121,7 @@ /* SCR: serial control */ #define SCSCR2_TIE 0x80 /* Transmit Interrupt Enable */ -#define SCSCR2_RIE 0x40 /* Recieve Interrupt Enable */ +#define SCSCR2_RIE 0x40 /* Receive Interrupt Enable */ #define SCSCR2_TE 0x20 /* Transmit Enable */ #define SCSCR2_RE 0x10 /* Receive Enable */ #define SCSCR2_CKE1 0x02 /* ClocK Enable 1 */ @@ -134,7 +134,7 @@ #define SCSSR2_BRK 0x0010 /* BReaK detection */ #define SCSSR2_FER 0x0008 /* Framing ERror */ #define SCSSR2_PER 0x0004 /* Parity ERror */ -#define SCSSR2_RDF 0x0002 /* Recieve fifo Data Full */ +#define SCSSR2_RDF 0x0002 /* Receive fifo Data Full */ #define SCSSR2_DR 0x0001 /* Data Ready */ /* FCR: fifo control */ diff --git a/sys/arch/sh/sh/trap.c b/sys/arch/sh/sh/trap.c index b092cc23490..b75d7582038 100644 --- a/sys/arch/sh/sh/trap.c +++ b/sys/arch/sh/sh/trap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.c,v 1.47 2020/10/21 19:12:58 deraadt Exp $ */ +/* $OpenBSD: trap.c,v 1.48 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: exception.c,v 1.32 2006/09/04 23:57:52 uwe Exp $ */ /* $NetBSD: syscall.c,v 1.6 2006/03/07 07:21:50 thorpej Exp $ */ @@ -147,7 +147,7 @@ void cachectl(struct proc *, struct trapframe *); /* * void general_exception(struct proc *p, struct trapframe *tf): - * p ... curproc when exception occured. + * p ... curproc when exception occurred. * tf ... full user context. * va ... fault va for user mode EXPEVT_ADDR_ERR_{LD,ST} */ @@ -163,7 +163,7 @@ general_exception(struct proc *p, struct trapframe *tf, uint32_t va) /* * This function is entered at splhigh. Restore the interrupt - * level to what it was when the trap occured. + * level to what it was when the trap occurred. */ splx(tf->tf_ssr & PSL_IMASK); @@ -307,7 +307,7 @@ do_panic: /* * void tlb_exception(struct proc *p, struct trapframe *tf, uint32_t va): - * p ... curproc when exception occured. + * p ... curproc when exception occurred. * tf ... full user context. * va ... fault address. */ @@ -331,7 +331,7 @@ tlb_exception(struct proc *p, struct trapframe *tf, uint32_t va) /* * This function is entered at splhigh. Restore the interrupt - * level to what it was when the trap occured. + * level to what it was when the trap occurred. */ splx(tf->tf_ssr & PSL_IMASK); @@ -464,7 +464,7 @@ tlb_panic: /* * void ast(struct proc *p, struct trapframe *tf): - * p ... curproc when exception occured. + * p ... curproc when exception occurred. * tf ... full user context. * This is called upon exception return. if return from kernel to user, * handle asynchronous software traps and context switch if needed. diff --git a/sys/arch/sparc64/dev/ebus_mainbus.c b/sys/arch/sparc64/dev/ebus_mainbus.c index 7bfd7193b85..e78a6f56b7f 100644 --- a/sys/arch/sparc64/dev/ebus_mainbus.c +++ b/sys/arch/sparc64/dev/ebus_mainbus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ebus_mainbus.c,v 1.10 2016/08/23 03:28:01 guenther Exp $ */ +/* $OpenBSD: ebus_mainbus.c,v 1.11 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2007 Mark Kettenis @@ -126,8 +126,8 @@ ebus_mainbus_attach(struct device *parent, struct device *self, void *aux) /* * Ebus interrupts may be connected to any of the PCI Express * leafs. Here we add the appropriate IGN to the interrupt - * mappings such that we can use it to distingish between - * intterupts connected to PCIE-A and PCIE-B. + * mappings such that we can use it to distinguish between + * interrupts connected to PCIE-A and PCIE-B. */ for (i = 0; i < sc->sc_nintmap; i++) { for (j = 0; j < pyro_cd.cd_ndevs; j++) { diff --git a/sys/arch/sparc64/dev/ifb.c b/sys/arch/sparc64/dev/ifb.c index 9286d2a0a0d..394b51120df 100644 --- a/sys/arch/sparc64/dev/ifb.c +++ b/sys/arch/sparc64/dev/ifb.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ifb.c,v 1.23 2020/05/25 09:55:48 jsg Exp $ */ +/* $OpenBSD: ifb.c,v 1.24 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2007, 2008, 2009 Miodrag Vallat. @@ -602,7 +602,7 @@ ifb_dac_value(u_int r, u_int g, u_int b) /* * Convert 8 bit values to 10 bit scale, by shifting and inserting * the former high bits in the low two bits. - * Simply shifting is sligthly too dull. + * Simply shifting is slightly too dull. */ r = (r << 2) | (r >> 6); g = (g << 2) | (g >> 6); diff --git a/sys/arch/sparc64/dev/iommu.c b/sys/arch/sparc64/dev/iommu.c index 9c55df445b8..731fbf4c04b 100644 --- a/sys/arch/sparc64/dev/iommu.c +++ b/sys/arch/sparc64/dev/iommu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: iommu.c,v 1.80 2020/01/01 15:00:07 kn Exp $ */ +/* $OpenBSD: iommu.c,v 1.81 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: iommu.c,v 1.47 2002/02/08 20:03:45 eeh Exp $ */ /* @@ -893,7 +893,7 @@ iommu_dvmamap_load_raw(bus_dma_tag_t t, bus_dma_tag_t t0, bus_dmamap_t map, struct iommu_state *is; struct iommu_map_state *ims; - KASSERTMSG(map->dm_nsegs == 0, "map stil in use"); + KASSERTMSG(map->dm_nsegs == 0, "map still in use"); /* * A boundary presented to bus_dmamem_alloc() takes precedence diff --git a/sys/arch/sparc64/dev/iommuvar.h b/sys/arch/sparc64/dev/iommuvar.h index b6c7ce06ef7..71eab25a6ad 100644 --- a/sys/arch/sparc64/dev/iommuvar.h +++ b/sys/arch/sparc64/dev/iommuvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: iommuvar.h,v 1.18 2019/06/25 22:30:56 dlg Exp $ */ +/* $OpenBSD: iommuvar.h,v 1.19 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: iommuvar.h,v 1.9 2001/10/07 20:30:41 eeh Exp $ */ /* @@ -52,7 +52,7 @@ struct strbuf_ctl { * flush areas are not used other than as a boolean flag to indicate * the presence of a working and enabled STC. For inconsistency's * sake, the "sb" pointers of iommu_state are sometimes used for the - * same purpose. This should be consolidated. DEFINATELY, since + * same purpose. This should be consolidated. DEFINITELY, since * mutex operations must happen at this level. */ struct mutex sb_mtx; /* one flush at a time */ diff --git a/sys/arch/sparc64/dev/pcfiic_ebus.c b/sys/arch/sparc64/dev/pcfiic_ebus.c index 3d782600595..a20610a245a 100644 --- a/sys/arch/sparc64/dev/pcfiic_ebus.c +++ b/sys/arch/sparc64/dev/pcfiic_ebus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pcfiic_ebus.c,v 1.13 2008/06/08 03:07:40 deraadt Exp $ */ +/* $OpenBSD: pcfiic_ebus.c,v 1.14 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2006 David Gwynne @@ -190,17 +190,17 @@ envctrl_scan(struct device *self, struct i2cbus_attach_args *iba, void *aux) ia.ia_name = "ecadc"; config_found(self, &ia, iic_print); - /* Power supply 2 termperature. */ + /* Power supply 2 temperature. */ ia.ia_addr = 0x49; ia.ia_name = "ecadc"; config_found(self, &ia, iic_print); - /* Power supply 3 tempterature. */ + /* Power supply 3 temperature. */ ia.ia_addr = 0x4a; ia.ia_name = "ecadc"; config_found(self, &ia, iic_print); - /* Ambient tempterature. */ + /* Ambient temperature. */ ia.ia_addr = 0x4d; ia.ia_name = "lm75"; config_found(self, &ia, iic_print); diff --git a/sys/arch/sparc64/dev/psychoreg.h b/sys/arch/sparc64/dev/psychoreg.h index 5d174d76702..a8056ccb818 100644 --- a/sys/arch/sparc64/dev/psychoreg.h +++ b/sys/arch/sparc64/dev/psychoreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: psychoreg.h,v 1.13 2008/07/20 10:37:43 kettenis Exp $ */ +/* $OpenBSD: psychoreg.h,v 1.14 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: psychoreg.h,v 1.6.4.2 2001/09/13 01:14:40 thorpej Exp $ */ /* @@ -241,7 +241,7 @@ struct psychoreg { * accesses. Memory space can use any sized accesses. * * Note that the SUNW,sabre/SUNW,simba combinations found on the - * Ultra5 and Ultra10 machines uses slightly differrent addresses + * Ultra5 and Ultra10 machines uses slightly different addresses * than the above. This is mostly due to the fact that the APB is * a multi-function PCI device with two PCI bridges, and the U2P is * two separate PCI bridges. It uses the same PCI configuration @@ -357,7 +357,7 @@ struct psychoreg { */ /* - * For the physical addresses split into 3 32 bit values, we deocde + * For the physical addresses split into 3 32 bit values, we decode * them like the following (IEEE1275 PCI Bus binding 2.0, 2.2.1.1 * Numerical Representation): * diff --git a/sys/arch/sparc64/dev/raptor.c b/sys/arch/sparc64/dev/raptor.c index a11882e1dc9..f68884f2cd6 100644 --- a/sys/arch/sparc64/dev/raptor.c +++ b/sys/arch/sparc64/dev/raptor.c @@ -1,4 +1,4 @@ -/* $OpenBSD: raptor.c,v 1.9 2020/05/25 09:55:48 jsg Exp $ */ +/* $OpenBSD: raptor.c,v 1.10 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2009 Mark Kettenis. @@ -37,7 +37,7 @@ /* * Tech Source uses the Raptor name for most of its graphics cards. - * This driver supports the origional Raptor GFX cards built around + * This driver supports the original Raptor GFX cards built around * the Number 9 Imagine-128 chips. * * Official documentation for the Imagine-128 isn't available. The diff --git a/sys/arch/sparc64/dev/uperf_ebus.c b/sys/arch/sparc64/dev/uperf_ebus.c index 406918d9984..c63cb25da49 100644 --- a/sys/arch/sparc64/dev/uperf_ebus.c +++ b/sys/arch/sparc64/dev/uperf_ebus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: uperf_ebus.c,v 1.6 2017/09/08 05:36:52 deraadt Exp $ */ +/* $OpenBSD: uperf_ebus.c,v 1.7 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2002 Jason L. Wright (jason@thought.net) @@ -182,7 +182,7 @@ uperf_ebus_read_reg(sc, r) bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_ADDR, 1, BUS_SPACE_BARRIER_WRITE); - /* Can't use multi reads because we have to gaurantee order */ + /* Can't use multi reads because we have to guarantee order */ v = bus_space_read_1(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 0); bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 0, 1, @@ -223,7 +223,7 @@ uperf_ebus_write_reg(sc, r, v) bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_ADDR, 1, BUS_SPACE_BARRIER_WRITE); - /* Can't use multi writes because we have to gaurantee order */ + /* Can't use multi writes because we have to guarantee order */ bus_space_write_1(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 0, (v >> 24) & 0xff); diff --git a/sys/arch/sparc64/dev/vdsk.c b/sys/arch/sparc64/dev/vdsk.c index 3bd4b457c65..f9191142e1f 100644 --- a/sys/arch/sparc64/dev/vdsk.c +++ b/sys/arch/sparc64/dev/vdsk.c @@ -1,4 +1,4 @@ -/* $OpenBSD: vdsk.c,v 1.70 2020/10/16 03:59:24 jsg Exp $ */ +/* $OpenBSD: vdsk.c,v 1.71 2021/03/11 11:17:00 jsg Exp $ */ /* * Copyright (c) 2009, 2011 Mark Kettenis * @@ -327,7 +327,7 @@ vdsk_attach(struct device *parent, struct device *self, void *aux) /* * Interrupts aren't enabled during autoconf, so poll for VIO - * peer-to-peer hanshake completion. + * peer-to-peer handshake completion. */ s = splbio(); timeout = 1000; diff --git a/sys/arch/sparc64/fpu/fpu_sqrt.c b/sys/arch/sparc64/fpu/fpu_sqrt.c index f8c6cbbbca1..bbf1fbf1d65 100644 --- a/sys/arch/sparc64/fpu/fpu_sqrt.c +++ b/sys/arch/sparc64/fpu/fpu_sqrt.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpu_sqrt.c,v 1.4 2014/09/14 18:40:49 kettenis Exp $ */ +/* $OpenBSD: fpu_sqrt.c,v 1.5 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: fpu_sqrt.c,v 1.2 1994/11/20 20:52:46 deraadt Exp $ */ /* @@ -124,7 +124,7 @@ * zero bit at the top of x. Doing so means that q is not going to acquire * a 1 bit in the first trip around the loop (since x0 < 2^NBITS). If the * final value in x is not needed, or can be off by a factor of 2, this is - * equivalant to moving the `x *= 2' step to the bottom of the loop: + * equivalent to moving the `x *= 2' step to the bottom of the loop: * * for k = NBITS-1 to 0 step -1 do if ... fi; x *= 2; done * diff --git a/sys/arch/sparc64/sparc64/autoconf.c b/sys/arch/sparc64/sparc64/autoconf.c index 22dc038d5c5..4595998b440 100644 --- a/sys/arch/sparc64/sparc64/autoconf.c +++ b/sys/arch/sparc64/sparc64/autoconf.c @@ -1,4 +1,4 @@ -/* $OpenBSD: autoconf.c,v 1.138 2020/08/26 03:29:06 visa Exp $ */ +/* $OpenBSD: autoconf.c,v 1.139 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: autoconf.c,v 1.51 2001/07/24 19:32:11 eeh Exp $ */ /* @@ -941,7 +941,7 @@ extern bus_space_tag_t mainbus_space_tag; * description of the machine that is generally more * informative than the "name" property. However, if the * "banner-name" property is missing, fall back on the "name" - * propery. + * property. */ if (OF_getprop(findroot(), "banner-name", buf, sizeof(buf)) > 0 || OF_getprop(findroot(), "name", buf, sizeof(buf)) > 0) diff --git a/sys/arch/sparc64/sparc64/clock.c b/sys/arch/sparc64/sparc64/clock.c index 1b6bd63b681..0ddf3537a40 100644 --- a/sys/arch/sparc64/sparc64/clock.c +++ b/sys/arch/sparc64/sparc64/clock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: clock.c,v 1.69 2021/02/23 15:47:53 cheloha Exp $ */ +/* $OpenBSD: clock.c,v 1.70 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: clock.c,v 1.41 2001/07/24 19:29:25 eeh Exp $ */ /* @@ -572,7 +572,7 @@ cpu_initclocks(void) /* * UltraSPARC IIe processors do have a STICK register, but it - * lives on the PCI host bridge and isn't accessable through + * lives on the PCI host bridge and isn't accessible through * ASR24. */ if (CPU_ISSUN4U || CPU_ISSUN4US) diff --git a/sys/arch/sparc64/sparc64/trap.c b/sys/arch/sparc64/sparc64/trap.c index 2b9e05d0d2f..d8641812b31 100644 --- a/sys/arch/sparc64/sparc64/trap.c +++ b/sys/arch/sparc64/sparc64/trap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.c,v 1.107 2020/10/23 16:54:35 deraadt Exp $ */ +/* $OpenBSD: trap.c,v 1.108 2021/03/11 11:17:00 jsg Exp $ */ /* $NetBSD: trap.c,v 1.73 2001/08/09 01:03:01 eeh Exp $ */ /* @@ -380,7 +380,7 @@ trap(struct trapframe64 *tf, unsigned type, vaddr_t pc, long tstate) #endif /* * The kernel needs to use FPU registers for block - * load/store. If we trap in priviliged code, save + * load/store. If we trap in privileged code, save * the FPU state if there is any and enable the FPU. * * We rely on the kernel code properly enabling the FPU @@ -903,7 +903,7 @@ data_access_error(struct trapframe64 *tf, unsigned type, vaddr_t afva, } /* - * If this was a priviliged error but not a probe, we + * If this was a privileged error but not a probe, we * cannot recover, so panic. */ if (afsr & ASFR_PRIV) { -- 2.20.1