From 30335e0ae965942aa1266ec349274d6e35873054 Mon Sep 17 00:00:00 2001 From: jsg Date: Sun, 18 Jan 2015 12:03:11 +0000 Subject: [PATCH] The 'mrs' instruction only deals with the whole register without masking. Remove the use of cpsr_all/spsr_all with 'mrs' and just use the register names. This matches the arm docs and avoids confusion as cpsr_all/spsr_all don't include bits 23->8 when used with the 'msr' instruction but do with 'mrs'. --- sys/arch/arm/arm/cpufunc_asm_sa1.S | 6 +++--- sys/arch/arm/arm/cpufunc_asm_xscale.S | 6 +++--- sys/arch/arm/arm/exception.S | 6 +++--- sys/arch/arm/arm/fiq_subr.S | 4 ++-- sys/arch/arm/include/frame.h | 6 +++--- sys/arch/zaurus/stand/zbsdmod/zbsdmod.c | 4 ++-- 6 files changed, 16 insertions(+), 16 deletions(-) diff --git a/sys/arch/arm/arm/cpufunc_asm_sa1.S b/sys/arch/arm/arm/cpufunc_asm_sa1.S index f198b2f1a74..e17a95fb5f8 100644 --- a/sys/arch/arm/arm/cpufunc_asm_sa1.S +++ b/sys/arch/arm/arm/cpufunc_asm_sa1.S @@ -1,4 +1,4 @@ -/* $OpenBSD: cpufunc_asm_sa1.S,v 1.3 2011/09/20 22:11:40 miod Exp $ */ +/* $OpenBSD: cpufunc_asm_sa1.S,v 1.4 2015/01/18 12:03:11 jsg Exp $ */ /* $NetBSD: cpufunc_asm_sa1.S,v 1.8 2002/08/17 16:36:32 thorpej Exp $ */ /* @@ -46,7 +46,7 @@ * addresses that are about to change. */ ENTRY(sa1_setttb) - mrs r3, cpsr_all + mrs r3, cpsr orr r1, r3, #(I32_bit | F32_bit) msr cpsr_all, r1 @@ -131,7 +131,7 @@ _C_LABEL(sa1_cache_clean_size): .word _C_LABEL(sa1_cache_clean_size) #define SA1_CACHE_CLEAN_BLOCK \ - mrs r3, cpsr_all ; \ + mrs r3, cpsr ; \ orr r0, r3, #(I32_bit | F32_bit) ; \ msr cpsr_all, r0 diff --git a/sys/arch/arm/arm/cpufunc_asm_xscale.S b/sys/arch/arm/arm/cpufunc_asm_xscale.S index 33decf66ce0..b77df2e27bc 100644 --- a/sys/arch/arm/arm/cpufunc_asm_xscale.S +++ b/sys/arch/arm/arm/cpufunc_asm_xscale.S @@ -1,4 +1,4 @@ -/* $OpenBSD: cpufunc_asm_xscale.S,v 1.4 2011/09/20 22:11:40 miod Exp $ */ +/* $OpenBSD: cpufunc_asm_xscale.S,v 1.5 2015/01/18 12:03:11 jsg Exp $ */ /* $NetBSD: cpufunc_asm_xscale.S,v 1.16 2002/08/17 16:36:32 thorpej Exp $ */ /* @@ -128,7 +128,7 @@ ENTRY(xscale_control) * addresses that are about to change. */ ENTRY(xscale_setttb) - mrs r3, cpsr_all + mrs r3, cpsr orr r1, r3, #(I32_bit | F32_bit) msr cpsr_all, r1 @@ -244,7 +244,7 @@ _C_LABEL(xscale_cache_clean_size): .word _C_LABEL(xscale_minidata_clean_size) #define XSCALE_CACHE_CLEAN_BLOCK \ - mrs r3, cpsr_all ; \ + mrs r3, cpsr ; \ orr r0, r3, #(I32_bit | F32_bit) ; \ msr cpsr_all, r0 diff --git a/sys/arch/arm/arm/exception.S b/sys/arch/arm/arm/exception.S index 0674628efba..539a481e98a 100644 --- a/sys/arch/arm/arm/exception.S +++ b/sys/arch/arm/arm/exception.S @@ -1,4 +1,4 @@ -/* $OpenBSD: exception.S,v 1.4 2015/01/18 10:17:41 jsg Exp $ */ +/* $OpenBSD: exception.S,v 1.5 2015/01/18 12:03:11 jsg Exp $ */ /* $NetBSD: exception.S,v 1.13 2003/10/31 16:30:15 scw Exp $ */ /* @@ -169,8 +169,8 @@ abortdatamsg: * it like a Data Abort. */ ASENTRY_NP(address_exception_entry) - mrs r1, cpsr_all - mrs r2, spsr_all + mrs r1, cpsr + mrs r2, spsr mov r3, lr adr r0, Laddress_exception_msg bl _C_LABEL(printf) /* XXX CLOBBERS LR!! */ diff --git a/sys/arch/arm/arm/fiq_subr.S b/sys/arch/arm/arm/fiq_subr.S index 860a79fad3e..34a3147517c 100644 --- a/sys/arch/arm/arm/fiq_subr.S +++ b/sys/arch/arm/arm/fiq_subr.S @@ -1,4 +1,4 @@ -/* $OpenBSD: fiq_subr.S,v 1.2 2011/09/20 22:02:11 miod Exp $ */ +/* $OpenBSD: fiq_subr.S,v 1.3 2015/01/18 12:03:11 jsg Exp $ */ /* $NetBSD: fiq_subr.S,v 1.3 2002/04/12 18:50:31 thorpej Exp $ */ /* @@ -43,7 +43,7 @@ #include #define SWITCH_TO_FIQ_MODE \ - mrs r2, cpsr_all ; \ + mrs r2, cpsr ; \ mov r3, r2 ; \ bic r2, r2, #(PSR_MODE) ; \ orr r2, r2, #(PSR_FIQ32_MODE) ; \ diff --git a/sys/arch/arm/include/frame.h b/sys/arch/arm/include/frame.h index 2fab91ef9ea..e55378f802a 100644 --- a/sys/arch/arm/include/frame.h +++ b/sys/arch/arm/include/frame.h @@ -1,4 +1,4 @@ -/* $OpenBSD: frame.h,v 1.4 2011/09/20 22:02:13 miod Exp $ */ +/* $OpenBSD: frame.h,v 1.5 2015/01/18 12:03:11 jsg Exp $ */ /* $NetBSD: frame.h,v 1.9 2003/12/01 08:48:33 scw Exp $ */ /* @@ -207,7 +207,7 @@ struct frame { sub sp, sp, #(4*17); /* Adjust the stack pointer */ \ stmia sp, {r0-r14}^; /* Push the user mode registers */ \ mov r0, r0; /* NOP for previous instruction */ \ - mrs r0, spsr_all; /* Put the SPSR on the stack */ \ + mrs r0, spsr; /* Put the SPSR on the stack */ \ str r0, [sp, #-4]! /* @@ -249,7 +249,7 @@ struct frame { sub sp, sp, #(4*15); /* Adjust the stack pointer */ \ stmia sp, {r0-r14}^; /* Push the user mode registers */ \ mov r0, r0; /* NOP for previous instruction */ \ - mrs r0, spsr_all; /* Put the SPSR on the stack */ \ + mrs r0, spsr; /* Put the SPSR on the stack */ \ str r0, [sp, #-4]! /* diff --git a/sys/arch/zaurus/stand/zbsdmod/zbsdmod.c b/sys/arch/zaurus/stand/zbsdmod/zbsdmod.c index 91281d03880..992bbbc61e6 100644 --- a/sys/arch/zaurus/stand/zbsdmod/zbsdmod.c +++ b/sys/arch/zaurus/stand/zbsdmod/zbsdmod.c @@ -1,4 +1,4 @@ -/* $OpenBSD: zbsdmod.c,v 1.9 2011/03/13 00:13:53 deraadt Exp $ */ +/* $OpenBSD: zbsdmod.c,v 1.10 2015/01/18 12:03:11 jsg Exp $ */ /* * Copyright (c) 2005 Uwe Stuehler @@ -131,7 +131,7 @@ elf32bsdboot(void) esymp = (vaddr_t *)phdr[i].p_vaddr; } - __asm__ volatile ("mrs %0, cpsr_all" : "=r" (cpsr)); + __asm__ volatile ("mrs %0, cpsr" : "=r" (cpsr)); cpsr |= 0xc0; /* set FI */ __asm__ volatile ("msr cpsr_all, %0" :: "r" (cpsr)); -- 2.20.1