From 23619b22271d055dfcda1b448f8c12d1c292a633 Mon Sep 17 00:00:00 2001 From: aoyama Date: Mon, 30 Dec 2013 07:33:40 +0000 Subject: [PATCH] Correct initialization of Bt458, used in LUNA's 8bpp frame buffer. According to the manual, the address register does not automatically increment when we access to the control registers. Also we disable overlay planes, because we do not use them. This diff should be one of preliminaries for upcoming colored wscons on luna88k. ok miod@ --- sys/arch/luna88k/dev/lunafb.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/sys/arch/luna88k/dev/lunafb.c b/sys/arch/luna88k/dev/lunafb.c index 6f2de42f864..61b4b2adad7 100644 --- a/sys/arch/luna88k/dev/lunafb.c +++ b/sys/arch/luna88k/dev/lunafb.c @@ -1,4 +1,4 @@ -/* $OpenBSD: lunafb.c,v 1.17 2013/10/21 10:36:15 miod Exp $ */ +/* $OpenBSD: lunafb.c,v 1.18 2013/12/30 07:33:40 aoyama Exp $ */ /* $NetBSD: lunafb.c,v 1.7.6.1 2002/08/07 01:48:34 lukem Exp $ */ /*- @@ -464,13 +464,16 @@ omfb_getdevconfig(paddr, dc) } else if (hwplanebits == 8) { struct bt458 *ndac = (struct bt458 *)OMFB_RAMDAC; -#if 0 /* This doesn't work. Don't touch ROM setting for now. */ + /* Initialize the Bt458 */ ndac->bt_addr = 0x04; ndac->bt_ctrl = 0xff; /* all planes will be read */ + ndac->bt_addr = 0x05; ndac->bt_ctrl = 0x00; /* all planes have non-blink */ - ndac->bt_ctrl = 0x43; /* pallete enabled, ovly plane */ + ndac->bt_addr = 0x06; + ndac->bt_ctrl = 0x40; /* palette enabled, ovly plane disabled */ + ndac->bt_addr = 0x07; ndac->bt_ctrl = 0x00; /* no test mode */ -#endif + ndac->bt_addr = 0; ndac->bt_cmap = 0; ndac->bt_cmap = 0; -- 2.20.1