From 1dc07256fbb2ddda99c632332418734178b9e122 Mon Sep 17 00:00:00 2001 From: miod Date: Wed, 2 Aug 2023 06:14:46 +0000 Subject: [PATCH] Revert r1.31 - contrary to what I wrote, scaled versions of ld.d and st.d are 64-bit loads and stores and may hit aligned-to-32-bits-but-not-64-bits addresses. --- sys/arch/m88k/m88k/trap.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/sys/arch/m88k/m88k/trap.c b/sys/arch/m88k/m88k/trap.c index 7f4d31149e4..11abfd2812f 100644 --- a/sys/arch/m88k/m88k/trap.c +++ b/sys/arch/m88k/m88k/trap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.c,v 1.127 2023/02/11 23:07:27 deraadt Exp $ */ +/* $OpenBSD: trap.c,v 1.128 2023/08/02 06:14:46 miod Exp $ */ /* * Copyright (c) 2004, Miodrag Vallat. * Copyright (c) 1998 Steve Murphree, Jr. @@ -1650,17 +1650,27 @@ double_reg_fixup(struct trapframe *frame, int fault) if (copyinsn(NULL, (u_int32_t *)pc, (u_int32_t *)&instr) != 0) return SIGSEGV; - switch (instr & 0xfc00ff00) { + switch (instr & 0xfc00ffe0) { case 0xf4001000: /* ld.d rD, rS1, rS2 */ addr = frame->tf_r[(instr >> 16) & 0x1f] + frame->tf_r[(instr & 0x1f)]; store = 0; break; + case 0xf4001200: /* ld.d rD, rS1[rS2] */ + addr = frame->tf_r[(instr >> 16) & 0x1f] + + 8 * frame->tf_r[(instr & 0x1f)]; + store = 0; + break; case 0xf4002000: /* st.d rD, rS1, rS2 */ addr = frame->tf_r[(instr >> 16) & 0x1f] + frame->tf_r[(instr & 0x1f)]; store = 1; break; + case 0xf4002200: /* st.d rD, rS1[rS2] */ + addr = frame->tf_r[(instr >> 16) & 0x1f] + + 8 * frame->tf_r[(instr & 0x1f)]; + store = 1; + break; default: switch (instr >> 26) { case 0x10000000 >> 26: /* ld.d rD, rS, imm16 */ -- 2.20.1