From 1326050f5307015660dd4b250264e3e36b3f0c86 Mon Sep 17 00:00:00 2001 From: jsg Date: Mon, 4 Mar 2024 02:09:44 +0000 Subject: [PATCH] drm/amdgpu: reset gpu for s3 suspend abort case From Prike Liang 61c0a633bdc644b064f0c9fe6412df247b2fbcca in linux-6.6.y/6.6.19 6ef82ac664bb9568ca3956e0d9c9c478e25077ff in mainline linux --- sys/dev/pci/drm/amd/amdgpu/soc15.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/sys/dev/pci/drm/amd/amdgpu/soc15.c b/sys/dev/pci/drm/amd/amdgpu/soc15.c index 3a152a76d36..408c053a32c 100644 --- a/sys/dev/pci/drm/amd/amdgpu/soc15.c +++ b/sys/dev/pci/drm/amd/amdgpu/soc15.c @@ -1296,10 +1296,32 @@ static int soc15_common_suspend(void *handle) return soc15_common_hw_fini(adev); } +static bool soc15_need_reset_on_resume(struct amdgpu_device *adev) +{ + u32 sol_reg; + + sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); + + /* Will reset for the following suspend abort cases. + * 1) Only reset limit on APU side, dGPU hasn't checked yet. + * 2) S3 suspend abort and TOS already launched. + */ + if (adev->flags & AMD_IS_APU && adev->in_s3 && + !adev->suspend_complete && + sol_reg) + return true; + + return false; +} + static int soc15_common_resume(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; + if (soc15_need_reset_on_resume(adev)) { + dev_info(adev->dev, "S3 suspend abort case, let's reset ASIC.\n"); + soc15_asic_reset(adev); + } return soc15_common_hw_init(adev); } -- 2.20.1