From 10aa22a0712f969ca75d91fff3f89dd3348da586 Mon Sep 17 00:00:00 2001 From: jsg Date: Tue, 2 Jun 2015 02:30:16 +0000 Subject: [PATCH] with binutils 2.17 we can change some raw opcodes into instruction names ok miod@ deraadt@ --- sys/arch/arm/arm/cpufunc_asm_armv7.S | 74 +++++++++++------------- sys/arch/arm/armv7/bus_space_asm_armv7.S | 50 ++++++++-------- sys/arch/armv7/conf/Makefile.armv7 | 4 +- 3 files changed, 60 insertions(+), 68 deletions(-) diff --git a/sys/arch/arm/arm/cpufunc_asm_armv7.S b/sys/arch/arm/arm/cpufunc_asm_armv7.S index 0cd67f68a4f..15197ff891b 100644 --- a/sys/arch/arm/arm/cpufunc_asm_armv7.S +++ b/sys/arch/arm/arm/cpufunc_asm_armv7.S @@ -1,4 +1,4 @@ -/* $OpenBSD: cpufunc_asm_armv7.S,v 1.7 2013/08/30 09:24:41 patrick Exp $ */ +/* $OpenBSD: cpufunc_asm_armv7.S,v 1.8 2015/06/02 02:30:16 jsg Exp $ */ /* * Copyright (c) 2008 Dale Rahn * @@ -18,17 +18,13 @@ #include #include -#define DSB .long 0xf57ff04f -#define ISB .long 0xf57ff06f -#define WFI .long 0xe320f003 - ENTRY(armv7_cpu_sleep) - WFI + wfi mov pc, lr ENTRY(armv7_drain_writebuf) - DSB - ISB + dsb sy + isb sy mov pc, lr /* @@ -44,13 +40,13 @@ ENTRY(armv7_periphbase) ENTRY(armv7_setttb) mcr p15, 0, r0, c7, c5, 0 /* Flush I cache */ mcr p15, 0, r0, c7, c5, 6 /* Flush BP cache */ - DSB - ISB + dsb sy + isb sy mcr p15, 0, r0, c2, c0, 0 /* load new TTB */ mcr p15, 0, r0, c8, c7, 0 /* invalidate I+D TLBs */ - DSB - ISB + dsb sy + isb sy mov pc, lr @@ -61,15 +57,15 @@ ENTRY(armv7_tlb_flushID_SE) mcr p15, 0, r0, c8, c6, 1 /* flush D tlb single entry */ mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */ mcr p15, 0, r0, c7, c5, 7 /* flush va from BP */ - DSB - ISB + dsb sy + isb sy mov pc, lr ENTRY(armv7_tlb_flushI_SE) mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */ mcr p15, 0, r0, c7, c5, 7 /* flush va from BP */ - DSB - ISB + dsb sy + isb sy mov pc, lr /* @@ -78,27 +74,27 @@ ENTRY(armv7_tlb_flushI_SE) ENTRY(armv7_tlb_flushID) mcr p15, 0, r0, c8, c7, 0 /* flush I+D tlb */ mcr p15, 0, r0, c7, c5, 6 /* Flush BP cache */ - DSB - ISB + dsb sy + isb sy mov pc, lr ENTRY(armv7_tlb_flushI) mcr p15, 0, r0, c8, c5, 0 /* flush I tlb */ mcr p15, 0, r0, c7, c5, 6 /* Flush BP cache */ - DSB - ISB + dsb sy + isb sy mov pc, lr ENTRY(armv7_tlb_flushD) mcr p15, 0, r0, c8, c6, 0 /* flush D tlb */ - DSB - ISB + dsb sy + isb sy mov pc, lr ENTRY(armv7_tlb_flushD_SE) mcr p15, 0, r0, c8, c6, 1 /* flush D tlb single entry */ - DSB - ISB + dsb sy + isb sy mov pc, lr @@ -127,8 +123,8 @@ ENTRY(armv7_icache_sync_range) subs r1, r1, ip bhi 1b mcr p15, 0, r0, c7, c5, 6 /* Flush BP cache */ - DSB - ISB + dsb sy + isb sy mov pc, lr ENTRY(armv7_icache_sync_all) @@ -140,7 +136,7 @@ ENTRY(armv7_icache_sync_all) */ mcr p15, 0, r0, c7, c5, 0 /* Flush I cache */ mcr p15, 0, r0, c7, c5, 6 /* Flush BP cache */ - ISB + isb sy mov pc, lr .Larmv7_line_size: @@ -161,8 +157,8 @@ ENTRY(armv7_dcache_wb_range) add r0, r0, ip subs r1, r1, ip bhi 1b - DSB - ISB + dsb sy + isb sy mov pc, lr ENTRY(armv7_idcache_wbinv_range) @@ -183,8 +179,8 @@ ENTRY(armv7_idcache_wbinv_range) subs r1, r1, ip bhi 1b mcr p15, 0, r0, c7, c5, 6 /* Flush BP cache */ - DSB - ISB + dsb sy + isb sy mov pc, lr ENTRY(armv7_dcache_wbinv_range) @@ -204,8 +200,8 @@ ENTRY(armv7_dcache_wbinv_range) add r0, r0, ip subs r1, r1, ip bhi 1b - DSB - ISB + dsb sy + isb sy mov pc, lr ENTRY(armv7_dcache_inv_range) @@ -225,8 +221,8 @@ ENTRY(armv7_dcache_inv_range) add r0, r0, ip subs r1, r1, ip bhi 1b - DSB - ISB + dsb sy + isb sy mov pc, lr @@ -246,13 +242,13 @@ ENTRY(armv7_context_switch) */ mcr p15, 0, r0, c7, c5, 0 /* Flush I cache */ mcr p15, 0, r0, c7, c5, 6 /* Flush BP cache */ - DSB - ISB + dsb sy + isb sy mcr p15, 0, r0, c2, c0, 0 /* set the new TTB */ mcr p15, 0, r0, c8, c7, 0 /* and flush the I+D tlbs */ - DSB - ISB + dsb sy + isb sy mov pc, lr /* XXX The following macros should probably be moved to asm.h */ diff --git a/sys/arch/arm/armv7/bus_space_asm_armv7.S b/sys/arch/arm/armv7/bus_space_asm_armv7.S index 25236b9c74d..794f3a798e2 100644 --- a/sys/arch/arm/armv7/bus_space_asm_armv7.S +++ b/sys/arch/arm/armv7/bus_space_asm_armv7.S @@ -1,4 +1,4 @@ -/* $OpenBSD: bus_space_asm_armv7.S,v 1.2 2013/08/30 09:24:42 patrick Exp $ */ +/* $OpenBSD: bus_space_asm_armv7.S,v 1.3 2015/06/02 02:30:16 jsg Exp $ */ /* $NetBSD: bus_space_asm_armv7.S,v 1.3 2003/03/27 19:46:14 mycroft Exp $ */ /* @@ -38,10 +38,6 @@ #include #include -#define DSB .long 0xf57ff04f -#define ISB .long 0xf57ff06f -#define WFI .long 0xe320f003 - /* * Generic bus_space functions. */ @@ -51,19 +47,19 @@ */ ENTRY(armv7_bs_r_1) - DSB + dsb sy ldrb r0, [r1, r2] mov pc, lr #if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0 ENTRY(armv7_bs_r_2) - DSB + dsb sy ldrh r0, [r1, r2] mov pc, lr #endif ENTRY(armv7_bs_r_4) - DSB + dsb sy ldr r0, [r1, r2] mov pc, lr @@ -73,17 +69,17 @@ ENTRY(armv7_bs_r_4) ENTRY(armv7_bs_w_1) strb r3, [r1, r2] - DSB + dsb sy mov pc, lr ENTRY(armv7_bs_w_2) strh r3, [r1, r2] - DSB + dsb sy mov pc, lr ENTRY(armv7_bs_w_4) str r3, [r1, r2] - DSB + dsb sy mov pc, lr /* @@ -101,7 +97,7 @@ ENTRY(armv7_bs_rm_1) strb r3, [r1], #1 subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -116,7 +112,7 @@ ENTRY(armv7_bs_rm_2) strh r3, [r1], #2 subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -131,7 +127,7 @@ ENTRY(armv7_bs_rm_4) str r3, [r1], #4 subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -150,7 +146,7 @@ ENTRY(armv7_bs_wm_1) strb r3, [r0] subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -165,7 +161,7 @@ ENTRY(armv7_bs_wm_2) strh r3, [r0] subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -180,7 +176,7 @@ ENTRY(armv7_bs_wm_4) str r3, [r0] subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -199,7 +195,7 @@ ENTRY(armv7_bs_rr_1) strb r3, [r1], #1 subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -214,7 +210,7 @@ ENTRY(armv7_bs_rr_2) strh r3, [r1], #2 subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -247,7 +243,7 @@ ENTRY(armv7_bs_wr_1) strb r3, [r0], #1 subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -262,7 +258,7 @@ ENTRY(armv7_bs_wr_2) strh r3, [r0], #2 subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -277,7 +273,7 @@ ENTRY(armv7_bs_wr_4) str r3, [r0], #4 subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -295,7 +291,7 @@ ENTRY(armv7_bs_sr_1) 1: strb r1, [r0], #1 subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -309,7 +305,7 @@ ENTRY(armv7_bs_sr_2) 1: strh r1, [r0], #2 subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -323,7 +319,7 @@ ENTRY(armv7_bs_sr_4) 1: str r1, [r0], #4 subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -346,7 +342,7 @@ ENTRY(armv7_bs_c_2) strh r3, [r1], #2 subs r2, r2, #1 bne 1b - DSB + dsb sy mov pc, lr @@ -359,6 +355,6 @@ ENTRY(armv7_bs_c_2) strh r3, [r1], #-2 subs r2, r2, #1 bne 3b - DSB + dsb sy mov pc, lr diff --git a/sys/arch/armv7/conf/Makefile.armv7 b/sys/arch/armv7/conf/Makefile.armv7 index cb17b7d19e1..26c05ae1519 100644 --- a/sys/arch/armv7/conf/Makefile.armv7 +++ b/sys/arch/armv7/conf/Makefile.armv7 @@ -1,4 +1,4 @@ -# $OpenBSD: Makefile.armv7,v 1.10 2015/05/27 00:06:14 jsg Exp $ +# $OpenBSD: Makefile.armv7,v 1.11 2015/06/02 02:30:16 jsg Exp $ # For instructions on building kernels consult the config(8) and options(4) # manual pages. @@ -27,7 +27,7 @@ CWARNFLAGS= -Werror -Wall -Wimplicit-function-declaration \ -Wno-main -Wno-uninitialized \ -Wframe-larger-than=2047 -CMACHFLAGS= -ffreestanding -msoft-float -march=armv6 +CMACHFLAGS= -ffreestanding -msoft-float -march=armv6 -Wa,-march=armv7a CMACHFLAGS+= -fno-builtin-printf -fno-builtin-snprintf \ -fno-builtin-vsnprintf -fno-builtin-log \ -fno-builtin-log2 -fno-builtin-malloc ${NOPIE_FLAGS} -- 2.20.1