From 109b20f85cf3ce66ab2226c9f62ed0f65a76a605 Mon Sep 17 00:00:00 2001
From: bluhm <bluhm@openbsd.org>
Date: Thu, 27 Jan 2022 18:28:44 +0000
Subject: [PATCH] Cast to unsigned integer before overflow can happen. found by
 kubsan; joint work with tobhe@; OK miod@

---
 sys/dev/pci/if_em_hw.c    |  4 ++--
 sys/dev/pci/if_ix.c       | 14 +++++++-------
 sys/dev/pci/ixgbe.c       |  4 ++--
 sys/dev/pci/ixgbe_82598.c |  4 ++--
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/sys/dev/pci/if_em_hw.c b/sys/dev/pci/if_em_hw.c
index f5ad5245283..286e3988c50 100644
--- a/sys/dev/pci/if_em_hw.c
+++ b/sys/dev/pci/if_em_hw.c
@@ -31,7 +31,7 @@
 
 *******************************************************************************/
 
-/* $OpenBSD: if_em_hw.c,v 1.113 2022/01/09 05:42:50 jsg Exp $ */
+/* $OpenBSD: if_em_hw.c,v 1.114 2022/01/27 18:28:44 bluhm Exp $ */
 /*
  * if_em_hw.c Shared functions for accessing and configuring the MAC
  */
@@ -7622,7 +7622,7 @@ em_read_part_num(struct em_hw *hw, uint32_t *part_num)
 		return -E1000_ERR_EEPROM;
 	}
 	/* Save word 0 in upper half of part_num */
-	*part_num = (uint32_t) (eeprom_data << 16);
+	*part_num = (uint32_t)eeprom_data << 16;
 
 	/* Get word 1 from EEPROM */
 	if (em_read_eeprom(hw, ++offset, 1, &eeprom_data) < 0) {
diff --git a/sys/dev/pci/if_ix.c b/sys/dev/pci/if_ix.c
index 6e6655446b5..a5d1f60e43e 100644
--- a/sys/dev/pci/if_ix.c
+++ b/sys/dev/pci/if_ix.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_ix.c,v 1.180 2021/07/27 01:44:55 kevlo Exp $	*/
+/*	$OpenBSD: if_ix.c,v 1.181 2022/01/27 18:28:44 bluhm Exp $	*/
 
 /******************************************************************************
 
@@ -3400,8 +3400,8 @@ ixgbe_set_ivar(struct ix_softc *sc, uint8_t entry, uint8_t vector, int8_t type)
 			entry += (type * 64);
 		index = (entry >> 2) & 0x1F;
 		ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
-		ivar &= ~(0xFF << (8 * (entry & 0x3)));
-		ivar |= (vector << (8 * (entry & 0x3)));
+		ivar &= ~((uint32_t)0xFF << (8 * (entry & 0x3)));
+		ivar |= ((uint32_t)vector << (8 * (entry & 0x3)));
 		IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar);
 		break;
 
@@ -3413,14 +3413,14 @@ ixgbe_set_ivar(struct ix_softc *sc, uint8_t entry, uint8_t vector, int8_t type)
 		if (type == -1) { /* MISC IVAR */
 			index = (entry & 1) * 8;
 			ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
-			ivar &= ~(0xFF << index);
-			ivar |= (vector << index);
+			ivar &= ~((uint32_t)0xFF << index);
+			ivar |= ((uint32_t)vector << index);
 			IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar);
 		} else {	/* RX/TX IVARS */
 			index = (16 * (entry & 1)) + (8 * type);
 			ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1));
-			ivar &= ~(0xFF << index);
-			ivar |= (vector << index);
+			ivar &= ~((uint32_t)0xFF << index);
+			ivar |= ((uint32_t)vector << index);
 			IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar);
 		}
 
diff --git a/sys/dev/pci/ixgbe.c b/sys/dev/pci/ixgbe.c
index 3ac139f6023..0fd3b9b8fbf 100644
--- a/sys/dev/pci/ixgbe.c
+++ b/sys/dev/pci/ixgbe.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ixgbe.c,v 1.26 2020/03/02 01:59:01 jmatthew Exp $	*/
+/*	$OpenBSD: ixgbe.c,v 1.27 2022/01/27 18:28:45 bluhm Exp $	*/
 
 /******************************************************************************
   SPDX-License-Identifier: BSD-3-Clause
@@ -2378,7 +2378,7 @@ int32_t ixgbe_fc_enable_generic(struct ixgbe_hw *hw)
 	}
 
 	/* Configure pause time (2 TCs per register) */
-	reg = hw->fc.pause_time * 0x00010001;
+	reg = (uint32_t)hw->fc.pause_time * 0x00010001;
 	for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++)
 		IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);
 
diff --git a/sys/dev/pci/ixgbe_82598.c b/sys/dev/pci/ixgbe_82598.c
index 54af066f537..cb23bbfb420 100644
--- a/sys/dev/pci/ixgbe_82598.c
+++ b/sys/dev/pci/ixgbe_82598.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ixgbe_82598.c,v 1.19 2022/01/09 05:42:56 jsg Exp $	*/
+/*	$OpenBSD: ixgbe_82598.c,v 1.20 2022/01/27 18:28:45 bluhm Exp $	*/
 
 /******************************************************************************
   SPDX-License-Identifier: BSD-3-Clause
@@ -544,7 +544,7 @@ int32_t ixgbe_fc_enable_82598(struct ixgbe_hw *hw)
 	}
 
 	/* Configure pause time (2 TCs per register) */
-	reg = hw->fc.pause_time * 0x00010001;
+	reg = (uint32_t)hw->fc.pause_time * 0x00010001;
 	for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++)
 		IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);
 
-- 
2.20.1