From 0ebf9ae16913c3369c913e277a9f9f685b2e0f47 Mon Sep 17 00:00:00 2001 From: jsg Date: Mon, 22 Aug 2022 08:53:55 +0000 Subject: [PATCH] remove cpu var from i386; removed from amd64 in 2015 ok daniel@ --- sys/arch/i386/i386/locore.s | 5 ++--- sys/arch/i386/i386/locore0.S | 4 ++-- sys/arch/i386/i386/machdep.c | 26 ++++++-------------------- sys/arch/i386/i386/mptramp.s | 4 ++-- sys/arch/i386/include/cpu.h | 12 +----------- sys/arch/i386/include/cputypes.h | 8 +------- 6 files changed, 14 insertions(+), 45 deletions(-) diff --git a/sys/arch/i386/i386/locore.s b/sys/arch/i386/i386/locore.s index e0753e74267..98ec7f4683e 100644 --- a/sys/arch/i386/i386/locore.s +++ b/sys/arch/i386/i386/locore.s @@ -1,4 +1,4 @@ -/* $OpenBSD: locore.s,v 1.195 2022/08/15 04:17:50 daniel Exp $ */ +/* $OpenBSD: locore.s,v 1.196 2022/08/22 08:53:55 jsg Exp $ */ /* $NetBSD: locore.s,v 1.145 1996/05/03 19:41:19 christos Exp $ */ /*- @@ -221,7 +221,7 @@ INTRENTRY_LABEL(label): /* from kernel */ ; \ */ .data - .globl _C_LABEL(cpu), _C_LABEL(cpu_id), _C_LABEL(cpu_vendor) + .globl _C_LABEL(cpu_id), _C_LABEL(cpu_vendor) .globl _C_LABEL(cpu_brandstr) .globl _C_LABEL(cpuid_level) .globl _C_LABEL(cpu_miscinfo) @@ -266,7 +266,6 @@ _C_LABEL(lapic_tpr): .long 0 #endif -_C_LABEL(cpu): .long 0 # are we 486, 586 or 686 _C_LABEL(cpu_id): .long 0 # saved from 'cpuid' instruction _C_LABEL(cpu_pae): .long 0 # are we using PAE paging mode? _C_LABEL(cpu_miscinfo): .long 0 # misc info (apic/brand id) from 'cpuid' diff --git a/sys/arch/i386/i386/locore0.S b/sys/arch/i386/i386/locore0.S index 8d03facc7b7..ab7c30d6f49 100644 --- a/sys/arch/i386/i386/locore0.S +++ b/sys/arch/i386/i386/locore0.S @@ -1,4 +1,4 @@ -/* $OpenBSD: locore0.S,v 1.8 2022/08/20 23:33:53 daniel Exp $ */ +/* $OpenBSD: locore0.S,v 1.9 2022/08/22 08:53:55 jsg Exp $ */ /* $NetBSD: locore.s,v 1.145 1996/05/03 19:41:19 christos Exp $ */ /*- @@ -131,7 +131,7 @@ start: movw $0x1234,0x472 # warm boot testl %eax,%eax jnz .Ltry586 -.Lis486: movl $CPU_486,RELOC(_C_LABEL(cpu)) +.Lis486: jmp 2f diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c index 36f3eef49e5..8d909cc689e 100644 --- a/sys/arch/i386/i386/machdep.c +++ b/sys/arch/i386/i386/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.654 2022/08/20 23:33:53 daniel Exp $ */ +/* $OpenBSD: machdep.c,v 1.655 2022/08/22 08:53:55 jsg Exp $ */ /* $NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $ */ /*- @@ -493,15 +493,6 @@ i386_init_pcb_tss(struct cpu_info *ci) */ char cpu_model[120]; -/* - * Note: these are just the ones that may not have a cpuid instruction. - * We deal with the rest in a different way. - */ -const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[] = { - { CPUVENDOR_INTEL, "Intel", "486DX", CPUCLASS_486, - NULL}, /* CPU_486 */ -}; - const char *classnames[] = { "", "486", @@ -1672,18 +1663,13 @@ identifycpu(struct cpu_info *ci) extern uint32_t cpu_meltdown; if (cpuid_level == -1) { -#ifdef DIAGNOSTIC - if (cpu < 0 || cpu >= - (sizeof i386_nocpuid_cpus/sizeof(struct cpu_nocpuid_nameclass))) - panic("unknown cpu type %d", cpu); -#endif - name = i386_nocpuid_cpus[cpu].cpu_name; - vendor = i386_nocpuid_cpus[cpu].cpu_vendor; - vendorname = i386_nocpuid_cpus[cpu].cpu_vendorname; + name = "486DX"; + vendor = CPUVENDOR_INTEL; + vendorname = "Intel"; model = -1; step = -1; - class = i386_nocpuid_cpus[cpu].cpu_class; - ci->cpu_setup = i386_nocpuid_cpus[cpu].cpu_setup; + class = CPUCLASS_486; + ci->cpu_setup = NULL; modifier = ""; token = ""; } else { diff --git a/sys/arch/i386/i386/mptramp.s b/sys/arch/i386/i386/mptramp.s index a206cd6867b..5ec74ef4c94 100644 --- a/sys/arch/i386/i386/mptramp.s +++ b/sys/arch/i386/i386/mptramp.s @@ -1,4 +1,4 @@ -/* $OpenBSD: mptramp.s,v 1.25 2018/03/31 13:45:03 bluhm Exp $ */ +/* $OpenBSD: mptramp.s,v 1.26 2022/08/22 08:53:55 jsg Exp $ */ /*- * Copyright (c) 2000 The NetBSD Foundation, Inc. @@ -98,7 +98,7 @@ MP_TRAMP_DATA #define _TRMP_DATA_OFFSET(a) a = . - _C_LABEL(mp_tramp_data_start) - .globl _C_LABEL(cpu),_C_LABEL(cpu_id),_C_LABEL(cpu_vendor) + .globl _C_LABEL(cpu_id),_C_LABEL(cpu_vendor) .globl _C_LABEL(cpuid_level),_C_LABEL(cpu_feature) .global _C_LABEL(cpu_spinup_trampoline) diff --git a/sys/arch/i386/include/cpu.h b/sys/arch/i386/include/cpu.h index 5f300710562..bfab0f32a22 100644 --- a/sys/arch/i386/include/cpu.h +++ b/sys/arch/i386/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.176 2022/07/12 05:45:49 jsg Exp $ */ +/* $OpenBSD: cpu.h,v 1.177 2022/08/22 08:53:55 jsg Exp $ */ /* $NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $ */ /*- @@ -317,14 +317,6 @@ void calibrate_cyclecounter(void); */ #include -struct cpu_nocpuid_nameclass { - int cpu_vendor; - const char *cpu_vendorname; - const char *cpu_name; - int cpu_class; - void (*cpu_setup)(struct cpu_info *); -}; - struct cpu_cpuid_nameclass { const char *cpu_id; int cpu_vendor; @@ -342,7 +334,6 @@ struct cpu_cpuid_feature { }; /* locore.s */ -extern int cpu; extern int cpu_id; extern char cpu_vendor[]; /* note: NOT nul-terminated */ extern char cpu_brandstr[]; @@ -372,7 +363,6 @@ extern void cpu_tsx_disable(struct cpu_info *); extern int cpu_apmhalt; extern int cpu_class; extern char cpu_model[]; -extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[]; extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[]; extern void (*cpu_idle_enter_fcn)(void); extern void (*cpu_idle_cycle_fcn)(void); diff --git a/sys/arch/i386/include/cputypes.h b/sys/arch/i386/include/cputypes.h index fd7c6b0bd3d..9b5420faffd 100644 --- a/sys/arch/i386/include/cputypes.h +++ b/sys/arch/i386/include/cputypes.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cputypes.h,v 1.14 2022/08/20 23:33:53 daniel Exp $ */ +/* $OpenBSD: cputypes.h,v 1.15 2022/08/22 08:53:55 jsg Exp $ */ /* $NetBSD: cputypes.h,v 1.10 1997/10/18 04:51:03 mikel Exp $ */ /* @@ -36,12 +36,6 @@ #define CPUCLASS_586 2 #define CPUCLASS_686 3 -/* - * Kind of Processor. - */ - -#define CPU_486 0 /* Intel 80486DX */ - /* * CPU vendors */ -- 2.20.1