From 0e221ac20f9ec629d0f17d1af55d03090d86a57b Mon Sep 17 00:00:00 2001 From: jsg Date: Wed, 26 Jul 2023 06:10:51 +0000 Subject: [PATCH] drm/i915: Fix one wrong caching mode enum usage From Tvrtko Ursulin 5a9aecb6651c6e1ef8198c162340ebe172b7a551 in linux-6.1.y/6.1.40 113899c2669dff148b2a5bea4780123811aecc13 in mainline linux --- sys/dev/pci/drm/i915/gt/intel_gtt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/dev/pci/drm/i915/gt/intel_gtt.c b/sys/dev/pci/drm/i915/gt/intel_gtt.c index 3e4a53fbcbc..b08965a98fa 100644 --- a/sys/dev/pci/drm/i915/gt/intel_gtt.c +++ b/sys/dev/pci/drm/i915/gt/intel_gtt.c @@ -611,7 +611,7 @@ __vm_create_scratch_for_read(struct i915_address_space *vm, unsigned long size) if (IS_ERR(obj)) return ERR_CAST(obj); - i915_gem_object_set_cache_coherency(obj, I915_CACHING_CACHED); + i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC); vma = i915_vma_instance(obj, vm, NULL); if (IS_ERR(vma)) { -- 2.20.1