From 09917c1440059894f92985ce2665e0721365903a Mon Sep 17 00:00:00 2001 From: jsg Date: Thu, 14 Apr 2022 08:51:00 +0000 Subject: [PATCH] drm/amdgpu/vcn: Fix the register setting for vcn1 From Emily Deng 6a5d209898a605c31c26dbd2b002529e37ff0c6e in linux 5.15.y/5.15.34 02fc996d5098f4c3f65bdf6cdb6b28e3f29ba789 in mainline linux --- sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c b/sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c index 544f8475d58..0afd3f7eb0b 100644 --- a/sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c +++ b/sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c @@ -601,8 +601,8 @@ static void vcn_v3_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_fw_shared)), 0, indirect); /* VCN global tiling registers */ - WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( - UVD, 0, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect); + WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( + UVD, inst_idx, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect); } static void vcn_v3_0_disable_static_power_gating(struct amdgpu_device *adev, int inst) -- 2.20.1