From 07b219feff692782ae03fb1beb096bdd47c671fd Mon Sep 17 00:00:00 2001 From: mlarkin Date: Tue, 5 Sep 2023 14:00:40 +0000 Subject: [PATCH] vmm(4): switch the APMI CPUID mask to an include mask dv points out that there are other bits there that imply the existence of other MSRs, so switching this to an include list is a better idea. --- sys/arch/amd64/amd64/vmm_machdep.c | 4 ++-- sys/arch/amd64/include/vmmvar.h | 6 ++++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/sys/arch/amd64/amd64/vmm_machdep.c b/sys/arch/amd64/amd64/vmm_machdep.c index 6a63b021e20..4e68581d131 100644 --- a/sys/arch/amd64/amd64/vmm_machdep.c +++ b/sys/arch/amd64/amd64/vmm_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: vmm_machdep.c,v 1.6 2023/09/03 09:30:43 mlarkin Exp $ */ +/* $OpenBSD: vmm_machdep.c,v 1.7 2023/09/05 14:00:40 mlarkin Exp $ */ /* * Copyright (c) 2014 Mike Larkin * @@ -6319,7 +6319,7 @@ vmm_handle_cpuid(struct vcpu *vcpu) *rax = eax; *rbx = ebx; *rcx = ecx; - *rdx = edx & VMM_APMI_EDX_MASK; + *rdx = edx & VMM_APMI_EDX_INCLUDE_MASK; break; case 0x80000008: /* Phys bits info and topology (AMD) */ *rax = eax; diff --git a/sys/arch/amd64/include/vmmvar.h b/sys/arch/amd64/include/vmmvar.h index a187c4f1d2d..4b75fa8ac19 100644 --- a/sys/arch/amd64/include/vmmvar.h +++ b/sys/arch/amd64/include/vmmvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: vmmvar.h,v 1.92 2023/09/03 09:30:43 mlarkin Exp $ */ +/* $OpenBSD: vmmvar.h,v 1.93 2023/09/05 14:00:41 mlarkin Exp $ */ /* * Copyright (c) 2014 Mike Larkin * @@ -559,7 +559,9 @@ struct vm_mprotect_ept_params { CPUIDEBX_STIBP | CPUIDEBX_IBRS_ALWAYSON | CPUIDEBX_STIBP_ALWAYSON | \ CPUIDEBX_IBRS_PREF | CPUIDEBX_SSBD | CPUIDEBX_VIRT_SSBD | \ CPUIDEBX_SSBD_NOTREQ) -#define VMM_APMI_EDX_MASK ~(CPUIDEDX_HWPSTATE) + +/* This mask is an include list for bits we want to expose */ +#define VMM_APMI_EDX_INCLUDE_MASK (CPUIDEDX_ITSC) /* * SEFF flags - copy from host minus: -- 2.20.1