From 0596f60c19339807726a08ce35441714f09b432e Mon Sep 17 00:00:00 2001 From: stsp Date: Sun, 10 May 2015 15:10:46 +0000 Subject: [PATCH] My commit adding RTL8188EU did introduce a regression after all. Repair firmware reset on RTL8188CUS devices (and perhaps others) by restoring the proper register write order in the non-8188EU code path. Fixes "urtwn0: timeout waiting for firmware readiness" after device reset. --- sys/dev/usb/if_urtwn.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/sys/dev/usb/if_urtwn.c b/sys/dev/usb/if_urtwn.c index 91f46fa0651..65f9e4c1ad6 100644 --- a/sys/dev/usb/if_urtwn.c +++ b/sys/dev/usb/if_urtwn.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_urtwn.c,v 1.44 2015/05/04 11:46:29 stsp Exp $ */ +/* $OpenBSD: if_urtwn.c,v 1.45 2015/05/10 15:10:46 stsp Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini @@ -2413,9 +2413,6 @@ urtwn_fw_reset(struct urtwn_softc *sc) } /* Force 8051 reset. */ urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); - urtwn_write_2(sc, R92C_SYS_FUNC_EN, - urtwn_read_2(sc, R92C_SYS_FUNC_EN) | - R92C_SYS_FUNC_EN_CPUEN); } @@ -2505,6 +2502,10 @@ urtwn_load_firmware(struct urtwn_softc *sc) urtwn_fw_reset(sc); urtwn_write_1(sc, R92C_MCUFWDL, 0); } + if (!(sc->chip & URTWN_CHIP_88E)) + urtwn_write_2(sc, R92C_SYS_FUNC_EN, + urtwn_read_2(sc, R92C_SYS_FUNC_EN) | + R92C_SYS_FUNC_EN_CPUEN); urtwn_write_1(sc, R92C_MCUFWDL, urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); -- 2.20.1