From 0378f658b8b909b83d696bb31e4d222601280e62 Mon Sep 17 00:00:00 2001 From: jsg Date: Fri, 28 Jul 2023 03:06:46 +0000 Subject: [PATCH] Fix off-by-one: SEFF0ECX_WAITPKG is bit 5, not bit 4. from guenther@ in amd64 --- sys/arch/i386/include/specialreg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/arch/i386/include/specialreg.h b/sys/arch/i386/include/specialreg.h index 3e90b1721e8..0a1dbe4f559 100644 --- a/sys/arch/i386/include/specialreg.h +++ b/sys/arch/i386/include/specialreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: specialreg.h,v 1.83 2023/07/24 14:54:00 deraadt Exp $ */ +/* $OpenBSD: specialreg.h,v 1.84 2023/07/28 03:06:46 jsg Exp $ */ /* $NetBSD: specialreg.h,v 1.7 1994/10/27 04:16:26 cgd Exp $ */ /*- @@ -190,7 +190,7 @@ #define SEFF0ECX_AVX512VBMI 0x00000002 /* AVX-512 vector bit inst */ #define SEFF0ECX_UMIP 0x00000004 /* UMIP support */ #define SEFF0ECX_PKU 0x00000008 /* Page prot keys for user mode */ -#define SEFF0ECX_WAITPKG 0x00000010 /* UMONITOR/UMWAIT/TPAUSE insns */ +#define SEFF0ECX_WAITPKG 0x00000020 /* UMONITOR/UMWAIT/TPAUSE insns */ /* SEFF EDX bits */ #define SEFF0EDX_AVX512_4FNNIW 0x00000004 /* AVX-512 neural network insns */ #define SEFF0EDX_AVX512_4FMAPS 0x00000008 /* AVX-512 mult accum single prec */ -- 2.20.1