From 0057cee774ad438f8712c4fb8f503de140b5c7c6 Mon Sep 17 00:00:00 2001 From: mlarkin Date: Tue, 2 Nov 2021 23:30:15 +0000 Subject: [PATCH] Remove trailing whitespace --- sys/arch/amd64/amd64/identcpu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sys/arch/amd64/amd64/identcpu.c b/sys/arch/amd64/amd64/identcpu.c index c977e64de96..ca6276b2cb5 100644 --- a/sys/arch/amd64/amd64/identcpu.c +++ b/sys/arch/amd64/amd64/identcpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: identcpu.c,v 1.120 2021/08/31 15:52:59 patrick Exp $ */ +/* $OpenBSD: identcpu.c,v 1.121 2021/11/02 23:30:15 mlarkin Exp $ */ /* $NetBSD: identcpu.c,v 1.1 2003/04/26 18:39:28 fvdl Exp $ */ /* @@ -955,7 +955,7 @@ cpu_check_vmm_cap(struct cpu_info *ci) /* VM Functions available? */ if (msr & (IA32_VMX_ENABLE_VM_FUNCTIONS) << 32) { ci->ci_vmm_cap.vcc_vmx.vmx_vm_func = - rdmsr(IA32_VMX_VMFUNC); + rdmsr(IA32_VMX_VMFUNC); } } } @@ -1039,7 +1039,7 @@ cpu_check_vmm_cap(struct cpu_info *ci) * hardware (RDCL_NO), or we may be nested in an VMM that * is doing flushes (SKIP_L1DFL_VMENTRY) using the MSR. * In either case no mitigation at all is necessary. - */ + */ if (ci->ci_feature_sefflags_edx & SEFF0EDX_ARCH_CAP) { msr = rdmsr(MSR_ARCH_CAPABILITIES); if ((msr & ARCH_CAPABILITIES_RDCL_NO) || -- 2.20.1