From: jsg <jsg@openbsd.org>
Date: Sun, 31 Jul 2016 06:24:38 +0000 (+0000)
Subject: Recognise Cortex A35 and Cortex A73.
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=f2263fa6695c605dc9dddb16a3ca2a49f0fe4b03;p=openbsd

Recognise Cortex A35 and Cortex A73.
---

diff --git a/sys/arch/arm/arm/cpu.c b/sys/arch/arm/arm/cpu.c
index bd3f39d7301..3ce2ba0c701 100644
--- a/sys/arch/arm/arm/cpu.c
+++ b/sys/arch/arm/arm/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.30 2016/03/22 23:35:01 patrick Exp $	*/
+/*	$OpenBSD: cpu.c,v 1.31 2016/07/31 06:24:38 jsg Exp $	*/
 /*	$NetBSD: cpu.c,v 1.56 2004/04/14 04:01:49 bsh Exp $	*/
 
 
@@ -209,6 +209,8 @@ const struct cpuidtab cpuids[] = {
 	{ CPU_ID_CORTEX_A17_R1,	CPU_CLASS_ARMv7,	"ARM Cortex A17 R1",
 	  generic_steppings },
 
+	{ CPU_ID_CORTEX_A35,	CPU_CLASS_ARMv7,	"ARM Cortex A35",
+	  generic_steppings },
 	{ CPU_ID_CORTEX_A53,	CPU_CLASS_ARMv7,	"ARM Cortex A53",
 	  generic_steppings },
 	{ CPU_ID_CORTEX_A53_R1,	CPU_CLASS_ARMv7,	"ARM Cortex A53 R1",
@@ -221,6 +223,8 @@ const struct cpuidtab cpuids[] = {
 	  generic_steppings },
 	{ CPU_ID_CORTEX_A72_R1,	CPU_CLASS_ARMv7,	"ARM Cortex A72 R1",
 	  generic_steppings },
+	{ CPU_ID_CORTEX_A73,	CPU_CLASS_ARMv7,	"ARM Cortex A73",
+	  generic_steppings },
 
 	{ 0, CPU_CLASS_NONE, NULL, NULL }
 };
diff --git a/sys/arch/arm/include/armreg.h b/sys/arch/arm/include/armreg.h
index e0e07a19332..1ff70a764a9 100644
--- a/sys/arch/arm/include/armreg.h
+++ b/sys/arch/arm/include/armreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: armreg.h,v 1.31 2016/07/31 03:49:51 jsg Exp $	*/
+/*	$OpenBSD: armreg.h,v 1.32 2016/07/31 06:24:38 jsg Exp $	*/
 /*	$NetBSD: armreg.h,v 1.27 2003/09/06 08:43:02 rearnsha Exp $	*/
 
 /*
@@ -171,6 +171,8 @@
 #define CPU_ID_CORTEX_A17	0x410fc0e0
 #define CPU_ID_CORTEX_A17_R1	0x411fc0e0
 #define CPU_ID_CORTEX_A17_MASK	0xff0ffff0
+#define CPU_ID_CORTEX_A35	0x410fd040
+#define CPU_ID_CORTEX_A35_MASK	0xff0ffff0
 #define CPU_ID_CORTEX_A53	0x410fd030
 #define CPU_ID_CORTEX_A53_R1	0x411fd030
 #define CPU_ID_CORTEX_A53_MASK	0xff0ffff0
@@ -180,6 +182,8 @@
 #define CPU_ID_CORTEX_A72	0x410fd080
 #define CPU_ID_CORTEX_A72_R1	0x411fd080
 #define CPU_ID_CORTEX_A72_MASK	0xff0ffff0
+#define CPU_ID_CORTEX_A73	0x410fd090
+#define CPU_ID_CORTEX_A73_MASK	0xff0ffff0
 
 /* CPUID on >= v7 */
 #define ID_MMFR0_VMSA_MASK	0x0000000f