From: mglocker Date: Sun, 19 May 2024 20:24:02 +0000 (+0000) Subject: Use aggregation interrupts like stated in the documentation; Setup values X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=f0ed5855882c9afa43305bfcd8688d07f054bddf;p=openbsd Use aggregation interrupts like stated in the documentation; Setup values (counter and timeout) during device init, reset values once commands have been completed. This also let us get rid of the 'sc_intraggr_enabled' variable. --- diff --git a/sys/dev/ic/ufshci.c b/sys/dev/ic/ufshci.c index 6cdb154064f..e94b6ee4b9c 100644 --- a/sys/dev/ic/ufshci.c +++ b/sys/dev/ic/ufshci.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ufshci.c,v 1.24 2024/05/16 10:52:11 mglocker Exp $ */ +/* $OpenBSD: ufshci.c,v 1.25 2024/05/19 20:24:02 mglocker Exp $ */ /* * Copyright (c) 2022 Marcus Glocker @@ -125,11 +125,6 @@ ufshci_intr(void *arg) if (status & UFSHCI_REG_IS_UTRCS) { DPRINTF(3, "%s: UTRCS interrupt\n", __func__); - /* Reset Interrupt Aggregation Counter and Timer. */ - UFSHCI_WRITE_4(sc, UFSHCI_REG_UTRIACR, - UFSHCI_REG_UTRIACR_IAEN | UFSHCI_REG_UTRIACR_CTR); - sc->sc_intraggr_enabled = 0; - ufshci_xfer_complete(sc); handled = 1; @@ -371,8 +366,12 @@ ufshci_init(struct ufshci_softc *sc) */ /* 7.1.1 Host Controller Initialization: 11) */ - reg = UFSHCI_READ_4(sc, UFSHCI_REG_UTRIACR); - DPRINTF(2, "%s: UTRIACR=0x%08x\n", __func__, reg); + UFSHCI_WRITE_4(sc, UFSHCI_REG_UTRIACR, + UFSHCI_REG_UTRIACR_IAEN | + UFSHCI_REG_UTRIACR_IAPWEN | + UFSHCI_REG_UTRIACR_CTR | + UFSHCI_REG_UTRIACR_IACTH(sc->sc_iacth) | + UFSHCI_REG_UTRIACR_IATOVAL(UFSHCI_INTR_AGGR_TIMEOUT)); /* * 7.1.1 Host Controller Initialization: 12) @@ -1247,6 +1246,11 @@ ufshci_xfer_complete(struct ufshci_softc *sc) DPRINTF(3, "slot %d completed\n", i); } + + /* 7.2.3: Reset Interrupt Aggregation Counter and Timer 4) */ + UFSHCI_WRITE_4(sc, UFSHCI_REG_UTRIACR, + UFSHCI_REG_UTRIACR_IAEN | UFSHCI_REG_UTRIACR_CTR); + mtx_leave(&sc->sc_cmd_mtx); /* @@ -1361,17 +1365,6 @@ ufshci_scsi_cmd(struct scsi_xfer *xs) DPRINTF(3, "%s: cmd=0x%x\n", __func__, xs->cmd.opcode); - /* Schedule interrupt aggregation. */ - if (ISSET(xs->flags, SCSI_POLL) == 0 && sc->sc_intraggr_enabled == 0) { - UFSHCI_WRITE_4(sc, UFSHCI_REG_UTRIACR, - UFSHCI_REG_UTRIACR_IAEN | - UFSHCI_REG_UTRIACR_IAPWEN | - UFSHCI_REG_UTRIACR_CTR | - UFSHCI_REG_UTRIACR_IACTH(sc->sc_iacth) | - UFSHCI_REG_UTRIACR_IATOVAL(UFSHCI_INTR_AGGR_TIMEOUT)); - sc->sc_intraggr_enabled = 1; - } - switch (xs->cmd.opcode) { case READ_COMMAND: diff --git a/sys/dev/ic/ufshcivar.h b/sys/dev/ic/ufshcivar.h index 7a4816a7618..808e06618e1 100644 --- a/sys/dev/ic/ufshcivar.h +++ b/sys/dev/ic/ufshcivar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ufshcivar.h,v 1.5 2024/05/15 20:15:33 mglocker Exp $ */ +/* $OpenBSD: ufshcivar.h,v 1.6 2024/05/19 20:24:02 mglocker Exp $ */ /* * Copyright (c) 2022 Marcus Glocker @@ -57,7 +57,6 @@ struct ufshci_softc { bus_size_t sc_ios; bus_dma_tag_t sc_dmat; - uint8_t sc_intraggr_enabled; uint8_t sc_iacth; struct mutex sc_cmd_mtx;