From: jsg <jsg@openbsd.org>
Date: Wed, 13 Sep 2023 13:07:29 +0000 (+0000)
Subject: drm/amd/display: Add smu write msg id fail retry process
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=e71fa5b78b120076926df9e9dc676bde4a8ff294;p=openbsd

drm/amd/display: Add smu write msg id fail retry process

From Fudong Wang
b23c96589ff7f25ad2232524f6c74e0067be2369 in linux-6.1.y/6.1.53
72105dcfa3d12b5af49311f857e3490baa225135 in mainline linux
---

diff --git a/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c b/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c
index e8a38ba6968..f518ad24a88 100644
--- a/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c
+++ b/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c
@@ -32,6 +32,7 @@
 
 #define MAX_INSTANCE                                        6
 #define MAX_SEGMENT                                         6
+#define SMU_REGISTER_WRITE_RETRY_COUNT                      5
 
 struct IP_BASE_INSTANCE
 {
@@ -134,6 +135,8 @@ static int dcn315_smu_send_msg_with_param(
 		unsigned int msg_id, unsigned int param)
 {
 	uint32_t result;
+	uint32_t i = 0;
+	uint32_t read_back_data;
 
 	result = dcn315_smu_wait_for_response(clk_mgr, 10, 200000);
 
@@ -150,10 +153,19 @@ static int dcn315_smu_send_msg_with_param(
 	/* Set the parameter register for the SMU message, unit is Mhz */
 	REG_WRITE(MP1_SMN_C2PMSG_37, param);
 
-	/* Trigger the message transaction by writing the message ID */
-	generic_write_indirect_reg(CTX,
-		REG_NBIO(RSMU_INDEX), REG_NBIO(RSMU_DATA),
-		mmMP1_C2PMSG_3, msg_id);
+	for (i = 0; i < SMU_REGISTER_WRITE_RETRY_COUNT; i++) {
+		/* Trigger the message transaction by writing the message ID */
+		generic_write_indirect_reg(CTX,
+			REG_NBIO(RSMU_INDEX), REG_NBIO(RSMU_DATA),
+			mmMP1_C2PMSG_3, msg_id);
+		read_back_data = generic_read_indirect_reg(CTX,
+			REG_NBIO(RSMU_INDEX), REG_NBIO(RSMU_DATA),
+			mmMP1_C2PMSG_3);
+		if (read_back_data == msg_id)
+			break;
+		udelay(2);
+		smu_print("SMU msg id write fail %x times. \n", i + 1);
+	}
 
 	result = dcn315_smu_wait_for_response(clk_mgr, 10, 200000);