From: jsg Date: Mon, 9 Jan 2023 04:17:50 +0000 (+0000) Subject: drm/amdgpu: handle polaris10/11 overlap asics (v2) X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=e10e7b688b5eba6024f9a1eee7b84334ac304568;p=openbsd drm/amdgpu: handle polaris10/11 overlap asics (v2) From Alex Deucher 9724e6950ef902abd6abc5b5dfacca4b5125ba75 in linux-6.1.y/6.1.4 1d4624cd72b912b2680c08d0be48338a1629a858 in mainline linux --- diff --git a/sys/dev/pci/drm/amd/amdgpu/amdgpu_drv.c b/sys/dev/pci/drm/amd/amdgpu/amdgpu_drv.c index 45c43d64692..7ac810dc165 100644 --- a/sys/dev/pci/drm/amd/amdgpu/amdgpu_drv.c +++ b/sys/dev/pci/drm/amd/amdgpu/amdgpu_drv.c @@ -2044,6 +2044,15 @@ static int amdgpu_pci_probe(struct pci_dev *pdev, "See modparam exp_hw_support\n"); return -ENODEV; } + /* differentiate between P10 and P11 asics with the same DID */ + if (pdev->device == 0x67FF && + (pdev->revision == 0xE3 || + pdev->revision == 0xE7 || + pdev->revision == 0xF3 || + pdev->revision == 0xF7)) { + flags &= ~AMD_ASIC_MASK; + flags |= CHIP_POLARIS10; + } /* Due to hardware bugs, S/G Display on raven requires a 1:1 IOMMU mapping, * however, SME requires an indirect IOMMU mapping because the encryption @@ -2113,12 +2122,12 @@ static int amdgpu_pci_probe(struct pci_dev *pdev, pci_set_drvdata(pdev, ddev); - ret = amdgpu_driver_load_kms(adev, ent->driver_data); + ret = amdgpu_driver_load_kms(adev, flags); if (ret) goto err_pci; retry_init: - ret = drm_dev_register(ddev, ent->driver_data); + ret = drm_dev_register(ddev, flags); if (ret == -EAGAIN && ++retry <= 3) { DRM_INFO("retry init %d\n", retry); /* Don't request EX mode too frequently which is attacking */